aboutsummaryrefslogtreecommitdiff
path: root/examples/stm32l4/src/bin/usb_serial.rs
diff options
context:
space:
mode:
authorxoviat <[email protected]>2023-10-16 20:04:10 -0500
committerxoviat <[email protected]>2023-10-16 20:04:10 -0500
commita3574e519ad191c3c4c49fe9779a0a71d61cae3b (patch)
treebdadb4c56d3e96f06af771780a8ea7f44cd4cd91 /examples/stm32l4/src/bin/usb_serial.rs
parentf7980885a5dc9cd095c07efed3c38091b6f1ae8f (diff)
stm32: update metapac
Diffstat (limited to 'examples/stm32l4/src/bin/usb_serial.rs')
-rw-r--r--examples/stm32l4/src/bin/usb_serial.rs2
1 files changed, 1 insertions, 1 deletions
diff --git a/examples/stm32l4/src/bin/usb_serial.rs b/examples/stm32l4/src/bin/usb_serial.rs
index 3785c6898..34361d112 100644
--- a/examples/stm32l4/src/bin/usb_serial.rs
+++ b/examples/stm32l4/src/bin/usb_serial.rs
@@ -27,7 +27,7 @@ async fn main(_spawner: Spawner) {
27 config.rcc.mux = ClockSrc::PLL; 27 config.rcc.mux = ClockSrc::PLL;
28 config.rcc.hsi16 = true; 28 config.rcc.hsi16 = true;
29 config.rcc.pll = Some(Pll { 29 config.rcc.pll = Some(Pll {
30 source: PLLSource::HSI16, 30 source: PLLSource::HSI,
31 prediv: PllPreDiv::DIV1, 31 prediv: PllPreDiv::DIV1,
32 mul: PllMul::MUL10, 32 mul: PllMul::MUL10,
33 divp: None, 33 divp: None,