diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-10-22 21:05:27 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2023-10-22 21:05:27 +0000 |
| commit | 46ff2c82aa3193dd1378b142be284aa746045923 (patch) | |
| tree | 41c2abe14f76529e2c56679c87f2aa2f9acf82d5 /examples/stm32l4/src | |
| parent | e70c531d3d28565b6926d99d8e977c4df6c13c60 (diff) | |
| parent | a84ad741a48dfce29b7f764e0cfb6877eba9a027 (diff) | |
Merge pull request #2101 from embassy-rs/rcc-no-spaghetti
stm32/tests: add stm32wba52cg, stm32u5a9zj
Diffstat (limited to 'examples/stm32l4/src')
| -rw-r--r-- | examples/stm32l4/src/bin/rng.rs | 2 | ||||
| -rw-r--r-- | examples/stm32l4/src/bin/usb_serial.rs | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/examples/stm32l4/src/bin/rng.rs b/examples/stm32l4/src/bin/rng.rs index d8a4e825f..553d11c03 100644 --- a/examples/stm32l4/src/bin/rng.rs +++ b/examples/stm32l4/src/bin/rng.rs | |||
| @@ -17,7 +17,7 @@ bind_interrupts!(struct Irqs { | |||
| 17 | async fn main(_spawner: Spawner) { | 17 | async fn main(_spawner: Spawner) { |
| 18 | let mut config = Config::default(); | 18 | let mut config = Config::default(); |
| 19 | config.rcc.mux = ClockSrc::PLL1_R; | 19 | config.rcc.mux = ClockSrc::PLL1_R; |
| 20 | config.rcc.hsi16 = true; | 20 | config.rcc.hsi = true; |
| 21 | config.rcc.pll = Some(Pll { | 21 | config.rcc.pll = Some(Pll { |
| 22 | source: PLLSource::HSI, | 22 | source: PLLSource::HSI, |
| 23 | prediv: PllPreDiv::DIV1, | 23 | prediv: PllPreDiv::DIV1, |
diff --git a/examples/stm32l4/src/bin/usb_serial.rs b/examples/stm32l4/src/bin/usb_serial.rs index 282476547..15c6f1982 100644 --- a/examples/stm32l4/src/bin/usb_serial.rs +++ b/examples/stm32l4/src/bin/usb_serial.rs | |||
| @@ -25,7 +25,7 @@ async fn main(_spawner: Spawner) { | |||
| 25 | let mut config = Config::default(); | 25 | let mut config = Config::default(); |
| 26 | config.rcc.hsi48 = true; | 26 | config.rcc.hsi48 = true; |
| 27 | config.rcc.mux = ClockSrc::PLL1_R; | 27 | config.rcc.mux = ClockSrc::PLL1_R; |
| 28 | config.rcc.hsi16 = true; | 28 | config.rcc.hsi = true; |
| 29 | config.rcc.pll = Some(Pll { | 29 | config.rcc.pll = Some(Pll { |
| 30 | source: PLLSource::HSI, | 30 | source: PLLSource::HSI, |
| 31 | prediv: PllPreDiv::DIV1, | 31 | prediv: PllPreDiv::DIV1, |