Change GPIO inherent methods back to `&self`.

With the embedded-hal rc3 update I changed them to require `&mut self`, but
in retrospect I think `&self` is better, for extra flexibility.

This PR reverts the changes from the rc3 update to inherent methods.

4 files changed, 7 insertions, 7 deletions

diff --git a/examples/stm32l4/src/bin/button.rs b/examples/stm32l4/src/bin/button.rs
index 15288c61e..1f3270214 100644
--- a/examples/stm32l4/src/bin/button.rs
+++ b/examples/stm32l4/src/bin/button.rs
@@ -11,7 +11,7 @@ fn main() -> ! {
 
     let p = embassy_stm32::init(Default::default());
 
-    let mut button = Input::new(p.PC13, Pull::Up);
+    let button = Input::new(p.PC13, Pull::Up);
 
     loop {
         if button.is_high() {
diff --git a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
index 9565ae168..5b4cdfe5e 100644
--- a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
+++ b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
@@ -111,8 +111,8 @@ async fn main(spawner: Spawner) {
     let led_uc4_blue = Output::new(dp.PG15, Level::High, Speed::Low);
 
     // Read the uc_cfg switches
-    let mut uc_cfg0 = Input::new(dp.PB2, Pull::None);
-    let mut uc_cfg1 = Input::new(dp.PF11, Pull::None);
+    let uc_cfg0 = Input::new(dp.PB2, Pull::None);
+    let uc_cfg1 = Input::new(dp.PF11, Pull::None);
     let _uc_cfg2 = Input::new(dp.PG6, Pull::None);
     let _uc_cfg3 = Input::new(dp.PG11, Pull::None);
 
@@ -130,8 +130,8 @@ async fn main(spawner: Spawner) {
 
     // Setup IO and SPI for the SPE chip
     let spe_reset_n = Output::new(dp.PC7, Level::Low, Speed::Low);
-    let mut spe_cfg0 = Input::new(dp.PC8, Pull::None);
-    let mut spe_cfg1 = Input::new(dp.PC9, Pull::None);
+    let spe_cfg0 = Input::new(dp.PC8, Pull::None);
+    let spe_cfg1 = Input::new(dp.PC9, Pull::None);
     let _spe_ts_capt = Output::new(dp.PC6, Level::Low, Speed::Low);
 
     let spe_int = Input::new(dp.PB11, Pull::None);
diff --git a/examples/stm32l4/src/bin/spi_blocking_async.rs b/examples/stm32l4/src/bin/spi_blocking_async.rs
index a989a5a4a..68dbb70ad 100644
--- a/examples/stm32l4/src/bin/spi_blocking_async.rs
+++ b/examples/stm32l4/src/bin/spi_blocking_async.rs
@@ -29,7 +29,7 @@ async fn main(_spawner: Spawner) {
     let _wake = Output::new(p.PB13, Level::Low, Speed::VeryHigh);
     let mut reset = Output::new(p.PE8, Level::Low, Speed::VeryHigh);
     let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh);
-    let mut ready = Input::new(p.PE1, Pull::Up);
+    let ready = Input::new(p.PE1, Pull::Up);
 
     cortex_m::asm::delay(100_000);
     reset.set_high();
diff --git a/examples/stm32l4/src/bin/spi_dma.rs b/examples/stm32l4/src/bin/spi_dma.rs
index 7922165df..946a759b1 100644
--- a/examples/stm32l4/src/bin/spi_dma.rs
+++ b/examples/stm32l4/src/bin/spi_dma.rs
@@ -24,7 +24,7 @@ async fn main(_spawner: Spawner) {
     let _wake = Output::new(p.PB13, Level::Low, Speed::VeryHigh);
     let mut reset = Output::new(p.PE8, Level::Low, Speed::VeryHigh);
     let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh);
-    let mut ready = Input::new(p.PE1, Pull::Up);
+    let ready = Input::new(p.PE1, Pull::Up);
 
     cortex_m::asm::delay(100_000);
     reset.set_high();