Update embedded-hal to 1.0.0-rc.3

5 files changed, 10 insertions, 10 deletions

diff --git a/examples/stm32l4/Cargo.toml b/examples/stm32l4/Cargo.toml
index a936d27c3..2861216d4 100644
--- a/examples/stm32l4/Cargo.toml
+++ b/examples/stm32l4/Cargo.toml
@@ -24,9 +24,9 @@ defmt-rtt = "0.4"
 cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] }
 cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
-embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-rc.2" }
-embedded-hal-async = { version = "=1.0.0-rc.2" }
-embedded-hal-bus = { version = "=0.1.0-rc.2", features = ["async"] }
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-rc.3" }
+embedded-hal-async = { version = "=1.0.0-rc.3" }
+embedded-hal-bus = { version = "=0.1.0-rc.3", features = ["async"] }
 panic-probe = { version = "0.3", features = ["print-defmt"] }
 futures = { version = "0.3.17", default-features = false, features = ["async-await"] }
 heapless = { version = "0.8", default-features = false }
diff --git a/examples/stm32l4/src/bin/button.rs b/examples/stm32l4/src/bin/button.rs
index 73b1962e8..0a102c2d6 100644
--- a/examples/stm32l4/src/bin/button.rs
+++ b/examples/stm32l4/src/bin/button.rs
@@ -12,7 +12,7 @@ fn main() -> ! {
 
     let p = embassy_stm32::init(Default::default());
 
-    let button = Input::new(p.PC13, Pull::Up);
+    let mut button = Input::new(p.PC13, Pull::Up);
 
     loop {
         if button.is_high() {
diff --git a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
index 4826e0bed..8ec810c7f 100644
--- a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
+++ b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
@@ -114,8 +114,8 @@ async fn main(spawner: Spawner) {
     let led_uc4_blue = Output::new(dp.PG15, Level::High, Speed::Low);
 
     // Read the uc_cfg switches
-    let uc_cfg0 = Input::new(dp.PB2, Pull::None);
-    let uc_cfg1 = Input::new(dp.PF11, Pull::None);
+    let mut uc_cfg0 = Input::new(dp.PB2, Pull::None);
+    let mut uc_cfg1 = Input::new(dp.PF11, Pull::None);
     let _uc_cfg2 = Input::new(dp.PG6, Pull::None);
     let _uc_cfg3 = Input::new(dp.PG11, Pull::None);
 
@@ -133,8 +133,8 @@ async fn main(spawner: Spawner) {
 
     // Setup IO and SPI for the SPE chip
     let spe_reset_n = Output::new(dp.PC7, Level::Low, Speed::Low);
-    let spe_cfg0 = Input::new(dp.PC8, Pull::None);
-    let spe_cfg1 = Input::new(dp.PC9, Pull::None);
+    let mut spe_cfg0 = Input::new(dp.PC8, Pull::None);
+    let mut spe_cfg1 = Input::new(dp.PC9, Pull::None);
     let _spe_ts_capt = Output::new(dp.PC6, Level::Low, Speed::Low);
 
     let spe_int = Input::new(dp.PB11, Pull::None);
diff --git a/examples/stm32l4/src/bin/spi_blocking_async.rs b/examples/stm32l4/src/bin/spi_blocking_async.rs
index f1b80087c..903ca58df 100644
--- a/examples/stm32l4/src/bin/spi_blocking_async.rs
+++ b/examples/stm32l4/src/bin/spi_blocking_async.rs
@@ -30,7 +30,7 @@ async fn main(_spawner: Spawner) {
     let _wake = Output::new(p.PB13, Level::Low, Speed::VeryHigh);
     let mut reset = Output::new(p.PE8, Level::Low, Speed::VeryHigh);
     let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh);
-    let ready = Input::new(p.PE1, Pull::Up);
+    let mut ready = Input::new(p.PE1, Pull::Up);
 
     cortex_m::asm::delay(100_000);
     reset.set_high();
diff --git a/examples/stm32l4/src/bin/spi_dma.rs b/examples/stm32l4/src/bin/spi_dma.rs
index ff9b5b43b..58cf2e51e 100644
--- a/examples/stm32l4/src/bin/spi_dma.rs
+++ b/examples/stm32l4/src/bin/spi_dma.rs
@@ -25,7 +25,7 @@ async fn main(_spawner: Spawner) {
     let _wake = Output::new(p.PB13, Level::Low, Speed::VeryHigh);
     let mut reset = Output::new(p.PE8, Level::Low, Speed::VeryHigh);
     let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh);
-    let ready = Input::new(p.PE1, Pull::Up);
+    let mut ready = Input::new(p.PE1, Pull::Up);
 
     cortex_m::asm::delay(100_000);
     reset.set_high();