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authorDario Nieuwenhuis <[email protected]>2023-10-22 22:39:55 +0200
committerDario Nieuwenhuis <[email protected]>2023-10-22 22:39:55 +0200
commit412bcad2d1b989189f529f272683ce95d5107ef0 (patch)
tree24869e04df62586d48b90f76c3f9eb249ffd9cfa /examples/stm32u5/src
parente70c531d3d28565b6926d99d8e977c4df6c13c60 (diff)
stm32: rename HSI16 -> HSI
Diffstat (limited to 'examples/stm32u5/src')
-rw-r--r--examples/stm32u5/src/bin/usb_serial.rs4
1 files changed, 2 insertions, 2 deletions
diff --git a/examples/stm32u5/src/bin/usb_serial.rs b/examples/stm32u5/src/bin/usb_serial.rs
index 9b2adb0ac..f59f623b3 100644
--- a/examples/stm32u5/src/bin/usb_serial.rs
+++ b/examples/stm32u5/src/bin/usb_serial.rs
@@ -23,8 +23,8 @@ async fn main(_spawner: Spawner) {
23 info!("Hello World!"); 23 info!("Hello World!");
24 24
25 let mut config = Config::default(); 25 let mut config = Config::default();
26 config.rcc.mux = ClockSrc::PLL1R(PllConfig { 26 config.rcc.mux = ClockSrc::PLL1_R(PllConfig {
27 source: PllSrc::HSI16, 27 source: PllSrc::HSI,
28 m: Pllm::DIV2, 28 m: Pllm::DIV2,
29 n: Plln::MUL10, 29 n: Plln::MUL10,
30 r: Plldiv::DIV1, 30 r: Plldiv::DIV1,