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authorDario Nieuwenhuis <[email protected]>2023-11-13 00:52:01 +0100
committerDario Nieuwenhuis <[email protected]>2023-11-13 00:52:01 +0100
commit4fe344ebc0f4e030ff7a03755f27e66e9ad0476f (patch)
treef4c40f8f346d52f2180ccf39f2d811337a2e9621 /examples/stm32wl/src/bin/rtc.rs
parent39c737162185adb4f30f18f700da08a55be6b55a (diff)
stm32/rcc: consistent casing and naming for PLL enums.
Diffstat (limited to 'examples/stm32wl/src/bin/rtc.rs')
-rw-r--r--examples/stm32wl/src/bin/rtc.rs2
1 files changed, 1 insertions, 1 deletions
diff --git a/examples/stm32wl/src/bin/rtc.rs b/examples/stm32wl/src/bin/rtc.rs
index b3b7f9c5c..4ffb0bb58 100644
--- a/examples/stm32wl/src/bin/rtc.rs
+++ b/examples/stm32wl/src/bin/rtc.rs
@@ -24,7 +24,7 @@ async fn main(_spawner: Spawner) {
24 }); 24 });
25 config.rcc.mux = ClockSrc::PLL1_R; 25 config.rcc.mux = ClockSrc::PLL1_R;
26 config.rcc.pll = Some(Pll { 26 config.rcc.pll = Some(Pll {
27 source: PLLSource::HSE, 27 source: PllSource::HSE,
28 prediv: PllPreDiv::DIV2, 28 prediv: PllPreDiv::DIV2,
29 mul: PllMul::MUL6, 29 mul: PllMul::MUL6,
30 divp: None, 30 divp: None,