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authorAlexandros Liarokapis <[email protected]>2024-08-17 00:26:33 +0300
committerAlexandros Liarokapis <[email protected]>2024-08-17 16:54:41 +0300
commit2b7e76efe9916170cba69da964d53c19a246ae45 (patch)
tree10f1b8973e80af44dd81a65aad4f1e7456a3ca30 /examples/stm32wl
parent6d9ed4c0807c977aa6d3c852360d52128f8c459a (diff)
Fix dma nvic issues on dual core lines
This commit addresses #3256 by disabling dma NVIC interrupt enablement at startup. Instead, per-channel NVIC interrupt enablement is now done with the rest of the dma channel configuration. This ensures that each core will only handle the interrupts of the DMA channels that it uses.
Diffstat (limited to 'examples/stm32wl')
-rw-r--r--examples/stm32wl/memory.x6
1 files changed, 3 insertions, 3 deletions
diff --git a/examples/stm32wl/memory.x b/examples/stm32wl/memory.x
index 0298caa4b..4590867a8 100644
--- a/examples/stm32wl/memory.x
+++ b/examples/stm32wl/memory.x
@@ -2,8 +2,8 @@ MEMORY
2{ 2{
3 /* NOTE 1 K = 1 KiBi = 1024 bytes */ 3 /* NOTE 1 K = 1 KiBi = 1024 bytes */
4 FLASH : ORIGIN = 0x08000000, LENGTH = 256K 4 FLASH : ORIGIN = 0x08000000, LENGTH = 256K
5 SHARED_RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 64 5 SHARED_RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128
6 RAM (rwx) : ORIGIN = 0x20000040, LENGTH = 64K - 64 6 RAM (rwx) : ORIGIN = 0x20000080, LENGTH = 64K - 128
7} 7}
8 8
9SECTIONS 9SECTIONS
@@ -12,4 +12,4 @@ SECTIONS
12 { 12 {
13 *(.shared_data) 13 *(.shared_data)
14 } > SHARED_RAM 14 } > SHARED_RAM
15} \ No newline at end of file 15}