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authorbors[bot] <26634292+bors[bot]@users.noreply.github.com>2021-11-02 20:42:41 +0000
committerGitHub <[email protected]>2021-11-02 20:42:41 +0000
commit1bf6e646c9ad0d14ce3510442688ef604c6f363f (patch)
tree46488ce03399de79576e96e33df717661d1a2096 /examples
parent569ecd699d1d7f346359b482ad7435fb44ff388b (diff)
parentf9c266bc10879080604d710f23cecfd524879d55 (diff)
Merge #465
465: Adjust for STM32U5. r=lulf a=bobmcwhirter Co-authored-by: Bob McWhirter <[email protected]>
Diffstat (limited to 'examples')
-rw-r--r--examples/stm32l4/.cargo/config.toml3
-rw-r--r--examples/stm32u5/.cargo/config.toml18
-rw-r--r--examples/stm32u5/Cargo.toml37
-rw-r--r--examples/stm32u5/src/bin/boot.rs16
-rw-r--r--examples/stm32u5/src/example_common.rs17
5 files changed, 90 insertions, 1 deletions
diff --git a/examples/stm32l4/.cargo/config.toml b/examples/stm32l4/.cargo/config.toml
index b157e3aeb..d32ca4ae9 100644
--- a/examples/stm32l4/.cargo/config.toml
+++ b/examples/stm32l4/.cargo/config.toml
@@ -1,7 +1,8 @@
1[target.'cfg(all(target_arch = "arm", target_os = "none"))'] 1[target.'cfg(all(target_arch = "arm", target_os = "none"))']
2# replace STM32F429ZITx with your chip as listed in `probe-run --list-chips` 2# replace STM32F429ZITx with your chip as listed in `probe-run --list-chips`
3#runner = "probe-run --chip STM32L475VGT6" 3#runner = "probe-run --chip STM32L475VGT6"
4runner = "probe-run --chip STM32L475VG" 4#runner = "probe-run --chip STM32L475VG"
5runner = "probe-run --chip STM32L4S5VI"
5 6
6rustflags = [ 7rustflags = [
7 # LLD (shipped with the Rust toolchain) is used as the default linker 8 # LLD (shipped with the Rust toolchain) is used as the default linker
diff --git a/examples/stm32u5/.cargo/config.toml b/examples/stm32u5/.cargo/config.toml
new file mode 100644
index 000000000..7f4887008
--- /dev/null
+++ b/examples/stm32u5/.cargo/config.toml
@@ -0,0 +1,18 @@
1[target.'cfg(all(target_arch = "arm", target_os = "none"))']
2# replace STM32F429ZITx with your chip as listed in `probe-run --list-chips`
3runner = "probe-run --chip STM32U585AIIx"
4
5rustflags = [
6 # LLD (shipped with the Rust toolchain) is used as the default linker
7 "-C", "link-arg=--nmagic",
8 "-C", "link-arg=-Tlink.x",
9 "-C", "link-arg=-Tdefmt.x",
10
11 # Code-size optimizations.
12 "-Z", "trap-unreachable=no",
13 "-C", "inline-threshold=5",
14 "-C", "no-vectorize-loops",
15]
16
17[build]
18target = "thumbv7em-none-eabi"
diff --git a/examples/stm32u5/Cargo.toml b/examples/stm32u5/Cargo.toml
new file mode 100644
index 000000000..b3c3c9700
--- /dev/null
+++ b/examples/stm32u5/Cargo.toml
@@ -0,0 +1,37 @@
1[package]
2authors = ["Dario Nieuwenhuis <[email protected]>"]
3edition = "2018"
4name = "embassy-stm32u5-examples"
5version = "0.1.0"
6resolver = "2"
7
8[features]
9default = [
10 "defmt-default",
11]
12defmt-default = []
13defmt-trace = []
14defmt-debug = []
15defmt-info = []
16defmt-warn = []
17defmt-error = []
18
19[dependencies]
20embassy = { version = "0.1.0", path = "../../embassy", features = ["defmt", "defmt-trace"] }
21embassy-traits = { version = "0.1.0", path = "../../embassy-traits", features = ["defmt"] }
22embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "defmt-trace", "unstable-pac", "stm32u585ai", "memory-x" ] }
23embassy-hal-common = {version = "0.1.0", path = "../../embassy-hal-common" }
24
25defmt = "0.2.3"
26defmt-rtt = "0.2.0"
27
28cortex-m = "0.7.3"
29cortex-m-rt = "0.7.0"
30embedded-hal = "0.2.6"
31panic-probe = { version = "0.2.0", features = ["print-defmt"] }
32futures = { version = "0.3.17", default-features = false, features = ["async-await"] }
33rtt-target = { version = "0.3.1", features = ["cortex-m"] }
34heapless = { version = "0.7.5", default-features = false }
35
36micromath = "2.0.0"
37
diff --git a/examples/stm32u5/src/bin/boot.rs b/examples/stm32u5/src/bin/boot.rs
new file mode 100644
index 000000000..91eff735d
--- /dev/null
+++ b/examples/stm32u5/src/bin/boot.rs
@@ -0,0 +1,16 @@
1#![no_std]
2#![no_main]
3#![feature(type_alias_impl_trait)]
4
5#[path = "../example_common.rs"]
6mod example_common;
7use example_common::*;
8
9use embassy_stm32 as _;
10
11#[cortex_m_rt::entry]
12fn main() -> ! {
13 info!("Hello World!");
14
15 loop {}
16}
diff --git a/examples/stm32u5/src/example_common.rs b/examples/stm32u5/src/example_common.rs
new file mode 100644
index 000000000..54d633837
--- /dev/null
+++ b/examples/stm32u5/src/example_common.rs
@@ -0,0 +1,17 @@
1#![macro_use]
2
3use defmt_rtt as _; // global logger
4use panic_probe as _;
5
6pub use defmt::*;
7
8use core::sync::atomic::{AtomicUsize, Ordering};
9
10defmt::timestamp! {"{=u64}", {
11 static COUNT: AtomicUsize = AtomicUsize::new(0);
12 // NOTE(no-CAS) `timestamps` runs with interrupts disabled
13 let n = COUNT.load(Ordering::Relaxed);
14 COUNT.store(n + 1, Ordering::Relaxed);
15 n as u64
16 }
17}