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| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2023-02-23 16:22:31 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2023-02-23 16:22:31 +0000 |
| commit | 3255e0a17200774a6b434e9e1bd2a0f2dc2be6bd (patch) | |
| tree | 78d873da6ad939865a579218ce09c9ed4f940149 /examples | |
| parent | f0f92909c11c4f147e1d2fb3d32c7413a999affc (diff) | |
| parent | 73ef85b7650eea65c2f52e570f26062dd8ec38d0 (diff) | |
Merge #1228
1228: stm32/sdmmc: Implement proper clock configuration r=chemicstry a=chemicstry
This implements proper clock configuration for sdmmc based on chip family, because `RccPeripheral::frequency()` is almost always incorrect. This can't be fixed in PAC, because sdmmc uses two clock domains, one for memory bus and one for sd card. `RccPeripheral::frequency()` usually returns the memory bus clock, but SDIO clock calculations need sd card domain clock. Moreover, chips have multiple clock source selection bits, which makes this even more complicated. I'm not sure if it's worth implementing all this logic in `RccPeripheral::frequency()` instead of cfg's in sdmmc.
Some chips (Lx, U5, H7) require RCC updates to expose required clocks. I didn't want to mash everything in a single PR so left a TODO comment. I also left a `T::frequency()` fallback, which seemed to work in H7 case even though the clock is most certainly incorrect.
In addition, added support for clock divider bypass for sdmmc_v1, which allows reaching a maximum clock of 48 MHz. The peripheral theoretically supports up to 50 MHz, but for that ST recommends setting pll48 frequency to 50 MHz 🤔
Co-authored-by: chemicstry <[email protected]>
Diffstat (limited to 'examples')
| -rw-r--r-- | examples/stm32f4/src/bin/sdmmc.rs | 3 | ||||
| -rw-r--r-- | examples/stm32f7/src/bin/sdmmc.rs | 1 |
2 files changed, 3 insertions, 1 deletions
diff --git a/examples/stm32f4/src/bin/sdmmc.rs b/examples/stm32f4/src/bin/sdmmc.rs index b57e955f6..1d0e60cb8 100644 --- a/examples/stm32f4/src/bin/sdmmc.rs +++ b/examples/stm32f4/src/bin/sdmmc.rs | |||
| @@ -17,6 +17,7 @@ const ALLOW_WRITES: bool = false; | |||
| 17 | async fn main(_spawner: Spawner) -> ! { | 17 | async fn main(_spawner: Spawner) -> ! { |
| 18 | let mut config = Config::default(); | 18 | let mut config = Config::default(); |
| 19 | config.rcc.sys_ck = Some(mhz(48)); | 19 | config.rcc.sys_ck = Some(mhz(48)); |
| 20 | config.rcc.pll48 = true; | ||
| 20 | let p = embassy_stm32::init(config); | 21 | let p = embassy_stm32::init(config); |
| 21 | info!("Hello World!"); | 22 | info!("Hello World!"); |
| 22 | 23 | ||
| @@ -38,7 +39,7 @@ async fn main(_spawner: Spawner) -> ! { | |||
| 38 | // Should print 400kHz for initialization | 39 | // Should print 400kHz for initialization |
| 39 | info!("Configured clock: {}", sdmmc.clock().0); | 40 | info!("Configured clock: {}", sdmmc.clock().0); |
| 40 | 41 | ||
| 41 | unwrap!(sdmmc.init_card(mhz(24)).await); | 42 | unwrap!(sdmmc.init_card(mhz(48)).await); |
| 42 | 43 | ||
| 43 | let card = unwrap!(sdmmc.card()); | 44 | let card = unwrap!(sdmmc.card()); |
| 44 | 45 | ||
diff --git a/examples/stm32f7/src/bin/sdmmc.rs b/examples/stm32f7/src/bin/sdmmc.rs index 3bf427eca..cf8128e27 100644 --- a/examples/stm32f7/src/bin/sdmmc.rs +++ b/examples/stm32f7/src/bin/sdmmc.rs | |||
| @@ -13,6 +13,7 @@ use {defmt_rtt as _, panic_probe as _}; | |||
| 13 | async fn main(_spawner: Spawner) -> ! { | 13 | async fn main(_spawner: Spawner) -> ! { |
| 14 | let mut config = Config::default(); | 14 | let mut config = Config::default(); |
| 15 | config.rcc.sys_ck = Some(mhz(200)); | 15 | config.rcc.sys_ck = Some(mhz(200)); |
| 16 | config.rcc.pll48 = true; | ||
| 16 | let p = embassy_stm32::init(config); | 17 | let p = embassy_stm32::init(config); |
| 17 | 18 | ||
| 18 | info!("Hello World!"); | 19 | info!("Hello World!"); |
