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authorWilliam <[email protected]>2024-10-25 15:03:26 +0200
committerWilliam <[email protected]>2024-10-25 15:03:26 +0200
commit45e7a7a55aa6b5b8d41d81949b75b1b4a154f9bd (patch)
tree9e4f584be399198e82ec05c300ad0b5fcfd4d771 /examples
parent8803128707b8bd9fc9dcea392a62dfd42aa822d2 (diff)
Update CFBLR configuration
As per section "43.7.23 LTDC layer x color frame buffer length register (LTDC_LxCFBLR)" of Reference manual for STM32U5 RM0456, CFBLL has to be set to the length of one pixel line plus 3 (instead of plus 7 as for H7)
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