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authorDario Nieuwenhuis <[email protected]>2024-02-25 22:45:48 +0000
committerGitHub <[email protected]>2024-02-25 22:45:48 +0000
commit497515ed57b768332295ef58630231609fb959fc (patch)
treea3bee07eda154faa8f3f32493e91905b927d5740 /examples
parent326e32adc4f5035a122fa12d3111026d27d48e63 (diff)
parent394abda092cac80c875998c429f629caa289f9d1 (diff)
Merge pull request #2583 from OroArmor/tim_pll_clk
Enable PLL Clocks for TIMx peripherals on STM32F3xx Chips
Diffstat (limited to 'examples')
-rw-r--r--examples/stm32f334/src/bin/pwm.rs3
1 files changed, 2 insertions, 1 deletions
diff --git a/examples/stm32f334/src/bin/pwm.rs b/examples/stm32f334/src/bin/pwm.rs
index 7fc1ea926..7c6d6cd71 100644
--- a/examples/stm32f334/src/bin/pwm.rs
+++ b/examples/stm32f334/src/bin/pwm.rs
@@ -27,7 +27,8 @@ async fn main(_spawner: Spawner) {
27 config.rcc.ahb_pre = AHBPrescaler::DIV1; 27 config.rcc.ahb_pre = AHBPrescaler::DIV1;
28 config.rcc.apb1_pre = APBPrescaler::DIV2; 28 config.rcc.apb1_pre = APBPrescaler::DIV2;
29 config.rcc.apb2_pre = APBPrescaler::DIV1; 29 config.rcc.apb2_pre = APBPrescaler::DIV1;
30 config.rcc.hrtim = HrtimClockSource::PllClk; 30
31 config.rcc.mux.hrtim1sw = Some(embassy_stm32::rcc::mux::Timsw::PLL1_P);
31 } 32 }
32 let p = embassy_stm32::init(config); 33 let p = embassy_stm32::init(config);
33 34