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authorKevin Lannen <[email protected]>2023-06-28 13:05:39 -0600
committerKevin Lannen <[email protected]>2023-06-28 16:53:16 -0600
commit5666c569033d59fc894230ed4161e6c686733b2d (patch)
tree2f86425f8ead9b10872bf82a2ef71834e1ff2171 /examples
parent2eb7a67c7027c6768fa95031caf60bcd0eade1ad (diff)
STM32G4: Add CRS support to RCC
Create working CRS USB Example
Diffstat (limited to 'examples')
-rw-r--r--examples/stm32g4/src/bin/usb_serial.rs28
1 files changed, 19 insertions, 9 deletions
diff --git a/examples/stm32g4/src/bin/usb_serial.rs b/examples/stm32g4/src/bin/usb_serial.rs
index 289d0ed86..77cfa67d3 100644
--- a/examples/stm32g4/src/bin/usb_serial.rs
+++ b/examples/stm32g4/src/bin/usb_serial.rs
@@ -4,10 +4,10 @@
4 4
5use defmt::{panic, *}; 5use defmt::{panic, *};
6use embassy_executor::Spawner; 6use embassy_executor::Spawner;
7use embassy_stm32::rcc::{ClockSrc, Pll, PllM, PllN, PllQ, PllR, PllSrc}; 7use embassy_stm32::rcc::{Clock48MhzSrc, ClockSrc, CrsConfig, CrsSyncSource, Pll, PllM, PllN, PllQ, PllR, PllSrc};
8use embassy_stm32::time::Hertz; 8use embassy_stm32::time::Hertz;
9use embassy_stm32::usb::{self, Driver, Instance}; 9use embassy_stm32::usb::{self, Driver, Instance};
10use embassy_stm32::{bind_interrupts, pac, peripherals, Config}; 10use embassy_stm32::{bind_interrupts, peripherals, Config};
11use embassy_usb::class::cdc_acm::{CdcAcmClass, State}; 11use embassy_usb::class::cdc_acm::{CdcAcmClass, State};
12use embassy_usb::driver::EndpointError; 12use embassy_usb::driver::EndpointError;
13use embassy_usb::Builder; 13use embassy_usb::Builder;
@@ -22,25 +22,35 @@ bind_interrupts!(struct Irqs {
22async fn main(_spawner: Spawner) { 22async fn main(_spawner: Spawner) {
23 let mut config = Config::default(); 23 let mut config = Config::default();
24 24
25 // Change this to `false` to use the HSE clock source for the USB. This example assumes an 8MHz HSE.
26 const USE_HSI48: bool = true;
27
28 let pllq_div = if USE_HSI48 { None } else { Some(PllQ::Div6) };
29
25 config.rcc.pll = Some(Pll { 30 config.rcc.pll = Some(Pll {
26 source: PllSrc::HSE(Hertz(8000000)), 31 source: PllSrc::HSE(Hertz(8_000_000)),
27 prediv_m: PllM::Div2, 32 prediv_m: PllM::Div2,
28 mul_n: PllN::Mul72, 33 mul_n: PllN::Mul72,
29 div_p: None, 34 div_p: None,
30 // USB and CAN at 48 MHz 35 div_q: pllq_div,
31 div_q: Some(PllQ::Div6),
32 // Main system clock at 144 MHz 36 // Main system clock at 144 MHz
33 div_r: Some(PllR::Div2), 37 div_r: Some(PllR::Div2),
34 }); 38 });
35 39
36 config.rcc.mux = ClockSrc::PLL; 40 config.rcc.mux = ClockSrc::PLL;
37 41
42 if USE_HSI48 {
43 // Sets up the Clock Recovery System (CRS) to use the USB SOF to trim the HSI48 oscillator.
44 config.rcc.clock_48mhz_src = Some(Clock48MhzSrc::Hsi48(Some(CrsConfig {
45 sync_src: CrsSyncSource::Usb,
46 })));
47 } else {
48 config.rcc.clock_48mhz_src = Some(Clock48MhzSrc::PllQ);
49 }
50
38 let p = embassy_stm32::init(config); 51 let p = embassy_stm32::init(config);
39 info!("Hello World!");
40 52
41 pac::RCC.ccipr().write(|w| { 53 info!("Hello World!");
42 w.set_clk48sel(pac::rcc::vals::Clk48sel::PLLQCLK);
43 });
44 54
45 let driver = Driver::new(p.USB, Irqs, p.PA12, p.PA11); 55 let driver = Driver::new(p.USB, Irqs, p.PA12, p.PA11);
46 56