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authorBruno Bousquet <[email protected]>2024-05-05 23:05:06 -0400
committerBruno Bousquet <[email protected]>2024-05-05 23:05:06 -0400
commit7b04b0166b59558322c77eac6683bbf58268b3f1 (patch)
tree2663fbc75f176451009cd9048181781e41a64f2e /examples
parent29d6fa0a4aa3203e95cf81ada366cb0ccf593af4 (diff)
cleanup for PR
Diffstat (limited to 'examples')
-rw-r--r--examples/stm32f4/.cargo/config.toml12
-rw-r--r--examples/stm32f4/.vscode/README.md109
-rw-r--r--examples/stm32f4/.vscode/extensions.json17
-rw-r--r--examples/stm32f4/.vscode/launch.json33
-rw-r--r--examples/stm32f4/.vscode/tasks.json43
-rw-r--r--examples/stm32f4/Cargo.toml2
-rw-r--r--examples/stm32f4/openocd.cfg5
-rw-r--r--examples/stm32f4/openocd.gdb40
8 files changed, 3 insertions, 258 deletions
diff --git a/examples/stm32f4/.cargo/config.toml b/examples/stm32f4/.cargo/config.toml
index fdb246a7f..16efa8e6f 100644
--- a/examples/stm32f4/.cargo/config.toml
+++ b/examples/stm32f4/.cargo/config.toml
@@ -1,17 +1,9 @@
1[target.'cfg(all(target_arch = "arm", target_os = "none"))'] 1[target.'cfg(all(target_arch = "arm", target_os = "none"))']
2# replace STM32F429ZITx with your chip as listed in `probe-rs chip list` 2# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
3# runner = "probe-rs run --chip STM32F429ZITx" 3runner = "probe-rs run --chip STM32F429ZITx"
4runner = "arm-none-eabi-gdb -q -x openocd.gdb"
5 4
6[build] 5[build]
7# Pick ONE of these default compilation targets 6target = "thumbv7em-none-eabi"
8# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+
9# target = "thumbv7m-none-eabi" # Cortex-M3
10# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU)
11target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
12# target = "thumbv8m.base-none-eabi" # Cortex-M23
13# target = "thumbv8m.main-none-eabi" # Cortex-M33 (no FPU)
14# target = "thumbv8m.main-none-eabihf" # Cortex-M33 (with FPU)
15 7
16[env] 8[env]
17DEFMT_LOG = "trace" 9DEFMT_LOG = "trace"
diff --git a/examples/stm32f4/.vscode/README.md b/examples/stm32f4/.vscode/README.md
deleted file mode 100644
index 4d20f43a8..000000000
--- a/examples/stm32f4/.vscode/README.md
+++ /dev/null
@@ -1,109 +0,0 @@
1# VS Code Configuration
2
3Example configurations for debugging programs in-editor with VS Code.
4This directory contains configurations for two platforms:
5
6 - `LM3S6965EVB` on QEMU
7 - `STM32F303x` via OpenOCD
8
9## Required Extensions
10
11If you have the `code` command in your path, you can run the following commands to install the necessary extensions.
12
13```sh
14code --install-extension rust-lang.rust-analyzer
15code --install-extension marus25.cortex-debug
16```
17
18Otherwise, you can use the Extensions view to search for and install them, or go directly to their marketplace pages and click the "Install" button.
19
20- [Rust Language Server (rust-analyzer)](https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer)
21- [Cortex-Debug](https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug)
22
23## Use
24
25The quickstart comes with two debug configurations.
26Both are configured to build the project, using the default settings from `.cargo/config`, prior to starting a debug session.
27
281. QEMU: Starts a debug session using an emulation of the `LM3S6965EVB` mcu.
29 - This works on a fresh `cargo generate` without modification of any of the settings described above.
30 - Semihosting output will be written to the Output view `Adapter Output`.
31 - `ITM` logging does not work with QEMU emulation.
32
332. OpenOCD: Starts a debug session for a `STM32F3DISCOVERY` board (or any `STM32F303x` running at 8MHz).
34 - Follow the instructions above for configuring the build with `.cargo/config` and the `memory.x` linker script.
35 - `ITM` output will be written to the Output view `SWO: ITM [port: 0, type: console]` output.
36
37### Git
38
39Files in the `.vscode/` directory are `.gitignore`d by default because many files that may end up in the `.vscode/` directory should not be committed and shared.
40If you would like to save this debug configuration to your repository and share it with your team, you'll need to explicitly `git add` the files to your repository.
41
42```sh
43git add -f .vscode/launch.json
44git add -f .vscode/tasks.json
45git add -f .vscode/*.svd
46```
47
48## Customizing for other targets
49
50For full documentation, see the [Cortex-Debug][cortex-debug] repository.
51
52### Device
53
54Some configurations use this to automatically find the SVD file.
55Replace this with the part number for your device.
56
57```json
58"device": "STM32F303VCT6",
59```
60
61### OpenOCD Config Files
62
63The `configFiles` property specifies a list of files to pass to OpenOCD.
64
65```json
66"configFiles": [
67 "interface/stlink-v2-1.cfg",
68 "target/stm32f3x.cfg"
69],
70```
71
72See the [OpenOCD config docs][openocd-config] for more information and the [OpenOCD repository for available configuration files][openocd-repo].
73
74### SVD
75
76The SVD file is a standard way of describing all registers and peripherals of an ARM Cortex-M mCU.
77Cortex-Debug needs this file to display the current register values for the peripherals on the device.
78
79You can probably find the SVD for your device on the vendor's website.
80
81
82For example, the STM32F3DISCOVERY board uses an mcu from the `STM32F303x` line of processors.
83All the SVD files for the STM32F3 series are available on [ST's Website][stm32f3].
84Download the [stm32f3 SVD pack][stm32f3-svd], and copy the `STM32F303.svd` file into `.vscode/`.
85This line of the config tells the Cortex-Debug plug in where to find the file.
86
87```json
88"svdFile": "${workspaceRoot}/.vscode/STM32F303.svd",
89```
90
91For other processors, simply copy the correct `*.svd` file into the project and update the config accordingly.
92
93### CPU Frequency
94
95If your device is running at a frequency other than 8MHz, you'll need to modify this line of `launch.json` for the `ITM` output to work correctly.
96
97```json
98"cpuFrequency": 8000000,
99```
100
101### Other GDB Servers
102
103For information on setting up GDB servers other than OpenOCD, see the [Cortex-Debug repository][cortex-debug].
104
105[cortex-debug]: https://github.com/Marus/cortex-debug
106[stm32f3]: https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus/stm32-mainstream-mcus/stm32f3-series.html#resource
107[stm32f3-svd]: https://www.st.com/resource/en/svd/stm32f3_svd.zip
108[openocd-config]: http://openocd.org/doc/html/Config-File-Guidelines.html
109[openocd-repo]: https://sourceforge.net/p/openocd/code/ci/master/tree/tcl/
diff --git a/examples/stm32f4/.vscode/extensions.json b/examples/stm32f4/.vscode/extensions.json
deleted file mode 100644
index b7304974e..000000000
--- a/examples/stm32f4/.vscode/extensions.json
+++ /dev/null
@@ -1,17 +0,0 @@
1{
2 // See https://go.microsoft.com/fwlink/?LinkId=827846 to learn about workspace recommendations.
3 // Extension identifier format: ${publisher}.${name}. Example: vscode.csharp
4
5 // List of extensions which should be recommended for users of this workspace.
6 "recommendations": [
7 "rust-lang.rust-analyzer",
8 "marus25.cortex-debug",
9 "usernamehw.errorlens",
10 "tamasfe.even-better-toml",
11 "serayuzgur.crates"
12 ],
13 // List of extensions recommended by VS Code that should not be recommended for users of this workspace.
14 "unwantedRecommendations": [
15
16 ]
17}
diff --git a/examples/stm32f4/.vscode/launch.json b/examples/stm32f4/.vscode/launch.json
deleted file mode 100644
index 20cd4d2e8..000000000
--- a/examples/stm32f4/.vscode/launch.json
+++ /dev/null
@@ -1,33 +0,0 @@
1{
2 /*
3 * Requires the Rust Language Server (rust-analyzer) and Cortex-Debug extensions
4 * https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer
5 * https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug
6 */
7 "version": "0.2.0",
8 "configurations": [
9 {
10 /* Configuration for the STM32F446 Discovery board */
11 "type": "cortex-debug",
12 "request": "launch",
13 "name": "Debug (OpenOCD)",
14 "servertype": "openocd",
15 "cwd": "${workspaceRoot}",
16 "preLaunchTask": "Cargo Build (debug)",
17 "runToEntryPoint": "main",
18 "executable": "./target/thumbv7em-none-eabihf/debug/input_capture",
19 /* Run `cargo build --example itm` and uncomment this line to run itm example */
20 // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm",
21 "device": "STM32F446RET6",
22 "configFiles": [
23 "interface/stlink.cfg",
24 "target/stm32f4x.cfg"
25 ],
26 "postLaunchCommands": [
27 "monitor arm semihosting enable"
28 ],
29 "postRestartCommands": [],
30 "postResetCommands": [],
31 }
32 ]
33} \ No newline at end of file
diff --git a/examples/stm32f4/.vscode/tasks.json b/examples/stm32f4/.vscode/tasks.json
deleted file mode 100644
index 9109a6157..000000000
--- a/examples/stm32f4/.vscode/tasks.json
+++ /dev/null
@@ -1,43 +0,0 @@
1{
2 // See https://go.microsoft.com/fwlink/?LinkId=733558
3 // for the documentation about the tasks.json format
4 "version": "2.0.0",
5 "tasks": [
6 {
7 /*
8 * This is the default cargo build task,
9 * but we need to provide a label for it,
10 * so we can invoke it from the debug launcher.
11 */
12 "label": "Cargo Build (debug)",
13 "type": "process",
14 "command": "cargo",
15 "args": ["build", "--bin", "input_capture"],
16 "problemMatcher": [
17 "$rustc"
18 ],
19 "group": {
20 "kind": "build",
21 "isDefault": true
22 }
23 },
24 {
25 "label": "Cargo Build (release)",
26 "type": "process",
27 "command": "cargo",
28 "args": ["build", "--release"],
29 "problemMatcher": [
30 "$rustc"
31 ],
32 "group": "build"
33 },
34 {
35 "label": "Cargo Clean",
36 "type": "process",
37 "command": "cargo",
38 "args": ["clean"],
39 "problemMatcher": [],
40 "group": "build"
41 },
42 ]
43}
diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml
index 5469f0cc6..64ac50818 100644
--- a/examples/stm32f4/Cargo.toml
+++ b/examples/stm32f4/Cargo.toml
@@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0"
6 6
7[dependencies] 7[dependencies]
8# Change stm32f429zi to your chip name, if necessary. 8# Change stm32f429zi to your chip name, if necessary.
9embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f446re", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } 9embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f429zi", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] }
10embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } 10embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] }
11embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } 11embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] }
12embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } 12embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
diff --git a/examples/stm32f4/openocd.cfg b/examples/stm32f4/openocd.cfg
deleted file mode 100644
index e41d52b1a..000000000
--- a/examples/stm32f4/openocd.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
1# Sample OpenOCD configuration for the STM32F3DISCOVERY development board
2
3source [find interface/stlink.cfg]
4
5source [find target/stm32f4x.cfg]
diff --git a/examples/stm32f4/openocd.gdb b/examples/stm32f4/openocd.gdb
deleted file mode 100644
index 7795319fb..000000000
--- a/examples/stm32f4/openocd.gdb
+++ /dev/null
@@ -1,40 +0,0 @@
1target extended-remote :3333
2
3# print demangled symbols
4set print asm-demangle on
5
6# set backtrace limit to not have infinite backtrace loops
7set backtrace limit 32
8
9# detect unhandled exceptions, hard faults and panics
10break DefaultHandler
11break HardFault
12break rust_begin_unwind
13# # run the next few lines so the panic message is printed immediately
14# # the number needs to be adjusted for your panic handler
15# commands $bpnum
16# next 4
17# end
18
19# *try* to stop at the user entry point (it might be gone due to inlining)
20break main
21
22monitor arm semihosting enable
23
24# # send captured ITM to the file itm.fifo
25# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
26# # 8000000 must match the core clock frequency
27# monitor tpiu config internal itm.txt uart off 8000000
28
29# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
30# # 8000000 must match the core clock frequency
31# # 2000000 is the frequency of the SWO pin
32# monitor tpiu config external uart off 8000000 2000000
33
34# # enable ITM port 0
35# monitor itm port 0 on
36
37load
38
39# start the process but immediately halt the processor
40stepi
generated by cgit (git 2.34.1) at 2026-04-05 23:33:44 +0000