fix clock in l4 rng example

1 files changed, 4 insertions, 3 deletions

diff --git a/examples/stm32l4/src/bin/rng.rs b/examples/stm32l4/src/bin/rng.rs
index 5f75c1ff1..03773e61b 100644
--- a/examples/stm32l4/src/bin/rng.rs
+++ b/examples/stm32l4/src/bin/rng.rs
@@ -12,12 +12,13 @@ use panic_probe as _;
 
 fn config() -> Config {
     let mut config = Config::default();
+    // 72Mhz clock (16 / 1 * 18 / 4)
     config.rcc.mux = ClockSrc::PLL(
         PLLSource::HSI16,
-        PLLClkDiv::Div2,
+        PLLClkDiv::Div4,
         PLLSrcDiv::Div1,
-        PLLMul::Mul8,
-        Some(PLLClkDiv::Div2),
+        PLLMul::Mul18,
+        Some(PLLClkDiv::Div6), // 48Mhz (16 / 1 * 18 / 6)
     );
     config
 }