Add minimal RCC impls for L4 and F4

3 files changed, 0 insertions, 3 deletions

diff --git a/examples/stm32f4/src/bin/spi.rs b/examples/stm32f4/src/bin/spi.rs
index af0d57412..610bb64e9 100644
--- a/examples/stm32f4/src/bin/spi.rs
+++ b/examples/stm32f4/src/bin/spi.rs
@@ -50,7 +50,6 @@ fn main() -> ! {
     let p = embassy_stm32::init(Default::default());
 
     let mut spi = Spi::new(
-        Hertz(16_000_000),
         p.SPI3,
         p.PC10,
         p.PC12,
diff --git a/examples/stm32l0/src/bin/spi.rs b/examples/stm32l0/src/bin/spi.rs
index 4eb9bfdd2..0e828c436 100644
--- a/examples/stm32l0/src/bin/spi.rs
+++ b/examples/stm32l0/src/bin/spi.rs
@@ -28,7 +28,6 @@ fn main() -> ! {
     rcc.enable_debug_wfe(&mut p.DBGMCU, true);
 
     let mut spi = Spi::new(
-        Hertz(16_000_000),
         p.SPI1,
         p.PB3,
         p.PA7,
diff --git a/examples/stm32l4/src/bin/spi.rs b/examples/stm32l4/src/bin/spi.rs
index 9db854dc3..7c672b70d 100644
--- a/examples/stm32l4/src/bin/spi.rs
+++ b/examples/stm32l4/src/bin/spi.rs
@@ -44,7 +44,6 @@ fn main() -> ! {
     let p = embassy_stm32::init(Default::default());
 
     let mut spi = Spi::new(
-        Hertz(16_000_000),
         p.SPI3,
         p.PC10,
         p.PC12,