diff options
| author | Gerzain Mata <[email protected]> | 2025-07-25 18:57:27 -0700 |
|---|---|---|
| committer | Gerzain Mata <[email protected]> | 2025-07-25 18:59:10 -0700 |
| commit | a5e8891fe315e2ee84992d94bd7f7d5b7710cce6 (patch) | |
| tree | 84de7eac12d3b6abeb920f5bd0f040bbe7501157 /examples | |
| parent | 996974e313fa5ec2c7c2d9dd0998fab244c0a180 (diff) | |
Added support for PLL as a clock source on STM32WBA
- PLL multiplier and dividers work
- Added timer example
Diffstat (limited to 'examples')
| -rw-r--r-- | examples/stm32wba/src/bin/pwm.rs | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/examples/stm32wba/src/bin/pwm.rs b/examples/stm32wba/src/bin/pwm.rs new file mode 100644 index 000000000..54d223d34 --- /dev/null +++ b/examples/stm32wba/src/bin/pwm.rs | |||
| @@ -0,0 +1,65 @@ | |||
| 1 | #![no_std] | ||
| 2 | #![no_main] | ||
| 3 | |||
| 4 | use defmt::*; | ||
| 5 | use defmt_rtt as _; // global logger | ||
| 6 | use embassy_executor::Spawner; | ||
| 7 | use embassy_stm32::gpio::OutputType; | ||
| 8 | use embassy_stm32::rcc::{mux, AHB5Prescaler, AHBPrescaler, APBPrescaler, Sysclk, VoltageScale}; | ||
| 9 | use embassy_stm32::rcc::{PllDiv, PllMul, PllPreDiv, PllSource}; | ||
| 10 | use embassy_stm32::time::khz; | ||
| 11 | use embassy_stm32::timer::simple_pwm::{PwmPin, SimplePwm}; | ||
| 12 | use embassy_stm32::Config; | ||
| 13 | use embassy_time::Timer; | ||
| 14 | use panic_probe as _; | ||
| 15 | |||
| 16 | #[embassy_executor::main] | ||
| 17 | async fn main(_spawner: Spawner) { | ||
| 18 | info!("Hello World!"); | ||
| 19 | |||
| 20 | let mut config = Config::default(); | ||
| 21 | // Fine-tune PLL1 dividers/multipliers | ||
| 22 | config.rcc.pll1 = Some(embassy_stm32::rcc::Pll { | ||
| 23 | source: PllSource::HSI, | ||
| 24 | prediv: PllPreDiv::DIV1, // PLLM = 1 → HSI / 1 = 16 MHz | ||
| 25 | mul: PllMul::MUL30, // PLLN = 30 → 16 MHz * 30 = 480 MHz VCO | ||
| 26 | divr: Some(PllDiv::DIV5), // PLLR = 5 → 96 MHz (Sysclk) | ||
| 27 | // divq: Some(PllDiv::DIV10), // PLLQ = 10 → 48 MHz (NOT USED) | ||
| 28 | divq: None, | ||
| 29 | divp: Some(PllDiv::DIV30), // PLLP = 30 → 16 MHz (USBOTG) | ||
| 30 | frac: Some(0), // Fractional part (enabled) | ||
| 31 | }); | ||
| 32 | |||
| 33 | config.rcc.ahb_pre = AHBPrescaler::DIV1; | ||
| 34 | config.rcc.apb1_pre = APBPrescaler::DIV1; | ||
| 35 | config.rcc.apb2_pre = APBPrescaler::DIV1; | ||
| 36 | config.rcc.apb7_pre = APBPrescaler::DIV1; | ||
| 37 | config.rcc.ahb5_pre = AHB5Prescaler::DIV4; | ||
| 38 | |||
| 39 | // voltage scale for max performance | ||
| 40 | config.rcc.voltage_scale = VoltageScale::RANGE1; | ||
| 41 | // route PLL1_P into the USB‐OTG‐HS block | ||
| 42 | config.rcc.mux.otghssel = mux::Otghssel::PLL1_P; | ||
| 43 | config.rcc.sys = Sysclk::PLL1_R; | ||
| 44 | |||
| 45 | let p = embassy_stm32::init(config); | ||
| 46 | |||
| 47 | let ch1_pin = PwmPin::new(p.PA2, OutputType::PushPull); | ||
| 48 | let mut pwm = SimplePwm::new(p.TIM3, Some(ch1_pin), None, None, None, khz(10), Default::default()); | ||
| 49 | let mut ch1 = pwm.ch1(); | ||
| 50 | ch1.enable(); | ||
| 51 | |||
| 52 | info!("PWM initialized"); | ||
| 53 | info!("PWM max duty {}", ch1.max_duty_cycle()); | ||
| 54 | |||
| 55 | loop { | ||
| 56 | ch1.set_duty_cycle_fully_off(); | ||
| 57 | Timer::after_millis(300).await; | ||
| 58 | ch1.set_duty_cycle_fraction(1, 4); | ||
| 59 | Timer::after_millis(300).await; | ||
| 60 | ch1.set_duty_cycle_fraction(1, 2); | ||
| 61 | Timer::after_millis(300).await; | ||
| 62 | ch1.set_duty_cycle(ch1.max_duty_cycle() - 1); | ||
| 63 | Timer::after_millis(300).await; | ||
| 64 | } | ||
| 65 | } | ||
