Rework how sequences ADC are specified. Update documentation in g4. Carefully chose which methods to expose publicly

3 files changed, 26 insertions, 13 deletions

diff --git a/examples/stm32g4/.cargo/config.toml b/examples/stm32g4/.cargo/config.toml
index de3e5718e..52b5a7bc8 100644
--- a/examples/stm32g4/.cargo/config.toml
+++ b/examples/stm32g4/.cargo/config.toml
@@ -1,9 +1,21 @@
 [target.'cfg(all(target_arch = "arm", target_os = "none"))']
-# replace STM32G071C8Rx with your chip as listed in `probe-rs chip list`
-runner = "probe-rs run --chip STM32G484VETx"
+# Change this runner as required for your MCU.
+runner = [
+    "probe-rs",
+    "run",
+    "--chip",
+    "STM32G431VBTx",
+    "--speed",
+    "5000",
+    "--preverify",
+    "--log-format",
+    "{t} [{L}] {s}",
+]
+
 
 [build]
-target = "thumbv7em-none-eabi"
+target = "thumbv7em-none-eabihf"
 
 [env]
-DEFMT_LOG = "trace"
\ No newline at end of file
+DEFMT_LOG = "info"
+DEFMT_RTT_BUFFER_SIZE = "4096"
diff --git a/examples/stm32g4/Cargo.toml b/examples/stm32g4/Cargo.toml
index 8bbeb594c..9089ec0d5 100644
--- a/examples/stm32g4/Cargo.toml
+++ b/examples/stm32g4/Cargo.toml
@@ -7,7 +7,7 @@ publish = false
 
 [dependencies]
 # Change stm32g491re to your chip name, if necessary.
-embassy-stm32 = { path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32g491re", "memory-x", "unstable-pac", "exti"]  }
+embassy-stm32 = { path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32g431vb", "memory-x", "unstable-pac", "exti"]  }
 embassy-sync = { path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
diff --git a/examples/stm32g4/src/bin/adc_injected_and_regular.rs b/examples/stm32g4/src/bin/adc_injected_and_regular.rs
index d0c577b4b..c929ca3bf 100644
--- a/examples/stm32g4/src/bin/adc_injected_and_regular.rs
+++ b/examples/stm32g4/src/bin/adc_injected_and_regular.rs
@@ -18,9 +18,9 @@ use embassy_stm32::timer::complementary_pwm::{ComplementaryPwm, Mms2};
 use embassy_stm32::timer::low_level::CountingMode;
 use embassy_stm32::{Config, interrupt};
 use embassy_sync::blocking_mutex::CriticalSectionMutex;
-use {critical_section, defmt_rtt as _, panic_probe as _};
+use {defmt_rtt as _, panic_probe as _};
 
-static ADC1_HANDLE: CriticalSectionMutex<RefCell<Option<InjectedAdc<ADC1>>>> =
+static ADC1_HANDLE: CriticalSectionMutex<RefCell<Option<InjectedAdc<ADC1, 1>>>> =
     CriticalSectionMutex::new(RefCell::new(None));
 
 /// This example showcases how to use both regular ADC conversions with DMA and injected ADC
@@ -78,17 +78,17 @@ async fn main(_spawner: embassy_executor::Spawner) {
     // Configure regular conversions with DMA
     let adc1 = Adc::new(p.ADC1);
 
-    let mut vrefint_channel = adc1.enable_vrefint().degrade_adc();
-    let mut pa0 = p.PC1.degrade_adc();
+    let vrefint_channel = adc1.enable_vrefint().degrade_adc();
+    let pa0 = p.PC1.degrade_adc();
     let regular_sequence = [
-        (&mut vrefint_channel, SampleTime::CYCLES247_5),
-        (&mut pa0, SampleTime::CYCLES247_5),
+        (vrefint_channel, SampleTime::CYCLES247_5),
+        (pa0, SampleTime::CYCLES247_5),
     ]
     .into_iter();
 
     // Configurations of Injected ADC measurements
-    let mut pa2 = p.PA2.degrade_adc();
-    let injected_sequence = [(&mut pa2, SampleTime::CYCLES247_5)].into_iter();
+    let pa2 = p.PA2.degrade_adc();
+    let injected_sequence = [(pa2, SampleTime::CYCLES247_5)];
 
     // Configure DMA for retrieving regular ADC measurements
     let dma1_ch1 = p.DMA1_CH1;
@@ -111,6 +111,7 @@ async fn main(_spawner: embassy_executor::Spawner) {
         RegularConversionMode::Triggered(regular_trigger),
         injected_sequence,
         injected_trigger,
+        true,
     );
 
     // Store ADC globally to allow access from ADC interrupt