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| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2022-11-21 23:58:28 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2022-11-21 23:58:28 +0000 |
| commit | b8f51c64964c3f1b02635a1a130fa022793cd3c9 (patch) | |
| tree | f6ae329d47e3374cabe0172dcf77fe8896eba95e /examples | |
| parent | 15b4ed2c672a853cf9bb5cfb8aae323430de0c67 (diff) | |
| parent | 551b54ddcbb104f881a3333215f4a828b33d029a (diff) | |
Merge #1057
1057: stm32g0: Fix ADC for channels above 14 r=Dirbaio a=jaxter184
using the CHSELR register in sequence mode does not support ADC channels above 14. Also, it seems like the sequencer itself wasn't being used anyway, so I turned it off (maybe the whole block from L72..L76 could be removed?) and used a bit shift.
Co-authored-by: Jaxter Kim <[email protected]>
Diffstat (limited to 'examples')
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