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authorxoviat <[email protected]>2023-10-17 20:31:44 -0500
committerxoviat <[email protected]>2023-10-17 20:31:44 -0500
commitbbd12c9372049e3d586b1738642c768849d42471 (patch)
tree80124a4757982e2239dc3767cb07977bcc66342d /examples
parentd94b9fe6fb6adee82c1427e72450f77a0d0973c3 (diff)
stm32: update metapac
Diffstat (limited to 'examples')
-rw-r--r--examples/stm32l4/src/bin/rng.rs2
-rw-r--r--examples/stm32l4/src/bin/rtc.rs2
-rw-r--r--examples/stm32l4/src/bin/spe_adin1110_http_server.rs2
-rw-r--r--examples/stm32l4/src/bin/usb_serial.rs2
-rw-r--r--examples/stm32l5/src/bin/rng.rs4
-rw-r--r--examples/stm32l5/src/bin/usb_ethernet.rs4
-rw-r--r--examples/stm32l5/src/bin/usb_hid_mouse.rs4
-rw-r--r--examples/stm32l5/src/bin/usb_serial.rs4
8 files changed, 12 insertions, 12 deletions
diff --git a/examples/stm32l4/src/bin/rng.rs b/examples/stm32l4/src/bin/rng.rs
index 49ae15e6b..d8a4e825f 100644
--- a/examples/stm32l4/src/bin/rng.rs
+++ b/examples/stm32l4/src/bin/rng.rs
@@ -16,7 +16,7 @@ bind_interrupts!(struct Irqs {
16#[embassy_executor::main] 16#[embassy_executor::main]
17async fn main(_spawner: Spawner) { 17async fn main(_spawner: Spawner) {
18 let mut config = Config::default(); 18 let mut config = Config::default();
19 config.rcc.mux = ClockSrc::PLL; 19 config.rcc.mux = ClockSrc::PLL1_R;
20 config.rcc.hsi16 = true; 20 config.rcc.hsi16 = true;
21 config.rcc.pll = Some(Pll { 21 config.rcc.pll = Some(Pll {
22 source: PLLSource::HSI, 22 source: PLLSource::HSI,
diff --git a/examples/stm32l4/src/bin/rtc.rs b/examples/stm32l4/src/bin/rtc.rs
index a1b41f84a..fec0a349d 100644
--- a/examples/stm32l4/src/bin/rtc.rs
+++ b/examples/stm32l4/src/bin/rtc.rs
@@ -15,7 +15,7 @@ use {defmt_rtt as _, panic_probe as _};
15#[embassy_executor::main] 15#[embassy_executor::main]
16async fn main(_spawner: Spawner) { 16async fn main(_spawner: Spawner) {
17 let mut config = Config::default(); 17 let mut config = Config::default();
18 config.rcc.mux = ClockSrc::PLL; 18 config.rcc.mux = ClockSrc::PLL1_R;
19 config.rcc.hse = Some(Hertz::mhz(8)); 19 config.rcc.hse = Some(Hertz::mhz(8));
20 config.rcc.pll = Some(Pll { 20 config.rcc.pll = Some(Pll {
21 source: PLLSource::HSE, 21 source: PLLSource::HSE,
diff --git a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
index 278d65438..3c9d2cfc0 100644
--- a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
+++ b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
@@ -77,7 +77,7 @@ async fn main(spawner: Spawner) {
77 77
78 // 80Mhz clock (Source: 8 / SrcDiv: 1 * PLLMul 20 / ClkDiv 2) 78 // 80Mhz clock (Source: 8 / SrcDiv: 1 * PLLMul 20 / ClkDiv 2)
79 // 80MHz highest frequency for flash 0 wait. 79 // 80MHz highest frequency for flash 0 wait.
80 config.rcc.mux = ClockSrc::PLL; 80 config.rcc.mux = ClockSrc::PLL1_R;
81 config.rcc.hse = Some(Hertz::mhz(8)); 81 config.rcc.hse = Some(Hertz::mhz(8));
82 config.rcc.pll = Some(Pll { 82 config.rcc.pll = Some(Pll {
83 source: PLLSource::HSE, 83 source: PLLSource::HSE,
diff --git a/examples/stm32l4/src/bin/usb_serial.rs b/examples/stm32l4/src/bin/usb_serial.rs
index 34361d112..282476547 100644
--- a/examples/stm32l4/src/bin/usb_serial.rs
+++ b/examples/stm32l4/src/bin/usb_serial.rs
@@ -24,7 +24,7 @@ async fn main(_spawner: Spawner) {
24 24
25 let mut config = Config::default(); 25 let mut config = Config::default();
26 config.rcc.hsi48 = true; 26 config.rcc.hsi48 = true;
27 config.rcc.mux = ClockSrc::PLL; 27 config.rcc.mux = ClockSrc::PLL1_R;
28 config.rcc.hsi16 = true; 28 config.rcc.hsi16 = true;
29 config.rcc.pll = Some(Pll { 29 config.rcc.pll = Some(Pll {
30 source: PLLSource::HSI, 30 source: PLLSource::HSI,
diff --git a/examples/stm32l5/src/bin/rng.rs b/examples/stm32l5/src/bin/rng.rs
index e6233dbe6..b57f438ff 100644
--- a/examples/stm32l5/src/bin/rng.rs
+++ b/examples/stm32l5/src/bin/rng.rs
@@ -17,10 +17,10 @@ bind_interrupts!(struct Irqs {
17async fn main(_spawner: Spawner) { 17async fn main(_spawner: Spawner) {
18 let mut config = Config::default(); 18 let mut config = Config::default();
19 config.rcc.hsi16 = true; 19 config.rcc.hsi16 = true;
20 config.rcc.mux = ClockSrc::PLL; 20 config.rcc.mux = ClockSrc::PLL1_R;
21 config.rcc.pll = Some(Pll { 21 config.rcc.pll = Some(Pll {
22 // 64Mhz clock (16 / 1 * 8 / 2) 22 // 64Mhz clock (16 / 1 * 8 / 2)
23 source: PLLSource::HSI16, 23 source: PLLSource::HSI,
24 prediv: PllPreDiv::DIV1, 24 prediv: PllPreDiv::DIV1,
25 mul: PllMul::MUL8, 25 mul: PllMul::MUL8,
26 divp: None, 26 divp: None,
diff --git a/examples/stm32l5/src/bin/usb_ethernet.rs b/examples/stm32l5/src/bin/usb_ethernet.rs
index baa86640e..bbe44642b 100644
--- a/examples/stm32l5/src/bin/usb_ethernet.rs
+++ b/examples/stm32l5/src/bin/usb_ethernet.rs
@@ -46,10 +46,10 @@ async fn net_task(stack: &'static Stack<Device<'static, MTU>>) -> ! {
46async fn main(spawner: Spawner) { 46async fn main(spawner: Spawner) {
47 let mut config = Config::default(); 47 let mut config = Config::default();
48 config.rcc.hsi16 = true; 48 config.rcc.hsi16 = true;
49 config.rcc.mux = ClockSrc::PLL; 49 config.rcc.mux = ClockSrc::PLL1_R;
50 config.rcc.pll = Some(Pll { 50 config.rcc.pll = Some(Pll {
51 // 80Mhz clock (16 / 1 * 10 / 2) 51 // 80Mhz clock (16 / 1 * 10 / 2)
52 source: PLLSource::HSI16, 52 source: PLLSource::HSI,
53 prediv: PllPreDiv::DIV1, 53 prediv: PllPreDiv::DIV1,
54 mul: PllMul::MUL10, 54 mul: PllMul::MUL10,
55 divp: None, 55 divp: None,
diff --git a/examples/stm32l5/src/bin/usb_hid_mouse.rs b/examples/stm32l5/src/bin/usb_hid_mouse.rs
index 1ce7e3e49..44e29ee9c 100644
--- a/examples/stm32l5/src/bin/usb_hid_mouse.rs
+++ b/examples/stm32l5/src/bin/usb_hid_mouse.rs
@@ -23,10 +23,10 @@ bind_interrupts!(struct Irqs {
23async fn main(_spawner: Spawner) { 23async fn main(_spawner: Spawner) {
24 let mut config = Config::default(); 24 let mut config = Config::default();
25 config.rcc.hsi16 = true; 25 config.rcc.hsi16 = true;
26 config.rcc.mux = ClockSrc::PLL; 26 config.rcc.mux = ClockSrc::PLL1_R;
27 config.rcc.pll = Some(Pll { 27 config.rcc.pll = Some(Pll {
28 // 80Mhz clock (16 / 1 * 10 / 2) 28 // 80Mhz clock (16 / 1 * 10 / 2)
29 source: PLLSource::HSI16, 29 source: PLLSource::HSI,
30 prediv: PllPreDiv::DIV1, 30 prediv: PllPreDiv::DIV1,
31 mul: PllMul::MUL10, 31 mul: PllMul::MUL10,
32 divp: None, 32 divp: None,
diff --git a/examples/stm32l5/src/bin/usb_serial.rs b/examples/stm32l5/src/bin/usb_serial.rs
index 03d277a22..612b891ac 100644
--- a/examples/stm32l5/src/bin/usb_serial.rs
+++ b/examples/stm32l5/src/bin/usb_serial.rs
@@ -21,10 +21,10 @@ bind_interrupts!(struct Irqs {
21async fn main(_spawner: Spawner) { 21async fn main(_spawner: Spawner) {
22 let mut config = Config::default(); 22 let mut config = Config::default();
23 config.rcc.hsi16 = true; 23 config.rcc.hsi16 = true;
24 config.rcc.mux = ClockSrc::PLL; 24 config.rcc.mux = ClockSrc::PLL1_R;
25 config.rcc.pll = Some(Pll { 25 config.rcc.pll = Some(Pll {
26 // 80Mhz clock (16 / 1 * 10 / 2) 26 // 80Mhz clock (16 / 1 * 10 / 2)
27 source: PLLSource::HSI16, 27 source: PLLSource::HSI,
28 prediv: PllPreDiv::DIV1, 28 prediv: PllPreDiv::DIV1,
29 mul: PllMul::MUL10, 29 mul: PllMul::MUL10,
30 divp: None, 30 divp: None,