aboutsummaryrefslogtreecommitdiff
path: root/examples
diff options
context:
space:
mode:
authorBob McWhirter <[email protected]>2021-06-08 10:36:47 -0400
committerBob McWhirter <[email protected]>2021-06-08 10:37:11 -0400
commitcf3c021c3745c3f555b650f019fd8b1d4982443b (patch)
treeb91651e5af61fd57b591df4e4c15ffe74f58751e /examples
parentb8690e5f5d7b6996e833e9866629f298f88289fe (diff)
Initial examples for STM32L4+
Diffstat (limited to 'examples')
-rw-r--r--examples/stm32l4/.cargo/config.toml21
-rw-r--r--examples/stm32l4/memory.x4
-rw-r--r--examples/stm32l4/src/bin/button.rs58
-rw-r--r--examples/stm32l4/src/bin/button_exti.rs84
-rw-r--r--examples/stm32l4/src/bin/spi.rs65
5 files changed, 230 insertions, 2 deletions
diff --git a/examples/stm32l4/.cargo/config.toml b/examples/stm32l4/.cargo/config.toml
new file mode 100644
index 000000000..19ea6f560
--- /dev/null
+++ b/examples/stm32l4/.cargo/config.toml
@@ -0,0 +1,21 @@
1[unstable]
2build-std = ["core"]
3
4[target.'cfg(all(target_arch = "arm", target_os = "none"))']
5# replace STM32F429ZITx with your chip as listed in `probe-run --list-chips`
6runner = "probe-run --chip STM32L4S5VI"
7
8rustflags = [
9 # LLD (shipped with the Rust toolchain) is used as the default linker
10 "-C", "link-arg=--nmagic",
11 "-C", "link-arg=-Tlink.x",
12 "-C", "link-arg=-Tdefmt.x",
13
14 # Code-size optimizations.
15 "-Z", "trap-unreachable=no",
16 "-C", "inline-threshold=5",
17 "-C", "no-vectorize-loops",
18]
19
20[build]
21target = "thumbv7em-none-eabi"
diff --git a/examples/stm32l4/memory.x b/examples/stm32l4/memory.x
index 22618dfbc..eb87d1b54 100644
--- a/examples/stm32l4/memory.x
+++ b/examples/stm32l4/memory.x
@@ -2,6 +2,6 @@ MEMORY
2{ 2{
3 /* NOTE 1 K = 1 KiBi = 1024 bytes */ 3 /* NOTE 1 K = 1 KiBi = 1024 bytes */
4 /* These values correspond to the STM32L4S5 */ 4 /* These values correspond to the STM32L4S5 */
5 FLASH : ORIGIN = 0x08000000, LENGTH = 2048K 5 FLASH : ORIGIN = 0x08000000, LENGTH = 1024K
6 RAM : ORIGIN = 0x20000000, LENGTH = 640K 6 RAM : ORIGIN = 0x20000000, LENGTH = 128K
7} 7}
diff --git a/examples/stm32l4/src/bin/button.rs b/examples/stm32l4/src/bin/button.rs
new file mode 100644
index 000000000..43d81715a
--- /dev/null
+++ b/examples/stm32l4/src/bin/button.rs
@@ -0,0 +1,58 @@
1#![no_std]
2#![no_main]
3#![feature(trait_alias)]
4#![feature(min_type_alias_impl_trait)]
5#![feature(impl_trait_in_bindings)]
6#![feature(type_alias_impl_trait)]
7#![allow(incomplete_features)]
8
9#[path = "../example_common.rs"]
10mod example_common;
11use embassy_stm32::gpio::{Input, Level, Output, Pull};
12use embedded_hal::digital::v2::{InputPin, OutputPin};
13use example_common::*;
14
15use cortex_m_rt::entry;
16use stm32l4::stm32l4x5 as pac;
17
18
19#[entry]
20fn main() -> ! {
21 info!("Hello World!");
22
23 let pp = pac::Peripherals::take().unwrap();
24
25 pp.DBGMCU.cr.modify(|_, w| {
26 w.dbg_sleep().set_bit();
27 w.dbg_standby().set_bit();
28 w.dbg_stop().set_bit()
29 });
30
31 pp.RCC.ahb2enr.modify(|_, w| {
32 w.gpioaen().set_bit();
33 w.gpioben().set_bit();
34 w.gpiocen().set_bit();
35 w.gpioden().set_bit();
36 w.gpioeen().set_bit();
37 w.gpiofen().set_bit();
38 w
39 });
40
41 let p = embassy_stm32::init(Default::default());
42
43 let button = Input::new(p.PC13, Pull::Up);
44 let mut led1 = Output::new(p.PA5, Level::High);
45 let mut led2 = Output::new(p.PB14, Level::High);
46
47 loop {
48 if button.is_high().unwrap() {
49 info!("high");
50 led1.set_high().unwrap();
51 led2.set_low().unwrap();
52 } else {
53 info!("low");
54 led1.set_low().unwrap();
55 led2.set_high().unwrap();
56 }
57 }
58}
diff --git a/examples/stm32l4/src/bin/button_exti.rs b/examples/stm32l4/src/bin/button_exti.rs
new file mode 100644
index 000000000..caace8359
--- /dev/null
+++ b/examples/stm32l4/src/bin/button_exti.rs
@@ -0,0 +1,84 @@
1#![no_std]
2#![no_main]
3#![feature(trait_alias)]
4#![feature(min_type_alias_impl_trait)]
5#![feature(impl_trait_in_bindings)]
6#![feature(type_alias_impl_trait)]
7#![allow(incomplete_features)]
8
9#[path = "../example_common.rs"]
10mod example_common;
11use embassy::executor::Executor;
12use embassy::time::Clock;
13use embassy::util::Forever;
14use embassy_stm32::exti::ExtiInput;
15use embassy_stm32::gpio::{Input, Pull};
16use embassy_traits::gpio::{WaitForFallingEdge, WaitForRisingEdge};
17use example_common::*;
18
19use cortex_m_rt::entry;
20use stm32l4::stm32l4x5 as pac;
21
22#[embassy::task]
23async fn main_task() {
24 let p = embassy_stm32::init(Default::default());
25
26 let button = Input::new(p.PC13, Pull::Up);
27 let mut button = ExtiInput::new(button, p.EXTI13);
28
29 info!("Press the USER button...");
30
31 loop {
32 button.wait_for_falling_edge().await;
33 info!("Pressed!");
34 button.wait_for_rising_edge().await;
35 info!("Released!");
36 }
37}
38
39struct ZeroClock;
40
41impl Clock for ZeroClock {
42 fn now(&self) -> u64 {
43 0
44 }
45}
46
47static EXECUTOR: Forever<Executor> = Forever::new();
48
49#[entry]
50fn main() -> ! {
51 info!("Hello World!");
52
53 let pp = pac::Peripherals::take().unwrap();
54
55 pp.DBGMCU.cr.modify(|_, w| {
56 w.dbg_sleep().set_bit();
57 w.dbg_standby().set_bit();
58 w.dbg_stop().set_bit()
59 });
60
61 pp.RCC.ahb2enr.modify(|_, w| {
62 w.gpioaen().set_bit();
63 w.gpioben().set_bit();
64 w.gpiocen().set_bit();
65 w.gpioden().set_bit();
66 w.gpioeen().set_bit();
67 w.gpiofen().set_bit();
68 w
69 });
70
71 pp.RCC.apb2enr.modify(|_, w| {
72 w.syscfgen().set_bit();
73 w
74 });
75
76 unsafe { embassy::time::set_clock(&ZeroClock) };
77
78 let executor = EXECUTOR.put(Executor::new());
79
80 executor.run(|spawner| {
81 unwrap!(spawner.spawn(main_task()));
82 })
83
84}
diff --git a/examples/stm32l4/src/bin/spi.rs b/examples/stm32l4/src/bin/spi.rs
new file mode 100644
index 000000000..9db854dc3
--- /dev/null
+++ b/examples/stm32l4/src/bin/spi.rs
@@ -0,0 +1,65 @@
1#![no_std]
2#![no_main]
3#![feature(trait_alias)]
4#![feature(min_type_alias_impl_trait)]
5#![feature(impl_trait_in_bindings)]
6#![feature(type_alias_impl_trait)]
7#![allow(incomplete_features)]
8
9#[path = "../example_common.rs"]
10mod example_common;
11
12use embassy_stm32::gpio::{Level, Output};
13use embedded_hal::digital::v2::OutputPin;
14use example_common::*;
15
16use cortex_m_rt::entry;
17use embassy_stm32::spi::{Config, Spi};
18use embassy_stm32::time::Hertz;
19use embedded_hal::blocking::spi::Transfer;
20use stm32l4::stm32l4x5 as pac;
21
22#[entry]
23fn main() -> ! {
24 info!("Hello World, dude!");
25
26 let pp = pac::Peripherals::take().unwrap();
27
28 pp.DBGMCU.cr.modify(|_, w| {
29 w.dbg_sleep().set_bit();
30 w.dbg_standby().set_bit();
31 w.dbg_stop().set_bit()
32 });
33
34 pp.RCC.ahb2enr.modify(|_, w| {
35 w.gpioaen().set_bit();
36 w.gpioben().set_bit();
37 w.gpiocen().set_bit();
38 w.gpioden().set_bit();
39 w.gpioeen().set_bit();
40 w.gpiofen().set_bit();
41 w
42 });
43
44 let p = embassy_stm32::init(Default::default());
45
46 let mut spi = Spi::new(
47 Hertz(16_000_000),
48 p.SPI3,
49 p.PC10,
50 p.PC12,
51 p.PC11,
52 Hertz(1_000_000),
53 Config::default(),
54 );
55
56 let mut cs = Output::new(p.PE0, Level::High);
57
58 loop {
59 let mut buf = [0x0A; 4];
60 unwrap!(cs.set_low());
61 unwrap!(spi.transfer(&mut buf));
62 unwrap!(cs.set_high());
63 info!("xfer {=[u8]:x}", buf);
64 }
65}