feat(dma): add DMA driver with 10 verified examples

Initial DMA driver implementation for MCXA276 with:

Core DMA Features:
- DmaChannel type with ownership tracking via Channel trait
- Transfer, RingBuffer, and ScatterGatherBuilder abstractions
- Support for mem-to-mem, mem-to-peripheral, peripheral-to-mem transfers
- Interrupt-driven completion with embassy async/await integration
- Word size abstraction (u8, u16, u32) via Word trait

LPUART DMA Integration:
- LpuartTxDma and LpuartRxDma drivers for async UART with DMA
- LpuartDma combined TX/RX driver
- Automatic chunking for buffers > 0x7FFF bytes
- DMA guards with Drop impl for safe cancellation

10 Verified Examples:
- dma_mem2mem: Basic memory-to-memory copy
- dma_memset: Memory fill with pattern
- dma_uart_tx: UART transmit via DMA
- dma_uart_rx: UART receive via DMA
- dma_uart_loopback: Combined TX/RX loopback test
- dma_scatter_gather: Linked descriptor chains
- dma_channel_linking: Major/minor loop channel linking
- dma_ring_buffer: Circular buffer for continuous streaming
- dma_ping_pong: Double-buffering pattern
- dma_software_trigger: Manual transfer triggering

PR Feedback Addressed:
- Use PAC accessor for LPUART DATA register instead of manual offset
- Add EnableInterrupt enum to replace boolean parameter for readability
- Add DMA guards with Drop impl for safe async cancellation
- Automatic chunking for large buffers instead of returning error
- Use NonNull<[W]> + PhantomData for RingBuffer (DMA acts like separate thread)
- Remove edma parameter from all methods (single eDMA instance steals ptr internally)
- Make edma_tcd() non-public (HAL should not expose PAC items)

1 files changed, 1 insertions, 1 deletions

diff --git a/src/interrupt.rs b/src/interrupt.rs
index 0490e3a66..000b2f9cd 100644
--- a/src/interrupt.rs
+++ b/src/interrupt.rs
@@ -9,7 +9,7 @@
 mod generated {
     embassy_hal_internal::interrupt_mod!(
         OS_EVENT, RTC, ADC1, GPIO0, GPIO1, GPIO2, GPIO3, GPIO4, LPI2C0, LPI2C1, LPI2C2, LPI2C3, LPUART0, LPUART1,
-        LPUART2, LPUART3, LPUART4, LPUART5,
+        LPUART2, LPUART3, LPUART4, LPUART5, DMA_CH0, DMA_CH1, DMA_CH2, DMA_CH3, DMA_CH4, DMA_CH5, DMA_CH6, DMA_CH7,
     );
 }