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authorFelipe Balbi <[email protected]>2025-11-18 12:16:14 -0800
committerGitHub <[email protected]>2025-11-18 12:16:14 -0800
commitffe3e5acae6c0038db4176dc7d031b57f865e07f (patch)
treef69475bd7f177ad2ceb69d77ea02a408e5bf6ef7 /src/lib.rs
parente07497690faf1c8a14229183f4054f96832b1d5d (diff)
Correct gpio driver (#9)
* Correct gpio driver Signed-off-by: Felipe Balbi <[email protected]> * Simplify blinky example Make it look like every other HAL for consistency. While at that, also rename the example to match the name used by other HALs. Signed-off-by: Felipe Balbi <[email protected]> * Add some documentation to GPIO driver Signed-off-by: Felipe Balbi <[email protected]> * Enable GPIO clocks during HAL initialization Provide the user with working GPIO clocks. Signed-off-by: Felipe Balbi <[email protected]> --------- Signed-off-by: Felipe Balbi <[email protected]> Co-authored-by: Felipe Balbi <[email protected]>
Diffstat (limited to 'src/lib.rs')
-rw-r--r--src/lib.rs315
1 files changed, 313 insertions, 2 deletions
diff --git a/src/lib.rs b/src/lib.rs
index 86c0dc45b..c885ecc50 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -14,7 +14,301 @@ pub mod lpuart;
14pub mod ostimer; 14pub mod ostimer;
15pub mod rtc; 15pub mod rtc;
16 16
17embassy_hal_internal::peripherals!(PORT1, PORT2, PORT3, LPUART2, OSTIMER0, GPIO, PIO2_2, PIO2_3, GPIO3, RTC0, ADC1,); 17#[rustfmt::skip]
18embassy_hal_internal::peripherals!(
19 ADC0,
20 ADC1,
21
22 AOI0,
23 AOI1,
24
25 CAN0,
26 CAN1,
27
28 CDOG0,
29 CDOG1,
30
31 CMC,
32 CMP0,
33 CMP1,
34 CRC0,
35
36 CTIMER0,
37 CTIMER1,
38 CTIMER2,
39 CTIMER3,
40 CTIMER4,
41
42 DBGMAILBOX,
43 DMA0,
44 EDMA0_TCD0,
45 EIM0,
46 EQDC0,
47 EQDC1,
48 ERM0,
49 FLEXIO0,
50 FLEXPWM0,
51 FLEXPWM1,
52 FMC0,
53 FMU0,
54 FREQME0,
55 GLIKEY0,
56
57 GPIO0,
58 GPIO1,
59 GPIO2,
60 GPIO3,
61 GPIO4,
62
63 I3C0,
64 INPUTMUX0,
65
66 LPI2C0,
67 LPI2C1,
68 LPI2C2,
69 LPI2C3,
70
71 LPSPI0,
72 LPSPI1,
73
74 LPTMR0,
75
76 LPUART0,
77 LPUART1,
78 LPUART2,
79 LPUART3,
80 LPUART4,
81
82 MAU0,
83 MBC0,
84 MRCC0,
85 OPAMP0,
86 OSTIMER0,
87
88 P0_0,
89 P0_1,
90 P0_2,
91 P0_3,
92 P0_4,
93 P0_5,
94 P0_6,
95 P0_7,
96 P0_8,
97 P0_9,
98 P0_10,
99 P0_11,
100 P0_12,
101 P0_13,
102 P0_14,
103 P0_15,
104 P0_16,
105 P0_17,
106 P0_18,
107 P0_19,
108 P0_20,
109 P0_21,
110 P0_22,
111 P0_23,
112 P0_24,
113 P0_25,
114 P0_26,
115 P0_27,
116 P0_28,
117 P0_29,
118 P0_30,
119 P0_31,
120
121 P1_0,
122 P1_1,
123 P1_2,
124 P1_3,
125 P1_4,
126 P1_5,
127 P1_6,
128 P1_7,
129 P1_8,
130 P1_9,
131 P1_10,
132 P1_11,
133 P1_12,
134 P1_13,
135 P1_14,
136 P1_15,
137 P1_16,
138 P1_17,
139 P1_18,
140 P1_19,
141 P1_20,
142 P1_21,
143 P1_22,
144 P1_23,
145 P1_24,
146 P1_25,
147 P1_26,
148 P1_27,
149 P1_28,
150 P1_29,
151 P1_30,
152 P1_31,
153
154 P2_0,
155 P2_1,
156 P2_2,
157 P2_3,
158 P2_4,
159 P2_5,
160 P2_6,
161 P2_7,
162 P2_8,
163 P2_9,
164 P2_10,
165 P2_11,
166 P2_12,
167 P2_13,
168 P2_14,
169 P2_15,
170 P2_16,
171 P2_17,
172 P2_18,
173 P2_19,
174 P2_20,
175 P2_21,
176 P2_22,
177 P2_23,
178 P2_24,
179 P2_25,
180 P2_26,
181 P2_27,
182 P2_28,
183 P2_29,
184 P2_30,
185 P2_31,
186
187 P3_0,
188 P3_1,
189 P3_2,
190 P3_3,
191 P3_4,
192 P3_5,
193 P3_6,
194 P3_7,
195 P3_8,
196 P3_9,
197 P3_10,
198 P3_11,
199 P3_12,
200 P3_13,
201 P3_14,
202 P3_15,
203 P3_16,
204 P3_17,
205 P3_18,
206 P3_19,
207 P3_20,
208 P3_21,
209 P3_22,
210 P3_23,
211 P3_24,
212 P3_25,
213 P3_26,
214 P3_27,
215 P3_28,
216 P3_29,
217 P3_30,
218 P3_31,
219
220 P4_0,
221 P4_1,
222 P4_2,
223 P4_3,
224 P4_4,
225 P4_5,
226 P4_6,
227 P4_7,
228 P4_8,
229 P4_9,
230 P4_10,
231 P4_11,
232 P4_12,
233 P4_13,
234 P4_14,
235 P4_15,
236 P4_16,
237 P4_17,
238 P4_18,
239 P4_19,
240 P4_20,
241 P4_21,
242 P4_22,
243 P4_23,
244 P4_24,
245 P4_25,
246 P4_26,
247 P4_27,
248 P4_28,
249 P4_29,
250 P4_30,
251 P4_31,
252
253 P5_0,
254 P5_1,
255 P5_2,
256 P5_3,
257 P5_4,
258 P5_5,
259 P5_6,
260 P5_7,
261 P5_8,
262 P5_9,
263 P5_10,
264 P5_11,
265 P5_12,
266 P5_13,
267 P5_14,
268 P5_15,
269 P5_16,
270 P5_17,
271 P5_18,
272 P5_19,
273 P5_20,
274 P5_21,
275 P5_22,
276 P5_23,
277 P5_24,
278 P5_25,
279 P5_26,
280 P5_27,
281 P5_28,
282 P5_29,
283 P5_30,
284 P5_31,
285
286 PKC0,
287
288 PORT0,
289 PORT1,
290 PORT2,
291 PORT3,
292 PORT4,
293
294 RTC0,
295 SAU,
296 SCG0,
297 SCN_SCB,
298 SGI0,
299 SMARTDMA0,
300 SPC0,
301 SYSCON,
302 TDET0,
303 TRNG0,
304 UDF0,
305 USB0,
306 UTICK0,
307 VBAT0,
308 WAKETIMER0,
309 WUU0,
310 WWDT0,
311);
18 312
19/// Get access to the PAC Peripherals for low-level register access. 313/// Get access to the PAC Peripherals for low-level register access.
20/// This is a lazy-initialized singleton that can be called after init(). 314/// This is a lazy-initialized singleton that can be called after init().
@@ -35,7 +329,6 @@ pub fn pac() -> &'static pac::Peripherals {
35 329
36// Re-export interrupt traits and types 330// Re-export interrupt traits and types
37pub use adc::Adc1 as Adc1Token; 331pub use adc::Adc1 as Adc1Token;
38pub use gpio::pins::*;
39pub use gpio::{AnyPin, Flex, Gpio as GpioToken, Input, Level, Output}; 332pub use gpio::{AnyPin, Flex, Gpio as GpioToken, Input, Level, Output};
40pub use interrupt::InterruptExt; 333pub use interrupt::InterruptExt;
41#[cfg(feature = "unstable-pac")] 334#[cfg(feature = "unstable-pac")]
@@ -59,6 +352,24 @@ pub fn init(cfg: crate::config::Config) -> Peripherals {
59 // Configure clocks 352 // Configure clocks
60 crate::clocks::init(cfg.clock_cfg).unwrap(); 353 crate::clocks::init(cfg.clock_cfg).unwrap();
61 354
355 // Enable GPIO clocks
356 unsafe {
357 _ = crate::clocks::enable_and_reset::<crate::peripherals::PORT0>(&crate::clocks::periph_helpers::NoConfig);
358 _ = crate::clocks::enable_and_reset::<crate::peripherals::GPIO0>(&crate::clocks::periph_helpers::NoConfig);
359
360 _ = crate::clocks::enable_and_reset::<crate::peripherals::PORT1>(&crate::clocks::periph_helpers::NoConfig);
361 _ = crate::clocks::enable_and_reset::<crate::peripherals::GPIO1>(&crate::clocks::periph_helpers::NoConfig);
362
363 _ = crate::clocks::enable_and_reset::<crate::peripherals::PORT2>(&crate::clocks::periph_helpers::NoConfig);
364 _ = crate::clocks::enable_and_reset::<crate::peripherals::GPIO2>(&crate::clocks::periph_helpers::NoConfig);
365
366 _ = crate::clocks::enable_and_reset::<crate::peripherals::PORT3>(&crate::clocks::periph_helpers::NoConfig);
367 _ = crate::clocks::enable_and_reset::<crate::peripherals::GPIO3>(&crate::clocks::periph_helpers::NoConfig);
368
369 _ = crate::clocks::enable_and_reset::<crate::peripherals::PORT4>(&crate::clocks::periph_helpers::NoConfig);
370 _ = crate::clocks::enable_and_reset::<crate::peripherals::GPIO4>(&crate::clocks::periph_helpers::NoConfig);
371 }
372
62 peripherals 373 peripherals
63} 374}
64 375