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authorFelipe Balbi <[email protected]>2025-11-07 10:07:33 -0800
committerFelipe Balbi <[email protected]>2025-11-07 10:08:16 -0800
commite75066820ad320495ca70570641c90d75247b19b (patch)
treeda2aeddb9164dbc2829b54185d1f180efbad6daf /src/uart.rs
parentcb2ac2790f4b037056f9571abeb4d62360199426 (diff)
cargo +nightly fmt
Signed-off-by: Felipe Balbi <[email protected]>
Diffstat (limited to 'src/uart.rs')
-rw-r--r--src/uart.rs13
1 files changed, 6 insertions, 7 deletions
diff --git a/src/uart.rs b/src/uart.rs
index 65dd91492..3209a318d 100644
--- a/src/uart.rs
+++ b/src/uart.rs
@@ -1,11 +1,13 @@
1//! Minimal polling UART2 bring-up replicating MCUXpresso hello_world ordering. 1//! Minimal polling UART2 bring-up replicating MCUXpresso hello_world ordering.
2//! WARNING: This is a narrow implementation only for debug console (115200 8N1). 2//! WARNING: This is a narrow implementation only for debug console (115200 8N1).
3 3
4use crate::pac;
5use core::cell::RefCell; 4use core::cell::RefCell;
5
6use cortex_m::interrupt::Mutex; 6use cortex_m::interrupt::Mutex;
7use embassy_sync::signal::Signal; 7use embassy_sync::signal::Signal;
8 8
9use crate::pac;
10
9// svd2rust defines the shared LPUART RegisterBlock under lpuart0; all instances reuse it. 11// svd2rust defines the shared LPUART RegisterBlock under lpuart0; all instances reuse it.
10type Regs = pac::lpuart0::RegisterBlock; 12type Regs = pac::lpuart0::RegisterBlock;
11 13
@@ -108,7 +110,7 @@ impl<I: Instance> Uart<I> {
108 cortex_m::asm::delay(3); // Short delay for reset to take effect 110 cortex_m::asm::delay(3); // Short delay for reset to take effect
109 l.global().write(|w| w.rst().no_effect()); 111 l.global().write(|w| w.rst().no_effect());
110 cortex_m::asm::delay(10); // Allow peripheral to stabilize after reset 112 cortex_m::asm::delay(10); // Allow peripheral to stabilize after reset
111 // 2) BAUD 113 // 2) BAUD
112 let (osr, sbr) = compute_osr_sbr(cfg.src_hz, cfg.baud); 114 let (osr, sbr) = compute_osr_sbr(cfg.src_hz, cfg.baud);
113 l.baud().modify(|_, w| { 115 l.baud().modify(|_, w| {
114 let w = match cfg.stop_bits { 116 let w = match cfg.stop_bits {
@@ -234,8 +236,7 @@ impl RingBuffer {
234 236
235// Global RX buffer shared between interrupt handler and UART instance 237// Global RX buffer shared between interrupt handler and UART instance
236static RX_BUFFER: Mutex<RefCell<RingBuffer>> = Mutex::new(RefCell::new(RingBuffer::new())); 238static RX_BUFFER: Mutex<RefCell<RingBuffer>> = Mutex::new(RefCell::new(RingBuffer::new()));
237static RX_SIGNAL: Signal<embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex, ()> = 239static RX_SIGNAL: Signal<embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex, ()> = Signal::new();
238 Signal::new();
239 240
240// Debug counter for interrupt handler calls 241// Debug counter for interrupt handler calls
241static mut INTERRUPT_COUNT: u32 = 0; 242static mut INTERRUPT_COUNT: u32 = 0;
@@ -279,9 +280,7 @@ impl<I: Instance> Uart<I> {
279/// Type-level handler for LPUART2 interrupts, compatible with bind_interrupts!. 280/// Type-level handler for LPUART2 interrupts, compatible with bind_interrupts!.
280pub struct UartInterruptHandler; 281pub struct UartInterruptHandler;
281 282
282impl crate::interrupt::typelevel::Handler<crate::interrupt::typelevel::LPUART2> 283impl crate::interrupt::typelevel::Handler<crate::interrupt::typelevel::LPUART2> for UartInterruptHandler {
283 for UartInterruptHandler
284{
285 unsafe fn on_interrupt() { 284 unsafe fn on_interrupt() {
286 INTERRUPT_COUNT += 1; 285 INTERRUPT_COUNT += 1;
287 286