Add stm32wlexx support

1 files changed, 3 insertions, 41 deletions

diff --git a/stm32-gen-features/src/lib.rs b/stm32-gen-features/src/lib.rs
index bef11c2ad..7aaad9da3 100644
--- a/stm32-gen-features/src/lib.rs
+++ b/stm32-gen-features/src/lib.rs
@@ -1,38 +1,11 @@
 //! FIXME discuss about which errors to print and when to panic
 
-use std::{iter::FilterMap, path::Path, slice::Iter};
-
-const SUPPORTED_FAMILIES: &[&str] = &[
-    "stm32f0", "stm32f1", "stm32f2", "stm32f3", "stm32f4", "stm32f7", "stm32g0", "stm32g4",
-    "stm32l0", "stm32l1", "stm32l4", "stm32l5", "stm32h7", "stm32u5", "stm32wb", "stm32wl5",
-];
+use std::path::Path;
 
 const SEPARATOR_START: &str = "# BEGIN GENERATED FEATURES\n";
 const SEPARATOR_END: &str = "# END GENERATED FEATURES\n";
 const HELP: &str = "# Generated by stm32-gen-features. DO NOT EDIT.\n";
 
-/// True if the chip named `name` is supported else false
-fn is_supported(name: &str) -> bool {
-    SUPPORTED_FAMILIES
-        .iter()
-        .any(|family| name.starts_with(family))
-}
-
-type SupportedIter<'a> = FilterMap<
-    Iter<'a, (String, Vec<String>)>,
-    fn(&(String, Vec<String>)) -> Option<(&String, &Vec<String>)>,
->;
-trait FilterSupported {
-    fn supported(&self) -> SupportedIter;
-}
-impl FilterSupported for &[(String, Vec<String>)] {
-    /// Get a new Vec with only the supported chips
-    fn supported(&self) -> SupportedIter {
-        self.iter()
-            .filter_map(|(name, cores)| is_supported(name).then(|| (name, cores)))
-    }
-}
-
 /// Get the list of all the chips and their supported cores
 ///
 /// Print errors to `stderr` when something is returned by the glob but is not in the returned
@@ -85,7 +58,7 @@ fn chip_cores(path: &Path) -> Vec<String> {
 /// Panics if a file contains yaml syntax errors or if a value does not have a consistent type
 pub fn embassy_stm32_needed_data(names_and_cores: &[(String, Vec<String>)]) -> String {
     let mut result = String::new();
-    for (chip_name, cores) in names_and_cores.supported() {
+    for (chip_name, cores) in names_and_cores {
         if cores.len() > 1 {
             for core_name in cores.iter() {
                 result += &format!(
@@ -151,21 +124,10 @@ mod tests {
     use super::*;
 
     #[test]
-    fn stm32f407vg_is_supported() {
-        assert!(is_supported("stm32f407vg"))
-    }
-
-    #[test]
-    fn abcdef_is_not_supported() {
-        assert!(!is_supported("abcdef"))
-    }
-
-    #[test]
     #[ignore]
-    fn stm32f407vg_yaml_file_exists_and_is_supported() {
+    fn stm32f407vg_yaml_file_exists() {
         assert!(chip_names_and_cores()
             .as_slice()
-            .supported()
             .into_iter()
             .any(|(name, _)| { name == "stm32f407vg" }))
     }