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author1-rafael-1 <[email protected]>2025-05-07 21:19:09 +0200
committer1-rafael-1 <[email protected]>2025-05-07 21:19:09 +0200
commita254daf4fffe74c65d1846f620dd674fa4e14aac (patch)
tree988fb8eb150d92bceca97d0f61b16535edd11215 /tests/rp/src
parent0d03aa0bec01fb0289915861d997bf7f2cf8d232 (diff)
Changes after review
Diffstat (limited to 'tests/rp/src')
-rw-r--r--tests/rp/src/bin/overclock.rs2
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/rp/src/bin/overclock.rs b/tests/rp/src/bin/overclock.rs
index 6c58a6b90..be8e85a3f 100644
--- a/tests/rp/src/bin/overclock.rs
+++ b/tests/rp/src/bin/overclock.rs
@@ -31,7 +31,7 @@ async fn main(_spawner: Spawner) {
31 // Initialize with 200MHz clock configuration for RP2040, other chips will use default clock 31 // Initialize with 200MHz clock configuration for RP2040, other chips will use default clock
32 #[cfg(feature = "rp2040")] 32 #[cfg(feature = "rp2040")]
33 { 33 {
34 config.clocks = ClockConfig::crystal_freq(200_000_000); 34 config.clocks = ClockConfig::system_freq(200_000_000);
35 let voltage = config.clocks.core_voltage; 35 let voltage = config.clocks.core_voltage;
36 assert!(matches!(voltage, CoreVoltage::V1_15), "Expected voltage scale V1_15"); 36 assert!(matches!(voltage, CoreVoltage::V1_15), "Expected voltage scale V1_15");
37 } 37 }