Merge #1457

1457: TL Mbox read and write for stm32wb r=xoviat a=OueslatiGhaith

Hello,

This pull request is related to #1397 and #1401, inspired by #24, built upon the work done in #1405 and #1424, and was tested on an stm32wb55rg.

This pull request aims to add read and write functionality to the TL mailbox for stm32wb microcontrollers

Co-authored-by: goueslati <[email protected]>
Co-authored-by: xoviat <[email protected]>

1 files changed, 3 insertions, 0 deletions

diff --git a/tests/stm32/build.rs b/tests/stm32/build.rs
index 7ae311778..ca76b70bb 100644
--- a/tests/stm32/build.rs
+++ b/tests/stm32/build.rs
@@ -12,6 +12,9 @@ fn main() -> Result<(), Box<dyn Error>> {
     if cfg!(any(feature = "stm32f103c8", feature = "stm32c031c6")) {
         println!("cargo:rustc-link-arg-bins=-Tlink.x");
         println!("cargo:rerun-if-changed=link.x");
+    } else if cfg!(feature = "stm32wb55rg") {
+        println!("cargo:rustc-link-arg-bins=-Tlink.x");
+        fs::write(out.join("memory.x"), include_bytes!("memory_ble.x")).unwrap();
     } else {
         println!("cargo:rustc-link-arg-bins=-Tlink_ram.x");
         println!("cargo:rerun-if-changed=link_ram.x");