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| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2023-05-23 01:15:22 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2023-05-23 01:15:22 +0000 |
| commit | 1fdde8f03fc8b98c7fdb91a94e2dfd47bcbc24cb (patch) | |
| tree | b28d26b4a54ecccce2de498e5106fc55be631061 /tests/stm32/memory_ble.x | |
| parent | ab7d129e152a9450b2a6445397365bcb3a3ce183 (diff) | |
| parent | 64092169e3133b572626c1efa106963139a63b3f (diff) | |
Merge #1457
1457: TL Mbox read and write for stm32wb r=xoviat a=OueslatiGhaith
Hello,
This pull request is related to #1397 and #1401, inspired by #24, built upon the work done in #1405 and #1424, and was tested on an stm32wb55rg.
This pull request aims to add read and write functionality to the TL mailbox for stm32wb microcontrollers
Co-authored-by: goueslati <[email protected]>
Co-authored-by: xoviat <[email protected]>
Diffstat (limited to 'tests/stm32/memory_ble.x')
| -rw-r--r-- | tests/stm32/memory_ble.x | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/tests/stm32/memory_ble.x b/tests/stm32/memory_ble.x new file mode 100644 index 000000000..4332e2c72 --- /dev/null +++ b/tests/stm32/memory_ble.x | |||
| @@ -0,0 +1,23 @@ | |||
| 1 | /* | ||
| 2 | Memory size for STM32WB55xG with 512K FLASH | ||
| 3 | */ | ||
| 4 | |||
| 5 | MEMORY | ||
| 6 | { | ||
| 7 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K | ||
| 8 | RAM (xrw) : ORIGIN = 0x20000008, LENGTH = 0x2FFF8 | ||
| 9 | RAM_SHARED (xrw) : ORIGIN = 0x20030000, LENGTH = 10K | ||
| 10 | } | ||
| 11 | |||
| 12 | /* Place stack at the end of SRAM1 */ | ||
| 13 | _stack_start = ORIGIN(RAM) + LENGTH(RAM); | ||
| 14 | |||
| 15 | /* | ||
| 16 | * Scatter the mailbox interface memory sections in shared memory | ||
| 17 | */ | ||
| 18 | SECTIONS { | ||
| 19 | TL_REF_TABLE (NOLOAD) : { *(TL_REF_TABLE) } >RAM_SHARED | ||
| 20 | |||
| 21 | MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED | ||
| 22 | MB_MEM2 (NOLOAD) : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED | ||
| 23 | } | ||
