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authorbors[bot] <26634292+bors[bot]@users.noreply.github.com>2023-05-02 20:14:12 +0000
committerGitHub <[email protected]>2023-05-02 20:14:12 +0000
commit374c92a4f0fda2932a0a86e5dcc3dc33651a48c7 (patch)
treeac320229c9371bc0d3b6deffda4671f502823f5c /tests/stm32/src/example_common.rs
parent2afa08c9236d386cae7920d9e7f20803a2c6b433 (diff)
parent433422b9f2b08d4bf9f2cef4ded37c14914db157 (diff)
Merge #1420
1420: stm32/usart: add OVER8 and PRESC, add baudrate test. r=Dirbaio a=Dirbaio Fixes #1183 Fixes #1418 bors r+ Co-authored-by: Dario Nieuwenhuis <[email protected]>
Diffstat (limited to 'tests/stm32/src/example_common.rs')
-rw-r--r--tests/stm32/src/example_common.rs5
1 files changed, 5 insertions, 0 deletions
diff --git a/tests/stm32/src/example_common.rs b/tests/stm32/src/example_common.rs
index a4f8668c7..3d150da60 100644
--- a/tests/stm32/src/example_common.rs
+++ b/tests/stm32/src/example_common.rs
@@ -16,5 +16,10 @@ pub fn config() -> Config {
16 config.rcc.pll1.q_ck = Some(Hertz(100_000_000)); 16 config.rcc.pll1.q_ck = Some(Hertz(100_000_000));
17 } 17 }
18 18
19 #[cfg(feature = "stm32u585ai")]
20 {
21 config.rcc.mux = embassy_stm32::rcc::ClockSrc::MSI(embassy_stm32::rcc::MSIRange::Range48mhz);
22 }
23
19 config 24 config
20} 25}