diff options
| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2023-05-01 21:36:10 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2023-05-01 21:36:10 +0000 |
| commit | 6096f0cf4b5ef45b97665166be41bfd490748f40 (patch) | |
| tree | 3e19fd1bacd3cb2d4276eefc224a81ed6c004ff0 /tests/stm32/src/example_common.rs | |
| parent | 855c0d1423cb1aacd4f4f45e255b02b442afde34 (diff) | |
| parent | a1d45303c336434929eb8eb7e55629c504a95b0e (diff) | |
Merge #1404
1404: feat(stm32): Add DMA based, ring-buffer based rx uart, v3 r=Dirbaio a=rmja
This PR replaces #1150. Comparing to that PR, this one has the following changes:
* The implementation now aligns with the new stm32 dma module, thanks `@Dirbaio!`
* Calls to `read()` now returns on either 1) idle line, or 2) ring buffer is at most half full. This is different from the previous pr, which would return a lot of 1 byte reads. Thank you `@chemicstry` for making me realize that it was actually not what I wanted. This is accomplished using half-transfer completed and full-transfer completed interrupts. Both seems to be supported on both dma and bdma.
The implementation still have the issue mentioned here: https://github.com/embassy-rs/embassy/pull/1150#discussion_r1094627035
Regarding the todos here: https://github.com/embassy-rs/embassy/pull/1150#issuecomment-1513905925. I have removed the exposure of ndtr from `dma::RingBuffer` to the uart so that the uart now simply calls `ringbuf::reload_position()` to align the position within the ring buffer to that of the actual running dma controller. BDMA and GPDMA is not implemented. I do not have any chips with those dma controllers, so maybe someone else should to this so that it can be tested.
The `saturate_serial` test utility inside `tests/utils` has an `--idles` switch which can be used to saturate the uart from a pc, but with random idles.
Because embassy-stm32 now can have tests, we should probably run them in ci. I do this locally to test the DmaRingBuffer: `cargo test --no-default-features --features stm32f429ig`.
cc `@chemicstry` `@Dirbaio`
Co-authored-by: Rasmus Melchior Jacobsen <[email protected]>
Co-authored-by: Dario Nieuwenhuis <[email protected]>
Diffstat (limited to 'tests/stm32/src/example_common.rs')
| -rw-r--r-- | tests/stm32/src/example_common.rs | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/tests/stm32/src/example_common.rs b/tests/stm32/src/example_common.rs index c47ed75c4..a4f8668c7 100644 --- a/tests/stm32/src/example_common.rs +++ b/tests/stm32/src/example_common.rs | |||
| @@ -1,22 +1,11 @@ | |||
| 1 | #![macro_use] | 1 | #![macro_use] |
| 2 | 2 | ||
| 3 | use core::sync::atomic::{AtomicUsize, Ordering}; | ||
| 4 | |||
| 5 | pub use defmt::*; | 3 | pub use defmt::*; |
| 6 | #[allow(unused)] | 4 | #[allow(unused)] |
| 7 | use embassy_stm32::time::Hertz; | 5 | use embassy_stm32::time::Hertz; |
| 8 | use embassy_stm32::Config; | 6 | use embassy_stm32::Config; |
| 9 | use {defmt_rtt as _, panic_probe as _}; | 7 | use {defmt_rtt as _, panic_probe as _}; |
| 10 | 8 | ||
| 11 | defmt::timestamp! {"{=u64}", { | ||
| 12 | static COUNT: AtomicUsize = AtomicUsize::new(0); | ||
| 13 | // NOTE(no-CAS) `timestamps` runs with interrupts disabled | ||
| 14 | let n = COUNT.load(Ordering::Relaxed); | ||
| 15 | COUNT.store(n + 1, Ordering::Relaxed); | ||
| 16 | n as u64 | ||
| 17 | } | ||
| 18 | } | ||
| 19 | |||
| 20 | pub fn config() -> Config { | 9 | pub fn config() -> Config { |
| 21 | #[allow(unused_mut)] | 10 | #[allow(unused_mut)] |
| 22 | let mut config = Config::default(); | 11 | let mut config = Config::default(); |
