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authorxoviat <[email protected]>2025-11-21 08:22:31 -0600
committerxoviat <[email protected]>2025-11-21 08:22:31 -0600
commit14436ce1300a5d621b617d56ee037e09ce55ea0a (patch)
tree84b0509869731a69b38178fbf4d632e96f28da13 /tests/stm32/src
parent1cc2643ae60d429d0389213f5c1f6bbc007c6a2b (diff)
adc: add test for wba
Diffstat (limited to 'tests/stm32/src')
-rw-r--r--tests/stm32/src/bin/adc.rs39
-rw-r--r--tests/stm32/src/common.rs1
2 files changed, 40 insertions, 0 deletions
diff --git a/tests/stm32/src/bin/adc.rs b/tests/stm32/src/bin/adc.rs
new file mode 100644
index 000000000..6cedc6498
--- /dev/null
+++ b/tests/stm32/src/bin/adc.rs
@@ -0,0 +1,39 @@
1#![no_std]
2#![no_main]
3
4// required-features: dac
5
6#[path = "../common.rs"]
7mod common;
8
9use common::*;
10use embassy_executor::Spawner;
11use embassy_stm32::adc::{Adc, SampleTime};
12use embassy_time::Timer;
13use {defmt_rtt as _, panic_probe as _};
14
15#[embassy_executor::main]
16async fn main(_spawner: Spawner) {
17 // Initialize the board and obtain a Peripherals instance
18 let p: embassy_stm32::Peripherals = init();
19
20 let adc = peri!(p, ADC);
21 let mut adc_pin = peri!(p, DAC_PIN);
22
23 let mut adc = Adc::new_adc4(adc);
24
25 // Now wait a little to obtain a stable value
26 Timer::after_millis(30).await;
27 let _ = adc.blocking_read(&mut adc_pin, SampleTime::from_bits(0));
28
29 for _ in 0..=255 {
30 // Now wait a little to obtain a stable value
31 Timer::after_millis(30).await;
32
33 // Need to steal the peripherals here because PA4 is obviously in use already
34 let _ = adc.blocking_read(&mut adc_pin, SampleTime::from_bits(0));
35 }
36
37 info!("Test OK");
38 cortex_m::asm::bkpt();
39}
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs
index 096cce947..9f88b182a 100644
--- a/tests/stm32/src/common.rs
+++ b/tests/stm32/src/common.rs
@@ -259,6 +259,7 @@ define_peris!(
259define_peris!( 259define_peris!(
260 UART = LPUART1, UART_TX = PB5, UART_RX = PA10, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1, 260 UART = LPUART1, UART_TX = PB5, UART_RX = PA10, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1,
261 SPI = SPI1, SPI_SCK = PB4, SPI_MOSI = PA15, SPI_MISO = PB3, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, 261 SPI = SPI1, SPI_SCK = PB4, SPI_MOSI = PA15, SPI_MISO = PB3, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1,
262 ADC = ADC4, DAC_PIN = PA0,
262 @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;}, 263 @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;},
263); 264);
264#[cfg(feature = "stm32h7s3l8")] 265#[cfg(feature = "stm32h7s3l8")]