Merge remote-tracking branch 'origin/main' into nrf-pdm

14 files changed, 1141 insertions, 101 deletions

diff --git a/tests/stm32/src/bin/can.rs b/tests/stm32/src/bin/can.rs
new file mode 100644
index 000000000..8bdd3c24f
--- /dev/null
+++ b/tests/stm32/src/bin/can.rs
@@ -0,0 +1,81 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+
+// required-features: can
+
+#[path = "../common.rs"]
+mod common;
+use common::*;
+use embassy_executor::Spawner;
+use embassy_stm32::bind_interrupts;
+use embassy_stm32::can::bxcan::filter::Mask32;
+use embassy_stm32::can::bxcan::{Fifo, Frame, StandardId};
+use embassy_stm32::can::{Can, Rx0InterruptHandler, Rx1InterruptHandler, SceInterruptHandler, TxInterruptHandler};
+use embassy_stm32::gpio::{Input, Pull};
+use embassy_stm32::peripherals::CAN1;
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs {
+    CAN1_RX0 => Rx0InterruptHandler<CAN1>;
+    CAN1_RX1 => Rx1InterruptHandler<CAN1>;
+    CAN1_SCE => SceInterruptHandler<CAN1>;
+    CAN1_TX => TxInterruptHandler<CAN1>;
+});
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let mut p = embassy_stm32::init(config());
+    info!("Hello World!");
+
+    // HW is connected as follows:
+    // PB13 -> PD0
+    // PB12 -> PD1
+
+    // The next two lines are a workaround for testing without transceiver.
+    // To synchronise to the bus the RX input needs to see a high level.
+    // Use `mem::forget()` to release the borrow on the pin but keep the
+    // pull-up resistor enabled.
+    let rx_pin = Input::new(&mut p.PD0, Pull::Up);
+    core::mem::forget(rx_pin);
+
+    let mut can = Can::new(p.CAN1, p.PD0, p.PD1, Irqs);
+
+    info!("Configuring can...");
+
+    can.as_mut()
+        .modify_filters()
+        .enable_bank(0, Fifo::Fifo0, Mask32::accept_all());
+
+    can.set_bitrate(1_000_000);
+    can.as_mut()
+        .modify_config()
+        .set_loopback(true) // Receive own frames
+        .set_silent(true)
+        // .set_bit_timing(0x001c0003)
+        .enable();
+
+    info!("Can configured");
+
+    let mut i: u8 = 0;
+    loop {
+        let tx_frame = Frame::new_data(unwrap!(StandardId::new(i as _)), [i]);
+
+        info!("Transmitting frame...");
+        can.write(&tx_frame).await;
+
+        info!("Receiving frame...");
+        let (time, rx_frame) = can.read().await.unwrap();
+
+        info!("loopback time {}", time);
+        info!("loopback frame {=u8}", rx_frame.data().unwrap()[0]);
+
+        i += 1;
+        if i > 10 {
+            break;
+        }
+    }
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/stm32/src/bin/gpio.rs b/tests/stm32/src/bin/gpio.rs
index 18fd85d44..aad174431 100644
--- a/tests/stm32/src/bin/gpio.rs
+++ b/tests/stm32/src/bin/gpio.rs
@@ -1,13 +1,13 @@
 #![no_std]
 #![no_main]
 #![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
 
-#[path = "../example_common.rs"]
-mod example_common;
+use common::*;
 use defmt::assert;
 use embassy_executor::Spawner;
 use embassy_stm32::gpio::{Flex, Input, Level, Output, OutputOpenDrain, Pull, Speed};
-use example_common::*;
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
@@ -30,20 +30,56 @@ async fn main(_spawner: Spawner) {
     let (mut a, mut b) = (p.PB6, p.PB7);
     #[cfg(feature = "stm32u585ai")]
     let (mut a, mut b) = (p.PD9, p.PD8);
+    #[cfg(feature = "stm32h563zi")]
+    let (mut a, mut b) = (p.PB6, p.PB7);
+    #[cfg(feature = "stm32c031c6")]
+    let (mut a, mut b) = (p.PB6, p.PB7);
 
     // Test initial output
     {
         let b = Input::new(&mut b, Pull::None);
 
         {
-            let _a = Output::new(&mut a, Level::Low, Speed::Low);
+            let a = Output::new(&mut a, Level::Low, Speed::Low);
             delay();
             assert!(b.is_low());
+            assert!(!b.is_high());
+            assert!(a.is_set_low());
+            assert!(!a.is_set_high());
         }
         {
-            let _a = Output::new(&mut a, Level::High, Speed::Low);
+            let mut a = Output::new(&mut a, Level::High, Speed::Low);
+            delay();
+            assert!(!b.is_low());
+            assert!(b.is_high());
+            assert!(!a.is_set_low());
+            assert!(a.is_set_high());
+
+            // Test is_set_low / is_set_high
+            a.set_low();
+            delay();
+            assert!(b.is_low());
+            assert!(a.is_set_low());
+            assert!(!a.is_set_high());
+
+            a.set_high();
+            delay();
+            assert!(b.is_high());
+            assert!(!a.is_set_low());
+            assert!(a.is_set_high());
+
+            // Test toggle
+            a.toggle();
+            delay();
+            assert!(b.is_low());
+            assert!(a.is_set_low());
+            assert!(!a.is_set_high());
+
+            a.toggle();
             delay();
             assert!(b.is_high());
+            assert!(!a.is_set_low());
+            assert!(a.is_set_high());
         }
     }
 
diff --git a/tests/stm32/src/bin/rtc.rs b/tests/stm32/src/bin/rtc.rs
new file mode 100644
index 000000000..194b153d5
--- /dev/null
+++ b/tests/stm32/src/bin/rtc.rs
@@ -0,0 +1,50 @@
+// required-features: chrono
+
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use chrono::{NaiveDate, NaiveDateTime};
+use common::*;
+use defmt::assert;
+use embassy_executor::Spawner;
+use embassy_stm32::pac;
+use embassy_stm32::rtc::{Rtc, RtcConfig};
+use embassy_time::{Duration, Timer};
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_stm32::init(config());
+    info!("Hello World!");
+
+    let now = NaiveDate::from_ymd_opt(2020, 5, 15)
+        .unwrap()
+        .and_hms_opt(10, 30, 15)
+        .unwrap();
+
+    info!("Starting LSI");
+
+    pac::RCC.csr().modify(|w| w.set_lsion(true));
+    while !pac::RCC.csr().read().lsirdy() {}
+
+    info!("Started LSI");
+
+    let mut rtc = Rtc::new(p.RTC, RtcConfig::default());
+
+    rtc.set_datetime(now.into()).expect("datetime not set");
+
+    info!("Waiting 5 seconds");
+    Timer::after(Duration::from_millis(5000)).await;
+
+    let then: NaiveDateTime = rtc.now().unwrap().into();
+    let seconds = (then - now).num_seconds();
+
+    defmt::info!("measured = {}", seconds);
+
+    assert!(seconds > 3 && seconds < 7);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/stm32/src/bin/sdmmc.rs b/tests/stm32/src/bin/sdmmc.rs
new file mode 100644
index 000000000..515025386
--- /dev/null
+++ b/tests/stm32/src/bin/sdmmc.rs
@@ -0,0 +1,145 @@
+// required-features: sdmmc
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{assert_eq, *};
+use embassy_executor::Spawner;
+use embassy_stm32::sdmmc::{DataBlock, Sdmmc};
+use embassy_stm32::time::mhz;
+use embassy_stm32::{bind_interrupts, peripherals, sdmmc, Config};
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs {
+    SDIO => sdmmc::InterruptHandler<peripherals::SDIO>;
+});
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    info!("Hello World!");
+
+    let mut config = Config::default();
+    config.rcc.sys_ck = Some(mhz(48));
+    config.rcc.pll48 = true;
+    let p = embassy_stm32::init(config);
+
+    #[cfg(feature = "stm32f429zi")]
+    let (mut sdmmc, mut dma, mut clk, mut cmd, mut d0, mut d1, mut d2, mut d3) =
+        (p.SDIO, p.DMA2_CH3, p.PC12, p.PD2, p.PC8, p.PC9, p.PC10, p.PC11);
+
+    // Arbitrary block index
+    let block_idx = 16;
+
+    let mut pattern1 = DataBlock([0u8; 512]);
+    let mut pattern2 = DataBlock([0u8; 512]);
+    for i in 0..512 {
+        pattern1[i] = i as u8;
+        pattern2[i] = !i as u8;
+    }
+
+    let mut block = DataBlock([0u8; 512]);
+
+    // ======== Try 4bit. ==============
+    info!("initializing in 4-bit mode...");
+    let mut s = Sdmmc::new_4bit(
+        &mut sdmmc,
+        Irqs,
+        &mut dma,
+        &mut clk,
+        &mut cmd,
+        &mut d0,
+        &mut d1,
+        &mut d2,
+        &mut d3,
+        Default::default(),
+    );
+
+    let mut err = None;
+    loop {
+        match s.init_card(mhz(24)).await {
+            Ok(_) => break,
+            Err(e) => {
+                if err != Some(e) {
+                    info!("waiting for card: {:?}", e);
+                    err = Some(e);
+                }
+            }
+        }
+    }
+
+    let card = unwrap!(s.card());
+
+    info!("Card: {:#?}", Debug2Format(card));
+    info!("Clock: {}", s.clock());
+
+    info!("writing pattern1...");
+    s.write_block(block_idx, &pattern1).await.unwrap();
+
+    info!("reading...");
+    s.read_block(block_idx, &mut block).await.unwrap();
+    assert_eq!(block, pattern1);
+
+    info!("writing pattern2...");
+    s.write_block(block_idx, &pattern2).await.unwrap();
+
+    info!("reading...");
+    s.read_block(block_idx, &mut block).await.unwrap();
+    assert_eq!(block, pattern2);
+
+    drop(s);
+
+    // ======== Try 1bit. ==============
+    info!("initializing in 1-bit mode...");
+    let mut s = Sdmmc::new_1bit(
+        &mut sdmmc,
+        Irqs,
+        &mut dma,
+        &mut clk,
+        &mut cmd,
+        &mut d0,
+        Default::default(),
+    );
+
+    let mut err = None;
+    loop {
+        match s.init_card(mhz(24)).await {
+            Ok(_) => break,
+            Err(e) => {
+                if err != Some(e) {
+                    info!("waiting for card: {:?}", e);
+                    err = Some(e);
+                }
+            }
+        }
+    }
+
+    let card = unwrap!(s.card());
+
+    info!("Card: {:#?}", Debug2Format(card));
+    info!("Clock: {}", s.clock());
+
+    info!("reading pattern2 written in 4bit mode...");
+    s.read_block(block_idx, &mut block).await.unwrap();
+    assert_eq!(block, pattern2);
+
+    info!("writing pattern1...");
+    s.write_block(block_idx, &pattern1).await.unwrap();
+
+    info!("reading...");
+    s.read_block(block_idx, &mut block).await.unwrap();
+    assert_eq!(block, pattern1);
+
+    info!("writing pattern2...");
+    s.write_block(block_idx, &pattern2).await.unwrap();
+
+    info!("reading...");
+    s.read_block(block_idx, &mut block).await.unwrap();
+    assert_eq!(block, pattern2);
+
+    drop(s);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/stm32/src/bin/spi.rs b/tests/stm32/src/bin/spi.rs
index 1c5dc87c0..819ecae3c 100644
--- a/tests/stm32/src/bin/spi.rs
+++ b/tests/stm32/src/bin/spi.rs
@@ -1,15 +1,15 @@
 #![no_std]
 #![no_main]
 #![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
 
-#[path = "../example_common.rs"]
-mod example_common;
+use common::*;
 use defmt::assert_eq;
 use embassy_executor::Spawner;
 use embassy_stm32::dma::NoDma;
 use embassy_stm32::spi::{self, Spi};
 use embassy_stm32::time::Hertz;
-use example_common::*;
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
@@ -17,22 +17,26 @@ async fn main(_spawner: Spawner) {
     info!("Hello World!");
 
     #[cfg(feature = "stm32f103c8")]
-    let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
     #[cfg(feature = "stm32f429zi")]
-    let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
     #[cfg(feature = "stm32h755zi")]
-    let (sck, mosi, miso) = (p.PA5, p.PB5, p.PA6);
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PB5, p.PA6);
     #[cfg(feature = "stm32g491re")]
-    let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
     #[cfg(feature = "stm32g071rb")]
-    let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
     #[cfg(feature = "stm32wb55rg")]
-    let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
     #[cfg(feature = "stm32u585ai")]
-    let (sck, mosi, miso) = (p.PE13, p.PE15, p.PE14);
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PE13, p.PE15, p.PE14);
+    #[cfg(feature = "stm32h563zi")]
+    let (spi, sck, mosi, miso) = (p.SPI4, p.PE12, p.PE14, p.PE13);
+    #[cfg(feature = "stm32c031c6")]
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
 
     let mut spi = Spi::new(
-        p.SPI1,
+        spi,
         sck,  // Arduino D13
         mosi, // Arduino D11
         miso, // Arduino D12
@@ -46,7 +50,7 @@ async fn main(_spawner: Spawner) {
 
     // Arduino pins D11 and D12 (MOSI-MISO) are connected together with a 1K resistor.
     // so we should get the data we sent back.
-    let mut buf = data;
+    let mut buf = [0; 9];
     spi.blocking_transfer(&mut buf, &data).unwrap();
     assert_eq!(buf, data);
 
diff --git a/tests/stm32/src/bin/spi_dma.rs b/tests/stm32/src/bin/spi_dma.rs
index cb2152e0b..78aad24e1 100644
--- a/tests/stm32/src/bin/spi_dma.rs
+++ b/tests/stm32/src/bin/spi_dma.rs
@@ -1,14 +1,14 @@
 #![no_std]
 #![no_main]
 #![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
 
-#[path = "../example_common.rs"]
-mod example_common;
+use common::*;
 use defmt::assert_eq;
 use embassy_executor::Spawner;
 use embassy_stm32::spi::{self, Spi};
 use embassy_stm32::time::Hertz;
-use example_common::*;
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
@@ -16,22 +16,26 @@ async fn main(_spawner: Spawner) {
     info!("Hello World!");
 
     #[cfg(feature = "stm32f103c8")]
-    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PA5, p.PA7, p.PA6, p.DMA1_CH3, p.DMA1_CH2);
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH3, p.DMA1_CH2);
     #[cfg(feature = "stm32f429zi")]
-    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PA5, p.PA7, p.PA6, p.DMA2_CH3, p.DMA2_CH2);
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA2_CH3, p.DMA2_CH2);
     #[cfg(feature = "stm32h755zi")]
-    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PA5, p.PB5, p.PA6, p.DMA1_CH0, p.DMA1_CH1);
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PB5, p.PA6, p.DMA1_CH0, p.DMA1_CH1);
     #[cfg(feature = "stm32g491re")]
-    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
     #[cfg(feature = "stm32g071rb")]
-    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
     #[cfg(feature = "stm32wb55rg")]
-    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
     #[cfg(feature = "stm32u585ai")]
-    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PE13, p.PE15, p.PE14, p.GPDMA1_CH0, p.GPDMA1_CH1);
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PE13, p.PE15, p.PE14, p.GPDMA1_CH0, p.GPDMA1_CH1);
+    #[cfg(feature = "stm32h563zi")]
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI4, p.PE12, p.PE14, p.PE13, p.GPDMA1_CH0, p.GPDMA1_CH1);
+    #[cfg(feature = "stm32c031c6")]
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
 
     let mut spi = Spi::new(
-        p.SPI1,
+        spi,
         sck,  // Arduino D13
         mosi, // Arduino D11
         miso, // Arduino D12
diff --git a/tests/stm32/src/bin/timer.rs b/tests/stm32/src/bin/timer.rs
index e00e43bf1..f8b453cda 100644
--- a/tests/stm32/src/bin/timer.rs
+++ b/tests/stm32/src/bin/timer.rs
@@ -1,13 +1,13 @@
 #![no_std]
 #![no_main]
 #![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
 
-#[path = "../example_common.rs"]
-mod example_common;
+use common::*;
 use defmt::assert;
 use embassy_executor::Spawner;
 use embassy_time::{Duration, Instant, Timer};
-use example_common::*;
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
diff --git a/tests/stm32/src/bin/usart.rs b/tests/stm32/src/bin/usart.rs
index 7673bfe6d..394005b82 100644
--- a/tests/stm32/src/bin/usart.rs
+++ b/tests/stm32/src/bin/usart.rs
@@ -1,14 +1,42 @@
 #![no_std]
 #![no_main]
 #![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
 
-#[path = "../example_common.rs"]
-mod example_common;
+use common::*;
 use defmt::assert_eq;
 use embassy_executor::Spawner;
 use embassy_stm32::dma::NoDma;
-use embassy_stm32::usart::{Config, Uart};
-use example_common::*;
+use embassy_stm32::usart::{Config, Error, Uart};
+use embassy_stm32::{bind_interrupts, peripherals, usart};
+use embassy_time::{Duration, Instant};
+
+#[cfg(any(
+    feature = "stm32f103c8",
+    feature = "stm32g491re",
+    feature = "stm32g071rb",
+    feature = "stm32h755zi",
+    feature = "stm32c031c6",
+))]
+bind_interrupts!(struct Irqs {
+    USART1 => usart::InterruptHandler<peripherals::USART1>;
+});
+
+#[cfg(feature = "stm32u585ai")]
+bind_interrupts!(struct Irqs {
+    USART3 => usart::InterruptHandler<peripherals::USART3>;
+});
+
+#[cfg(feature = "stm32f429zi")]
+bind_interrupts!(struct Irqs {
+    USART6 => usart::InterruptHandler<peripherals::USART6>;
+});
+
+#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
+bind_interrupts!(struct Irqs {
+    LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
+});
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
@@ -18,32 +46,96 @@ async fn main(_spawner: Spawner) {
     // Arduino pins D0 and D1
     // They're connected together with a 1K resistor.
     #[cfg(feature = "stm32f103c8")]
-    let (tx, rx, usart) = (p.PA9, p.PA10, p.USART1);
+    let (mut tx, mut rx, mut usart) = (p.PA9, p.PA10, p.USART1);
     #[cfg(feature = "stm32g491re")]
-    let (tx, rx, usart) = (p.PC4, p.PC5, p.USART1);
+    let (mut tx, mut rx, mut usart) = (p.PC4, p.PC5, p.USART1);
     #[cfg(feature = "stm32g071rb")]
-    let (tx, rx, usart) = (p.PC4, p.PC5, p.USART1);
+    let (mut tx, mut rx, mut usart) = (p.PC4, p.PC5, p.USART1);
     #[cfg(feature = "stm32f429zi")]
-    let (tx, rx, usart) = (p.PG14, p.PG9, p.USART6);
+    let (mut tx, mut rx, mut usart) = (p.PG14, p.PG9, p.USART6);
     #[cfg(feature = "stm32wb55rg")]
-    let (tx, rx, usart) = (p.PA2, p.PA3, p.LPUART1);
+    let (mut tx, mut rx, mut usart) = (p.PA2, p.PA3, p.LPUART1);
     #[cfg(feature = "stm32h755zi")]
-    let (tx, rx, usart) = (p.PB6, p.PB7, p.USART1);
+    let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.USART1);
     #[cfg(feature = "stm32u585ai")]
-    let (tx, rx, usart) = (p.PD8, p.PD9, p.USART3);
+    let (mut tx, mut rx, mut usart) = (p.PD8, p.PD9, p.USART3);
+    #[cfg(feature = "stm32h563zi")]
+    let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.LPUART1);
+    #[cfg(feature = "stm32c031c6")]
+    let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.USART1);
+
+    {
+        let config = Config::default();
+        let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
+
+        // We can't send too many bytes, they have to fit in the FIFO.
+        // This is because we aren't sending+receiving at the same time.
+
+        let data = [0xC0, 0xDE];
+        usart.blocking_write(&data).unwrap();
+
+        let mut buf = [0; 2];
+        usart.blocking_read(&mut buf).unwrap();
+        assert_eq!(buf, data);
+    }
+
+    // Test error handling with with an overflow error
+    {
+        let config = Config::default();
+        let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
+
+        // Send enough bytes to fill the RX FIFOs off all USART versions.
+        let data = [0xC0, 0xDE, 0x12, 0x23, 0x34];
+        usart.blocking_write(&data).unwrap();
+        usart.blocking_flush().unwrap();
+
+        // The error should be reported first.
+        let mut buf = [0; 1];
+        let err = usart.blocking_read(&mut buf);
+        assert_eq!(err, Err(Error::Overrun));
+
+        // At least the first data byte should still be available on all USART versions.
+        usart.blocking_read(&mut buf).unwrap();
+        assert_eq!(buf[0], data[0]);
+    }
 
-    let config = Config::default();
-    let mut usart = Uart::new(usart, rx, tx, NoDma, NoDma, config);
+    // Test that baudrate divider is calculated correctly.
+    // Do it by comparing the time it takes to send a known number of bytes.
+    for baudrate in [
+        300,
+        9600,
+        115200,
+        250_000,
+        337_934,
+        #[cfg(not(feature = "stm32f103c8"))]
+        1_000_000,
+        #[cfg(not(feature = "stm32f103c8"))]
+        2_000_000,
+    ] {
+        info!("testing baudrate {}", baudrate);
 
-    // We can't send too many bytes, they have to fit in the FIFO.
-    // This is because we aren't sending+receiving at the same time.
+        let mut config = Config::default();
+        config.baudrate = baudrate;
+        let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
 
-    let data = [0xC0, 0xDE];
-    usart.blocking_write(&data).unwrap();
+        let n = (baudrate as usize / 100).max(64);
 
-    let mut buf = [0; 2];
-    usart.blocking_read(&mut buf).unwrap();
-    assert_eq!(buf, data);
+        let start = Instant::now();
+        for _ in 0..n {
+            usart.blocking_write(&[0x00]).unwrap();
+        }
+        let dur = Instant::now() - start;
+        let want_dur = Duration::from_micros(n as u64 * 10 * 1_000_000 / (baudrate as u64));
+        let fuzz = want_dur / 5;
+        if dur < want_dur - fuzz || dur > want_dur + fuzz {
+            defmt::panic!(
+                "bad duration for baudrate {}: got {:?} want {:?}",
+                baudrate,
+                dur,
+                want_dur
+            );
+        }
+    }
 
     info!("Test OK");
     cortex_m::asm::bkpt();
diff --git a/tests/stm32/src/bin/usart_dma.rs b/tests/stm32/src/bin/usart_dma.rs
index e0389446f..c34d9574b 100644
--- a/tests/stm32/src/bin/usart_dma.rs
+++ b/tests/stm32/src/bin/usart_dma.rs
@@ -1,13 +1,41 @@
 #![no_std]
 #![no_main]
 #![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
 
-#[path = "../example_common.rs"]
-mod example_common;
+use common::*;
 use defmt::assert_eq;
 use embassy_executor::Spawner;
+use embassy_futures::join::join;
 use embassy_stm32::usart::{Config, Uart};
-use example_common::*;
+use embassy_stm32::{bind_interrupts, peripherals, usart};
+
+#[cfg(any(
+    feature = "stm32f103c8",
+    feature = "stm32g491re",
+    feature = "stm32g071rb",
+    feature = "stm32h755zi",
+    feature = "stm32c031c6",
+))]
+bind_interrupts!(struct Irqs {
+    USART1 => usart::InterruptHandler<peripherals::USART1>;
+});
+
+#[cfg(feature = "stm32u585ai")]
+bind_interrupts!(struct Irqs {
+    USART3 => usart::InterruptHandler<peripherals::USART3>;
+});
+
+#[cfg(feature = "stm32f429zi")]
+bind_interrupts!(struct Irqs {
+    USART6 => usart::InterruptHandler<peripherals::USART6>;
+});
+
+#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
+bind_interrupts!(struct Irqs {
+    LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
+});
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
@@ -17,33 +45,51 @@ async fn main(_spawner: Spawner) {
     // Arduino pins D0 and D1
     // They're connected together with a 1K resistor.
     #[cfg(feature = "stm32f103c8")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, p.DMA1_CH4, p.DMA1_CH5);
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, Irqs, p.DMA1_CH4, p.DMA1_CH5);
     #[cfg(feature = "stm32g491re")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
     #[cfg(feature = "stm32g071rb")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
     #[cfg(feature = "stm32f429zi")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, p.DMA2_CH6, p.DMA2_CH1);
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, Irqs, p.DMA2_CH6, p.DMA2_CH1);
     #[cfg(feature = "stm32wb55rg")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, p.DMA1_CH1, p.DMA1_CH2);
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
     #[cfg(feature = "stm32h755zi")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH0, p.DMA1_CH1);
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH0, p.DMA1_CH1);
     #[cfg(feature = "stm32u585ai")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, p.GPDMA1_CH0, p.GPDMA1_CH1);
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1);
+    #[cfg(feature = "stm32h563zi")]
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.LPUART1, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1);
+    #[cfg(feature = "stm32c031c6")]
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
 
     let config = Config::default();
-    let mut usart = Uart::new(usart, rx, tx, tx_dma, rx_dma, config);
+    let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config);
+
+    const LEN: usize = 128;
+    let mut tx_buf = [0; LEN];
+    let mut rx_buf = [0; LEN];
+
+    let (mut tx, mut rx) = usart.split();
+
+    for n in 0..42 {
+        for i in 0..LEN {
+            tx_buf[i] = (i ^ n) as u8;
+        }
 
-    // We can't send too many bytes, they have to fit in the FIFO.
-    // This is because we aren't sending+receiving at the same time.
-    // For whatever reason, blocking works with 2 bytes but DMA only with 1??
+        let tx_fut = async {
+            tx.write(&tx_buf).await.unwrap();
+        };
+        let rx_fut = async {
+            rx.read(&mut rx_buf).await.unwrap();
+        };
 
-    let data = [0x42];
-    usart.write(&data).await.unwrap();
+        // note: rx needs to be polled first, to workaround this bug:
+        // https://github.com/embassy-rs/embassy/issues/1426
+        join(rx_fut, tx_fut).await;
 
-    let mut buf = [0; 1];
-    usart.read(&mut buf).await.unwrap();
-    assert_eq!(buf, data);
+        assert_eq!(tx_buf, rx_buf);
+    }
 
     info!("Test OK");
     cortex_m::asm::bkpt();
diff --git a/tests/stm32/src/bin/usart_rx_ringbuffered.rs b/tests/stm32/src/bin/usart_rx_ringbuffered.rs
new file mode 100644
index 000000000..c8dd2643b
--- /dev/null
+++ b/tests/stm32/src/bin/usart_rx_ringbuffered.rs
@@ -0,0 +1,198 @@
+// required-features: not-gpdma
+
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use common::*;
+use defmt::{assert_eq, panic};
+use embassy_executor::Spawner;
+use embassy_stm32::usart::{Config, DataBits, Parity, RingBufferedUartRx, StopBits, Uart, UartTx};
+use embassy_stm32::{bind_interrupts, peripherals, usart};
+use embassy_time::{Duration, Timer};
+use rand_chacha::ChaCha8Rng;
+use rand_core::{RngCore, SeedableRng};
+
+#[cfg(any(
+    feature = "stm32f103c8",
+    feature = "stm32g491re",
+    feature = "stm32g071rb",
+    feature = "stm32h755zi",
+    feature = "stm32c031c6",
+))]
+bind_interrupts!(struct Irqs {
+    USART1 => usart::InterruptHandler<peripherals::USART1>;
+});
+
+#[cfg(feature = "stm32u585ai")]
+bind_interrupts!(struct Irqs {
+    USART3 => usart::InterruptHandler<peripherals::USART3>;
+});
+
+#[cfg(feature = "stm32f429zi")]
+bind_interrupts!(struct Irqs {
+    USART1 => usart::InterruptHandler<peripherals::USART1>;
+    USART6 => usart::InterruptHandler<peripherals::USART6>;
+});
+
+#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
+bind_interrupts!(struct Irqs {
+    LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
+});
+
+#[cfg(feature = "stm32f103c8")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::USART1;
+    pub type TxDma = embassy_stm32::peripherals::DMA1_CH4;
+    pub type RxDma = embassy_stm32::peripherals::DMA1_CH5;
+}
+#[cfg(feature = "stm32g491re")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::USART1;
+    pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
+    pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
+}
+#[cfg(feature = "stm32g071rb")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::USART1;
+    pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
+    pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
+}
+#[cfg(feature = "stm32f429zi")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::USART6;
+    pub type TxDma = embassy_stm32::peripherals::DMA2_CH6;
+    pub type RxDma = embassy_stm32::peripherals::DMA2_CH1;
+}
+#[cfg(feature = "stm32wb55rg")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::LPUART1;
+    pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
+    pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
+}
+#[cfg(feature = "stm32h755zi")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::USART1;
+    pub type TxDma = embassy_stm32::peripherals::DMA1_CH0;
+    pub type RxDma = embassy_stm32::peripherals::DMA1_CH1;
+}
+#[cfg(feature = "stm32u585ai")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::USART3;
+    pub type TxDma = embassy_stm32::peripherals::GPDMA1_CH0;
+    pub type RxDma = embassy_stm32::peripherals::GPDMA1_CH1;
+}
+#[cfg(feature = "stm32c031c6")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::USART1;
+    pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
+    pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
+}
+
+const DMA_BUF_SIZE: usize = 256;
+
+#[embassy_executor::main]
+async fn main(spawner: Spawner) {
+    let p = embassy_stm32::init(config());
+    info!("Hello World!");
+
+    // Arduino pins D0 and D1
+    // They're connected together with a 1K resistor.
+    #[cfg(feature = "stm32f103c8")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, p.DMA1_CH4, p.DMA1_CH5);
+    #[cfg(feature = "stm32g491re")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
+    #[cfg(feature = "stm32g071rb")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
+    #[cfg(feature = "stm32f429zi")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, p.DMA2_CH6, p.DMA2_CH1);
+    #[cfg(feature = "stm32wb55rg")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, p.DMA1_CH1, p.DMA1_CH2);
+    #[cfg(feature = "stm32h755zi")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH0, p.DMA1_CH1);
+    #[cfg(feature = "stm32u585ai")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, p.GPDMA1_CH0, p.GPDMA1_CH1);
+    #[cfg(feature = "stm32c031c6")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
+
+    // To run this test, use the saturating_serial test utility to saturate the serial port
+
+    let mut config = Config::default();
+    // this is the fastest we can go without tuning RCC
+    // some chips have default pclk=8mhz, and uart can run at max pclk/16
+    config.baudrate = 500_000;
+    config.data_bits = DataBits::DataBits8;
+    config.stop_bits = StopBits::STOP1;
+    config.parity = Parity::ParityNone;
+
+    let usart = Uart::new(usart, rx, tx, Irqs, tx_dma, rx_dma, config);
+    let (tx, rx) = usart.split();
+    static mut DMA_BUF: [u8; DMA_BUF_SIZE] = [0; DMA_BUF_SIZE];
+    let dma_buf = unsafe { DMA_BUF.as_mut() };
+    let rx = rx.into_ring_buffered(dma_buf);
+
+    info!("Spawning tasks");
+    spawner.spawn(transmit_task(tx)).unwrap();
+    spawner.spawn(receive_task(rx)).unwrap();
+}
+
+#[embassy_executor::task]
+async fn transmit_task(mut tx: UartTx<'static, board::Uart, board::TxDma>) {
+    // workaround https://github.com/embassy-rs/embassy/issues/1426
+    Timer::after(Duration::from_millis(100) as _).await;
+
+    let mut rng = ChaCha8Rng::seed_from_u64(1337);
+
+    info!("Starting random transmissions into void...");
+
+    let mut i: u8 = 0;
+    loop {
+        let mut buf = [0; 256];
+        let len = 1 + (rng.next_u32() as usize % buf.len());
+        for b in &mut buf[..len] {
+            *b = i;
+            i = i.wrapping_add(1);
+        }
+
+        tx.write(&buf[..len]).await.unwrap();
+        Timer::after(Duration::from_micros((rng.next_u32() % 1000) as _)).await;
+    }
+}
+
+#[embassy_executor::task]
+async fn receive_task(mut rx: RingBufferedUartRx<'static, board::Uart, board::RxDma>) {
+    info!("Ready to receive...");
+
+    let mut rng = ChaCha8Rng::seed_from_u64(1337);
+
+    let mut i = 0;
+    let mut expected = 0;
+    loop {
+        let mut buf = [0; 256];
+        let max_len = 1 + (rng.next_u32() as usize % buf.len());
+        let received = match rx.read(&mut buf[..max_len]).await {
+            Ok(r) => r,
+            Err(e) => {
+                panic!("Test fail! read error: {:?}", e);
+            }
+        };
+
+        for byte in &buf[..received] {
+            assert_eq!(*byte, expected);
+            expected = expected.wrapping_add(1);
+        }
+
+        if received < max_len {
+            Timer::after(Duration::from_micros((rng.next_u32() % 1000) as _)).await;
+        }
+
+        i += received;
+
+        if i > 100000 {
+            info!("Test OK!");
+            cortex_m::asm::bkpt();
+        }
+    }
+}
diff --git a/tests/stm32/src/bin/wpan_ble.rs b/tests/stm32/src/bin/wpan_ble.rs
new file mode 100644
index 000000000..3ad8aca4e
--- /dev/null
+++ b/tests/stm32/src/bin/wpan_ble.rs
@@ -0,0 +1,251 @@
+// required-features: ble
+
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use core::time::Duration;
+
+use common::*;
+use embassy_executor::Spawner;
+use embassy_stm32::bind_interrupts;
+use embassy_stm32::ipcc::{Config, ReceiveInterruptHandler, TransmitInterruptHandler};
+use embassy_stm32_wpan::hci::host::uart::UartHci;
+use embassy_stm32_wpan::hci::host::{AdvertisingFilterPolicy, EncryptionKey, HostHci, OwnAddressType};
+use embassy_stm32_wpan::hci::types::AdvertisingType;
+use embassy_stm32_wpan::hci::vendor::stm32wb::command::gap::{
+    AdvertisingDataType, DiscoverableParameters, GapCommands, Role,
+};
+use embassy_stm32_wpan::hci::vendor::stm32wb::command::gatt::GattCommands;
+use embassy_stm32_wpan::hci::vendor::stm32wb::command::hal::{ConfigData, HalCommands, PowerLevel};
+use embassy_stm32_wpan::hci::BdAddr;
+use embassy_stm32_wpan::lhci::LhciC1DeviceInformationCcrp;
+use embassy_stm32_wpan::sub::mm;
+use embassy_stm32_wpan::TlMbox;
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs{
+    IPCC_C1_RX => ReceiveInterruptHandler;
+    IPCC_C1_TX => TransmitInterruptHandler;
+});
+
+const BLE_GAP_DEVICE_NAME_LENGTH: u8 = 7;
+
+#[embassy_executor::task]
+async fn run_mm_queue(memory_manager: mm::MemoryManager) {
+    memory_manager.run_queue().await;
+}
+
+#[embassy_executor::main]
+async fn main(spawner: Spawner) {
+    let p = embassy_stm32::init(config());
+    info!("Hello World!");
+
+    let config = Config::default();
+    let mut mbox = TlMbox::init(p.IPCC, Irqs, config);
+
+    spawner.spawn(run_mm_queue(mbox.mm_subsystem)).unwrap();
+
+    let sys_event = mbox.sys_subsystem.read().await;
+    info!("sys event: {}", sys_event.payload());
+
+    let fw_info = mbox.sys_subsystem.wireless_fw_info().unwrap();
+    let version_major = fw_info.version_major();
+    let version_minor = fw_info.version_minor();
+    let subversion = fw_info.subversion();
+
+    let sram2a_size = fw_info.sram2a_size();
+    let sram2b_size = fw_info.sram2b_size();
+
+    info!(
+        "version {}.{}.{} - SRAM2a {} - SRAM2b {}",
+        version_major, version_minor, subversion, sram2a_size, sram2b_size
+    );
+
+    let _ = mbox.sys_subsystem.shci_c2_ble_init(Default::default()).await;
+
+    info!("resetting BLE...");
+    mbox.ble_subsystem.reset().await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("config public address...");
+    mbox.ble_subsystem
+        .write_config_data(&ConfigData::public_address(get_bd_addr()).build())
+        .await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("config random address...");
+    mbox.ble_subsystem
+        .write_config_data(&ConfigData::random_address(get_random_addr()).build())
+        .await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("config identity root...");
+    mbox.ble_subsystem
+        .write_config_data(&ConfigData::identity_root(&get_irk()).build())
+        .await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("config encryption root...");
+    mbox.ble_subsystem
+        .write_config_data(&ConfigData::encryption_root(&get_erk()).build())
+        .await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("config tx power level...");
+    mbox.ble_subsystem.set_tx_power_level(PowerLevel::ZerodBm).await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("GATT init...");
+    mbox.ble_subsystem.init_gatt().await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("GAP init...");
+    mbox.ble_subsystem
+        .init_gap(Role::PERIPHERAL, false, BLE_GAP_DEVICE_NAME_LENGTH)
+        .await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    // info!("set scan response...");
+    // mbox.ble_subsystem.le_set_scan_response_data(&[]).await.unwrap();
+    // let response = mbox.ble_subsystem.read().await.unwrap();
+    // info!("{}", response);
+
+    info!("set discoverable...");
+    mbox.ble_subsystem
+        .set_discoverable(&DiscoverableParameters {
+            advertising_type: AdvertisingType::NonConnectableUndirected,
+            advertising_interval: Some((Duration::from_millis(250), Duration::from_millis(250))),
+            address_type: OwnAddressType::Public,
+            filter_policy: AdvertisingFilterPolicy::AllowConnectionAndScan,
+            local_name: None,
+            advertising_data: &[],
+            conn_interval: (None, None),
+        })
+        .await
+        .unwrap();
+
+    let response = mbox.ble_subsystem.read().await;
+    info!("{}", response);
+
+    // remove some advertisement to decrease the packet size
+    info!("delete tx power ad type...");
+    mbox.ble_subsystem
+        .delete_ad_type(AdvertisingDataType::TxPowerLevel)
+        .await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("delete conn interval ad type...");
+    mbox.ble_subsystem
+        .delete_ad_type(AdvertisingDataType::PeripheralConnectionInterval)
+        .await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("update advertising data...");
+    mbox.ble_subsystem
+        .update_advertising_data(&eddystone_advertising_data())
+        .await
+        .unwrap();
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("update advertising data type...");
+    mbox.ble_subsystem
+        .update_advertising_data(&[3, AdvertisingDataType::UuidCompleteList16 as u8, 0xaa, 0xfe])
+        .await
+        .unwrap();
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("update advertising data flags...");
+    mbox.ble_subsystem
+        .update_advertising_data(&[
+            2,
+            AdvertisingDataType::Flags as u8,
+            (0x02 | 0x04) as u8, // BLE general discoverable, without BR/EDR support
+        ])
+        .await
+        .unwrap();
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
+
+fn get_bd_addr() -> BdAddr {
+    let mut bytes = [0u8; 6];
+
+    let lhci_info = LhciC1DeviceInformationCcrp::new();
+    bytes[0] = (lhci_info.uid64 & 0xff) as u8;
+    bytes[1] = ((lhci_info.uid64 >> 8) & 0xff) as u8;
+    bytes[2] = ((lhci_info.uid64 >> 16) & 0xff) as u8;
+    bytes[3] = lhci_info.device_type_id;
+    bytes[4] = (lhci_info.st_company_id & 0xff) as u8;
+    bytes[5] = (lhci_info.st_company_id >> 8 & 0xff) as u8;
+
+    BdAddr(bytes)
+}
+
+fn get_random_addr() -> BdAddr {
+    let mut bytes = [0u8; 6];
+
+    let lhci_info = LhciC1DeviceInformationCcrp::new();
+    bytes[0] = (lhci_info.uid64 & 0xff) as u8;
+    bytes[1] = ((lhci_info.uid64 >> 8) & 0xff) as u8;
+    bytes[2] = ((lhci_info.uid64 >> 16) & 0xff) as u8;
+    bytes[3] = 0;
+    bytes[4] = 0x6E;
+    bytes[5] = 0xED;
+
+    BdAddr(bytes)
+}
+
+const BLE_CFG_IRK: [u8; 16] = [
+    0x12, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0, 0x12, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0,
+];
+const BLE_CFG_ERK: [u8; 16] = [
+    0xfe, 0xdc, 0xba, 0x09, 0x87, 0x65, 0x43, 0x21, 0xfe, 0xdc, 0xba, 0x09, 0x87, 0x65, 0x43, 0x21,
+];
+
+fn get_irk() -> EncryptionKey {
+    EncryptionKey(BLE_CFG_IRK)
+}
+
+fn get_erk() -> EncryptionKey {
+    EncryptionKey(BLE_CFG_ERK)
+}
+
+fn eddystone_advertising_data() -> [u8; 24] {
+    const EDDYSTONE_URL: &[u8] = b"www.rust-lang.com";
+
+    let mut service_data = [0u8; 24];
+    let url_len = EDDYSTONE_URL.len();
+
+    service_data[0] = 6 + url_len as u8;
+    service_data[1] = AdvertisingDataType::ServiceData as u8;
+
+    // 16-bit eddystone uuid
+    service_data[2] = 0xaa;
+    service_data[3] = 0xFE;
+
+    service_data[4] = 0x10; // URL frame type
+    service_data[5] = 22_i8 as u8; // calibrated TX power at 0m
+    service_data[6] = 0x03; // eddystone url prefix = https
+
+    service_data[7..(7 + url_len)].copy_from_slice(EDDYSTONE_URL);
+
+    service_data
+}
diff --git a/tests/stm32/src/bin/wpan_mac.rs b/tests/stm32/src/bin/wpan_mac.rs
new file mode 100644
index 000000000..d64a5ef81
--- /dev/null
+++ b/tests/stm32/src/bin/wpan_mac.rs
@@ -0,0 +1,120 @@
+// required-features: mac
+
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use common::*;
+use embassy_executor::Spawner;
+use embassy_stm32::bind_interrupts;
+use embassy_stm32::ipcc::{Config, ReceiveInterruptHandler, TransmitInterruptHandler};
+use embassy_stm32_wpan::mac::commands::{AssociateRequest, GetRequest, ResetRequest, SetRequest};
+use embassy_stm32_wpan::mac::event::MacEvent;
+use embassy_stm32_wpan::mac::typedefs::{
+    AddressMode, Capabilities, KeyIdMode, MacAddress, MacChannel, PanId, PibId, SecurityLevel,
+};
+use embassy_stm32_wpan::sub::mm;
+use embassy_stm32_wpan::TlMbox;
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs{
+    IPCC_C1_RX => ReceiveInterruptHandler;
+    IPCC_C1_TX => TransmitInterruptHandler;
+});
+
+#[embassy_executor::task]
+async fn run_mm_queue(memory_manager: mm::MemoryManager) {
+    memory_manager.run_queue().await;
+}
+
+#[embassy_executor::main]
+async fn main(spawner: Spawner) {
+    let p = embassy_stm32::init(config());
+    info!("Hello World!");
+
+    let config = Config::default();
+    let mbox = TlMbox::init(p.IPCC, Irqs, config);
+
+    spawner.spawn(run_mm_queue(mbox.mm_subsystem)).unwrap();
+
+    let sys_event = mbox.sys_subsystem.read().await;
+    info!("sys event: {}", sys_event.payload());
+
+    core::mem::drop(sys_event);
+
+    let result = mbox.sys_subsystem.shci_c2_mac_802_15_4_init().await;
+    info!("initialized mac: {}", result);
+
+    info!("resetting");
+    mbox.mac_subsystem
+        .send_command(&ResetRequest {
+            set_default_pib: true,
+            ..Default::default()
+        })
+        .await
+        .unwrap();
+    {
+        let evt = mbox.mac_subsystem.read().await;
+        info!("{:#x}", evt.mac_event());
+    }
+
+    info!("setting extended address");
+    let extended_address: u64 = 0xACDE480000000002;
+    mbox.mac_subsystem
+        .send_command(&SetRequest {
+            pib_attribute_ptr: &extended_address as *const _ as *const u8,
+            pib_attribute: PibId::ExtendedAddress,
+        })
+        .await
+        .unwrap();
+    {
+        let evt = mbox.mac_subsystem.read().await;
+        info!("{:#x}", evt.mac_event());
+    }
+
+    info!("getting extended address");
+    mbox.mac_subsystem
+        .send_command(&GetRequest {
+            pib_attribute: PibId::ExtendedAddress,
+            ..Default::default()
+        })
+        .await
+        .unwrap();
+    {
+        let evt = mbox.mac_subsystem.read().await;
+        info!("{:#x}", evt.mac_event());
+
+        if let Ok(MacEvent::MlmeGetCnf(evt)) = evt.mac_event() {
+            if evt.pib_attribute_value_len == 8 {
+                let value = unsafe { core::ptr::read_unaligned(evt.pib_attribute_value_ptr as *const u64) };
+
+                info!("value {:#x}", value)
+            }
+        }
+    }
+
+    info!("assocation request");
+    let a = AssociateRequest {
+        channel_number: MacChannel::Channel16,
+        channel_page: 0,
+        coord_addr_mode: AddressMode::Short,
+        coord_address: MacAddress { short: [34, 17] },
+        capability_information: Capabilities::ALLOCATE_ADDRESS,
+        coord_pan_id: PanId([0x1A, 0xAA]),
+        security_level: SecurityLevel::Unsecure,
+        key_id_mode: KeyIdMode::Implicite,
+        key_source: [0; 8],
+        key_index: 152,
+    };
+    info!("{}", a);
+    mbox.mac_subsystem.send_command(&a).await.unwrap();
+    {
+        let evt = mbox.mac_subsystem.read().await;
+        info!("{:#x}", evt.mac_event());
+    }
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs
new file mode 100644
index 000000000..3d2a9b8ef
--- /dev/null
+++ b/tests/stm32/src/common.rs
@@ -0,0 +1,44 @@
+#![macro_use]
+
+pub use defmt::*;
+#[allow(unused)]
+use embassy_stm32::time::Hertz;
+use embassy_stm32::Config;
+use {defmt_rtt as _, panic_probe as _};
+
+#[cfg(feature = "stm32f103c8")]
+teleprobe_meta::target!(b"bluepill-stm32f103c8");
+#[cfg(feature = "stm32g491re")]
+teleprobe_meta::target!(b"nucleo-stm32g491re");
+#[cfg(feature = "stm32g071rb")]
+teleprobe_meta::target!(b"nucleo-stm32g071rb");
+#[cfg(feature = "stm32f429zi")]
+teleprobe_meta::target!(b"nucleo-stm32f429zi");
+#[cfg(feature = "stm32wb55rg")]
+teleprobe_meta::target!(b"nucleo-stm32wb55rg");
+#[cfg(feature = "stm32h755zi")]
+teleprobe_meta::target!(b"nucleo-stm32h755zi");
+#[cfg(feature = "stm32u585ai")]
+teleprobe_meta::target!(b"iot-stm32u585ai");
+#[cfg(feature = "stm32h563zi")]
+teleprobe_meta::target!(b"nucleo-stm32h563zi");
+#[cfg(feature = "stm32c031c6")]
+teleprobe_meta::target!(b"nucleo-stm32c031c6");
+
+pub fn config() -> Config {
+    #[allow(unused_mut)]
+    let mut config = Config::default();
+
+    #[cfg(feature = "stm32h755zi")]
+    {
+        config.rcc.sys_ck = Some(Hertz(400_000_000));
+        config.rcc.pll1.q_ck = Some(Hertz(100_000_000));
+    }
+
+    #[cfg(feature = "stm32u585ai")]
+    {
+        config.rcc.mux = embassy_stm32::rcc::ClockSrc::MSI(embassy_stm32::rcc::MSIRange::Range48mhz);
+    }
+
+    config
+}
diff --git a/tests/stm32/src/example_common.rs b/tests/stm32/src/example_common.rs
deleted file mode 100644
index c47ed75c4..000000000
--- a/tests/stm32/src/example_common.rs
+++ /dev/null
@@ -1,31 +0,0 @@
-#![macro_use]
-
-use core::sync::atomic::{AtomicUsize, Ordering};
-
-pub use defmt::*;
-#[allow(unused)]
-use embassy_stm32::time::Hertz;
-use embassy_stm32::Config;
-use {defmt_rtt as _, panic_probe as _};
-
-defmt::timestamp! {"{=u64}", {
-        static COUNT: AtomicUsize = AtomicUsize::new(0);
-        // NOTE(no-CAS) `timestamps` runs with interrupts disabled
-        let n = COUNT.load(Ordering::Relaxed);
-        COUNT.store(n + 1, Ordering::Relaxed);
-        n as u64
-    }
-}
-
-pub fn config() -> Config {
-    #[allow(unused_mut)]
-    let mut config = Config::default();
-
-    #[cfg(feature = "stm32h755zi")]
-    {
-        config.rcc.sys_ck = Some(Hertz(400_000_000));
-        config.rcc.pll1.q_ck = Some(Hertz(100_000_000));
-    }
-
-    config
-}