diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-10-17 15:49:20 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-10-17 15:57:09 +0200 |
| commit | 846f2fc6e4d30a12f4da676c5d12147d1910add1 (patch) | |
| tree | c32a4effc2685001b4c3131aa14ffe3caf554de0 /tests/stm32/src | |
| parent | 683d5c30669bbb788e60ee3dd31ce30ba14c2d69 (diff) | |
stm32/tests: add stm32wl hil.
Diffstat (limited to 'tests/stm32/src')
| -rw-r--r-- | tests/stm32/src/common.rs | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index a802cdfcf..52edae3ac 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs | |||
| @@ -42,6 +42,8 @@ teleprobe_meta::target!(b"nucleo-stm32f207zg"); | |||
| 42 | teleprobe_meta::target!(b"nucleo-stm32f303ze"); | 42 | teleprobe_meta::target!(b"nucleo-stm32f303ze"); |
| 43 | #[cfg(feature = "stm32l496zg")] | 43 | #[cfg(feature = "stm32l496zg")] |
| 44 | teleprobe_meta::target!(b"nucleo-stm32l496zg"); | 44 | teleprobe_meta::target!(b"nucleo-stm32l496zg"); |
| 45 | #[cfg(feature = "stm32wl55jc")] | ||
| 46 | teleprobe_meta::target!(b"nucleo-stm32wl55jc"); | ||
| 45 | 47 | ||
| 46 | macro_rules! define_peris { | 48 | macro_rules! define_peris { |
| 47 | ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => { | 49 | ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => { |
| @@ -181,6 +183,12 @@ define_peris!( | |||
| 181 | SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2, | 183 | SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2, |
| 182 | @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;}, | 184 | @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;}, |
| 183 | ); | 185 | ); |
| 186 | #[cfg(feature = "stm32wl55jc")] | ||
| 187 | define_peris!( | ||
| 188 | UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH4, UART_RX_DMA = DMA1_CH5, | ||
| 189 | SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2, | ||
| 190 | @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;}, | ||
| 191 | ); | ||
| 184 | 192 | ||
| 185 | pub fn config() -> Config { | 193 | pub fn config() -> Config { |
| 186 | #[allow(unused_mut)] | 194 | #[allow(unused_mut)] |
| @@ -299,6 +307,15 @@ pub fn config() -> Config { | |||
| 299 | }); | 307 | }); |
| 300 | } | 308 | } |
| 301 | 309 | ||
| 310 | #[cfg(feature = "stm32wl55jc")] | ||
| 311 | { | ||
| 312 | use embassy_stm32::rcc::*; | ||
| 313 | config.rcc.mux = ClockSrc::MSI(MSIRange::RANGE32M); | ||
| 314 | embassy_stm32::pac::RCC.ccipr().modify(|w| { | ||
| 315 | w.set_rngsel(0b11); // msi | ||
| 316 | }); | ||
| 317 | } | ||
| 318 | |||
| 302 | #[cfg(any(feature = "stm32l552ze"))] | 319 | #[cfg(any(feature = "stm32l552ze"))] |
| 303 | { | 320 | { |
| 304 | use embassy_stm32::rcc::*; | 321 | use embassy_stm32::rcc::*; |
