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authorDario Nieuwenhuis <[email protected]>2025-01-17 16:19:27 +0000
committerGitHub <[email protected]>2025-01-17 16:19:27 +0000
commitc39076724f052fed6781b056bb79c9fa576b87a3 (patch)
tree15580a7500f92fe4702efcdacda0e257b566d1be /tests/stm32
parent169f9c27aa33a279aad51a92b52fc047a54b82af (diff)
parent083f584f29b092a68f99120373dc6ec60fe6bc3d (diff)
Merge pull request #3781 from markus-k/stm32g0-hsisysdiv
stm32/rcc: add HSISYS support for g0
Diffstat (limited to 'tests/stm32')
-rw-r--r--tests/stm32/src/common.rs4
1 files changed, 3 insertions, 1 deletions
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs
index 935a41ed2..829f2cff0 100644
--- a/tests/stm32/src/common.rs
+++ b/tests/stm32/src/common.rs
@@ -284,7 +284,9 @@ pub fn config() -> Config {
284 284
285 #[cfg(feature = "stm32g071rb")] 285 #[cfg(feature = "stm32g071rb")]
286 { 286 {
287 config.rcc.hsi = true; 287 config.rcc.hsi = Some(Hsi {
288 sys_div: HsiSysDiv::DIV1,
289 });
288 config.rcc.pll = Some(Pll { 290 config.rcc.pll = Some(Pll {
289 source: PllSource::HSI, 291 source: PllSource::HSI,
290 prediv: PllPreDiv::DIV1, 292 prediv: PllPreDiv::DIV1,