stm32: Add hash test for sha512, varying lengths

sha512 is only supported by hash_v3 and hash_v4, so add a feature for
those chips.

2 files changed, 34 insertions, 2 deletions

diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml
index 96b49f027..c011a6d7d 100644
--- a/tests/stm32/Cargo.toml
+++ b/tests/stm32/Cargo.toml
@@ -16,7 +16,7 @@ stm32f446re = ["embassy-stm32/stm32f446re", "spi-v1", "chrono", "stop", "can", "
 stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth", "rng", "single-bank"]
 stm32g071rb = ["embassy-stm32/stm32g071rb", "cm0", "not-gpdma", "dac", "ucpd"]
 stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "stop", "not-gpdma", "rng", "fdcan", "cordic"]
-stm32h563zi = ["embassy-stm32/stm32h563zi", "spi-v345", "chrono", "eth", "rng", "fdcan", "hash", "cordic", "stop"]
+stm32h563zi = ["embassy-stm32/stm32h563zi", "spi-v345", "chrono", "eth", "rng", "fdcan", "hash-v34", "cordic", "stop"]
 stm32h753zi = ["embassy-stm32/stm32h753zi", "spi-v345", "chrono", "not-gpdma", "eth", "rng", "fdcan", "hash", "cryp"]
 stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "spi-v345", "chrono", "not-gpdma", "eth", "dac", "rng", "fdcan", "hash", "cryp"]
 stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "spi-v345", "not-gpdma", "rng", "fdcan"]
@@ -33,13 +33,14 @@ stm32wba52cg = ["embassy-stm32/stm32wba52cg", "spi-v345", "chrono", "rng", "hash
 stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono"]
 stm32f091rc = ["embassy-stm32/stm32f091rc", "cm0", "not-gpdma", "chrono"]
 stm32h503rb = ["embassy-stm32/stm32h503rb", "spi-v345", "rng", "stop"]
-stm32h7s3l8 = ["embassy-stm32/stm32h7s3l8", "spi-v345", "rng", "cordic", "hash"] # TODO: fdcan crashes, cryp dma hangs.
+stm32h7s3l8 = ["embassy-stm32/stm32h7s3l8", "spi-v345", "rng", "cordic", "hash-v34"] # TODO: fdcan crashes, cryp dma hangs.
 stm32u083rc = ["embassy-stm32/stm32u083rc", "cm0", "rng", "chrono"]
 
 spi-v1 = []
 spi-v345 = []
 cryp = []
 hash = []
+hash-v34 = ["hash"]
 eth = []
 rng = []
 sdmmc = []
diff --git a/tests/stm32/src/bin/hash.rs b/tests/stm32/src/bin/hash.rs
index 2499f42ed..bb08d0cf1 100644
--- a/tests/stm32/src/bin/hash.rs
+++ b/tests/stm32/src/bin/hash.rs
@@ -94,6 +94,34 @@ fn test_interrupt(hw_hasher: &mut Hash<'_, peripherals::HASH, Blocking>) {
     defmt::assert!(hw_hmac == sw_hmac[..]);
 }
 
+// This uses sha512, so only supported on hash_v3 and up
+#[cfg(feature = "hash-v34")]
+fn test_sizes(hw_hasher: &mut Hash<'_, peripherals::HASH, Blocking>) {
+    let in1 = b"4BPuGudaDK";
+    let in2 = b"cfFIGf0XSNhFBQ5LaIqzjnRKDRkoWweJI06HLUcicIUGjpuDNfOTQNSrRxDoveDPlazeZtt06SIYO5CvHvsJ98XSfO9yJEMHoDpDAmNQtwZOPlKmdiagRXsJ7w7IjdKpQH6I2t";
+
+    for i in 1..10 {
+        // sha512 block size is 128, so test around there
+        for j in [1, 1, 2, 3, 4, 5, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133] {
+            info!("test_sizes i {} j {}", i, j);
+            let mut sw = sha2::Sha512::new();
+            let mut ctx = hw_hasher.start(Algorithm::SHA512, DataType::Width8, None);
+
+            sw.update(&in1[..i]);
+            sw.update(&in2[..j]);
+            hw_hasher.update_blocking(&mut ctx, &in1[..i]);
+            hw_hasher.update_blocking(&mut ctx, &in2[..j]);
+
+            let sw_digest = sw.finalize();
+            let mut hw_digest = [0u8; 64];
+            hw_hasher.finish_blocking(ctx, &mut hw_digest);
+            info!("Hardware: {:?}", hw_digest);
+            info!("Software: {:?}", sw_digest[..]);
+            defmt::assert!(hw_digest == *sw_digest);
+        }
+    }
+}
+
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
     let p: embassy_stm32::Peripherals = init();
@@ -103,6 +131,9 @@ async fn main(_spawner: Spawner) {
     // Run it a second time to check hash-after-hmac
     test_interrupt(&mut hw_hasher);
 
+    #[cfg(feature = "hash-v34")]
+    test_sizes(&mut hw_hasher);
+
     info!("Test OK");
     cortex_m::asm::bkpt();
 }