diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-11-13 01:05:07 +0100 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-11-13 01:05:07 +0100 |
| commit | 066dc297ed4508c334effafcc134296cb776eb06 (patch) | |
| tree | 5930d02cad012665af217acd78464d52b9b48678 /tests | |
| parent | 4fe344ebc0f4e030ff7a03755f27e66e9ad0476f (diff) | |
stm32/rcc: unify l0l1 and l4l5.
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/stm32/src/common.rs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 35f42d28a..e7367d5ed 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs | |||
| @@ -466,7 +466,7 @@ pub fn config() -> Config { | |||
| 466 | mul: PllMul::MUL4, | 466 | mul: PllMul::MUL4, |
| 467 | div: PllDiv::DIV2, // 32Mhz clock (16 * 4 / 2) | 467 | div: PllDiv::DIV2, // 32Mhz clock (16 * 4 / 2) |
| 468 | }); | 468 | }); |
| 469 | config.rcc.mux = ClockSrc::PLL1_P; | 469 | config.rcc.mux = ClockSrc::PLL1_R; |
| 470 | } | 470 | } |
| 471 | 471 | ||
| 472 | #[cfg(any(feature = "stm32l152re"))] | 472 | #[cfg(any(feature = "stm32l152re"))] |
| @@ -478,7 +478,7 @@ pub fn config() -> Config { | |||
| 478 | mul: PllMul::MUL4, | 478 | mul: PllMul::MUL4, |
| 479 | div: PllDiv::DIV2, // 32Mhz clock (16 * 4 / 2) | 479 | div: PllDiv::DIV2, // 32Mhz clock (16 * 4 / 2) |
| 480 | }); | 480 | }); |
| 481 | config.rcc.mux = ClockSrc::PLL1_P; | 481 | config.rcc.mux = ClockSrc::PLL1_R; |
| 482 | } | 482 | } |
| 483 | 483 | ||
| 484 | config | 484 | config |