diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-10-11 00:12:33 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-10-11 00:12:33 +0200 |
| commit | 0cfa8d1bb5807b25612ab21b9894fd59002e6dab (patch) | |
| tree | 5c605b75dcae810c088c8e704551abe3fd85e0db /tests | |
| parent | eff73d6dfa4c5920a55a5ee2bf5c0b2ef68fbae1 (diff) | |
stm32/rcc: use more PLL etc enums from PAC.
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/stm32/src/common.rs | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 79a9b5e86..f2ba5f7fc 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs | |||
| @@ -322,8 +322,8 @@ pub fn config() -> Config { | |||
| 322 | config.rcc.mux = ClockSrc::PLL( | 322 | config.rcc.mux = ClockSrc::PLL( |
| 323 | // 32Mhz clock (16 * 4 / 2) | 323 | // 32Mhz clock (16 * 4 / 2) |
| 324 | PLLSource::HSI16, | 324 | PLLSource::HSI16, |
| 325 | PLLMul::Mul4, | 325 | PLLMul::MUL4, |
| 326 | PLLDiv::Div2, | 326 | PLLDiv::DIV2, |
| 327 | ); | 327 | ); |
| 328 | } | 328 | } |
| 329 | 329 | ||
| @@ -333,8 +333,8 @@ pub fn config() -> Config { | |||
| 333 | config.rcc.mux = ClockSrc::PLL( | 333 | config.rcc.mux = ClockSrc::PLL( |
| 334 | // 32Mhz clock (16 * 4 / 2) | 334 | // 32Mhz clock (16 * 4 / 2) |
| 335 | PLLSource::HSI, | 335 | PLLSource::HSI, |
| 336 | PLLMul::Mul4, | 336 | PLLMul::MUL4, |
| 337 | PLLDiv::Div2, | 337 | PLLDiv::DIV2, |
| 338 | ); | 338 | ); |
| 339 | } | 339 | } |
| 340 | 340 | ||