diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-10-16 03:47:54 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-10-16 04:00:51 +0200 |
| commit | 18e96898eab47840951305481cc669b8b221bdda (patch) | |
| tree | 2a7629edc797c850a69d66728f8a9e7d168c2d8d /tests | |
| parent | 870dcc5970cbd043049e0ce2c9cde208c11a7d32 (diff) | |
stm32/rcc: unify L4 and L5.
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/stm32/src/common.rs | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index c5a24044a..6dc1b3002 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs | |||
| @@ -302,14 +302,17 @@ pub fn config() -> Config { | |||
| 302 | #[cfg(any(feature = "stm32l552ze"))] | 302 | #[cfg(any(feature = "stm32l552ze"))] |
| 303 | { | 303 | { |
| 304 | use embassy_stm32::rcc::*; | 304 | use embassy_stm32::rcc::*; |
| 305 | config.rcc.mux = ClockSrc::PLL( | 305 | config.rcc.hsi16 = true; |
| 306 | config.rcc.mux = ClockSrc::PLL; | ||
| 307 | config.rcc.pll = Some(Pll { | ||
| 306 | // 110Mhz clock (16 / 4 * 55 / 2) | 308 | // 110Mhz clock (16 / 4 * 55 / 2) |
| 307 | PLLSource::HSI16, | 309 | source: PLLSource::HSI16, |
| 308 | PllRDiv::DIV2, | 310 | prediv: PllPreDiv::DIV4, |
| 309 | PllPreDiv::DIV4, | 311 | mul: PllMul::MUL55, |
| 310 | PllMul::MUL55, | 312 | divp: None, |
| 311 | None, | 313 | divq: None, |
| 312 | ); | 314 | divr: Some(PllRDiv::DIV2), |
| 315 | }); | ||
| 313 | } | 316 | } |
| 314 | 317 | ||
| 315 | #[cfg(feature = "stm32u585ai")] | 318 | #[cfg(feature = "stm32u585ai")] |