Merge #1458

1458: rp: remove take!, add bind_interrupts! r=Dirbaio a=pennae

both of the uart interrupts now check a flag that only the dma rx path ever sets (and now unsets again on drop) to return early if it's not as they expect. this is ... not our preferred solution, but if bind_interrupts *must* allow mutiple handlers to be specified then this is the only way we can think of that doesn't break uarts.

Co-authored-by: pennae <[email protected]>

3 files changed, 32 insertions, 20 deletions

diff --git a/tests/rp/src/bin/uart_buffered.rs b/tests/rp/src/bin/uart_buffered.rs
index 1deb22ce6..1dcf57d07 100644
--- a/tests/rp/src/bin/uart_buffered.rs
+++ b/tests/rp/src/bin/uart_buffered.rs
@@ -4,13 +4,18 @@
 
 use defmt::{assert_eq, panic, *};
 use embassy_executor::Spawner;
+use embassy_rp::bind_interrupts;
 use embassy_rp::gpio::{Level, Output};
-use embassy_rp::interrupt;
-use embassy_rp::uart::{BufferedUart, BufferedUartRx, Config, Error, Instance, Parity};
+use embassy_rp::peripherals::UART0;
+use embassy_rp::uart::{BufferedInterruptHandler, BufferedUart, BufferedUartRx, Config, Error, Instance, Parity};
 use embassy_time::{Duration, Timer};
 use embedded_io::asynch::{Read, ReadExactError, Write};
 use {defmt_rtt as _, panic_probe as _};
 
+bind_interrupts!(struct Irqs {
+    UART0_IRQ => BufferedInterruptHandler<UART0>;
+});
+
 async fn read<const N: usize>(uart: &mut BufferedUart<'_, impl Instance>) -> Result<[u8; N], Error> {
     let mut buf = [255; N];
     match uart.read_exact(&mut buf).await {
@@ -60,13 +65,12 @@ async fn main(_spawner: Spawner) {
     info!("Hello World!");
 
     let (mut tx, mut rx, mut uart) = (p.PIN_0, p.PIN_1, p.UART0);
-    let mut irq = interrupt::take!(UART0_IRQ);
 
     {
         let config = Config::default();
         let tx_buf = &mut [0u8; 16];
         let rx_buf = &mut [0u8; 16];
-        let mut uart = BufferedUart::new(&mut uart, &mut irq, &mut tx, &mut rx, tx_buf, rx_buf, config);
+        let mut uart = BufferedUart::new(&mut uart, Irqs, &mut tx, &mut rx, tx_buf, rx_buf, config);
 
         // Make sure we send more bytes than fits in the FIFO, to test the actual
         // bufferedUart.
@@ -86,7 +90,7 @@ async fn main(_spawner: Spawner) {
         let config = Config::default();
         let tx_buf = &mut [0u8; 16];
         let rx_buf = &mut [0u8; 16];
-        let mut uart = BufferedUart::new(&mut uart, &mut irq, &mut tx, &mut rx, tx_buf, rx_buf, config);
+        let mut uart = BufferedUart::new(&mut uart, Irqs, &mut tx, &mut rx, tx_buf, rx_buf, config);
 
         // Make sure we send more bytes than fits in the FIFO, to test the actual
         // bufferedUart.
@@ -121,7 +125,7 @@ async fn main(_spawner: Spawner) {
         config.baudrate = 1000;
         let tx_buf = &mut [0u8; 16];
         let rx_buf = &mut [0u8; 16];
-        let mut uart = BufferedUart::new(&mut uart, &mut irq, &mut tx, &mut rx, tx_buf, rx_buf, config);
+        let mut uart = BufferedUart::new(&mut uart, Irqs, &mut tx, &mut rx, tx_buf, rx_buf, config);
 
         // break on empty buffer
         uart.send_break(20).await;
@@ -155,7 +159,7 @@ async fn main(_spawner: Spawner) {
         config.baudrate = 1000;
         config.parity = Parity::ParityEven;
         let rx_buf = &mut [0u8; 16];
-        let mut uart = BufferedUartRx::new(&mut uart, &mut irq, &mut rx, rx_buf, config);
+        let mut uart = BufferedUartRx::new(&mut uart, Irqs, &mut rx, rx_buf, config);
 
         async fn chr(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, parity: u32) {
             send(pin, v, Some(parity != 0)).await;
@@ -202,7 +206,7 @@ async fn main(_spawner: Spawner) {
         let mut config = Config::default();
         config.baudrate = 1000;
         let rx_buf = &mut [0u8; 16];
-        let mut uart = BufferedUartRx::new(&mut uart, &mut irq, &mut rx, rx_buf, config);
+        let mut uart = BufferedUartRx::new(&mut uart, Irqs, &mut rx, rx_buf, config);
 
         async fn chr(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, good: bool) {
             if good {
diff --git a/tests/rp/src/bin/uart_dma.rs b/tests/rp/src/bin/uart_dma.rs
index 52f42e582..75be76eda 100644
--- a/tests/rp/src/bin/uart_dma.rs
+++ b/tests/rp/src/bin/uart_dma.rs
@@ -4,12 +4,17 @@
 
 use defmt::{assert_eq, *};
 use embassy_executor::Spawner;
+use embassy_rp::bind_interrupts;
 use embassy_rp::gpio::{Level, Output};
-use embassy_rp::interrupt;
-use embassy_rp::uart::{Async, Config, Error, Instance, Parity, Uart, UartRx};
+use embassy_rp::peripherals::UART0;
+use embassy_rp::uart::{Async, Config, Error, Instance, InterruptHandler, Parity, Uart, UartRx};
 use embassy_time::{Duration, Timer};
 use {defmt_rtt as _, panic_probe as _};
 
+bind_interrupts!(struct Irqs {
+    UART0_IRQ => InterruptHandler<UART0>;
+});
+
 async fn read<const N: usize>(uart: &mut Uart<'_, impl Instance, Async>) -> Result<[u8; N], Error> {
     let mut buf = [255; N];
     uart.read(&mut buf).await?;
@@ -51,7 +56,6 @@ async fn main(_spawner: Spawner) {
     info!("Hello World!");
 
     let (mut tx, mut rx, mut uart) = (p.PIN_0, p.PIN_1, p.UART0);
-    let mut irq = interrupt::take!(UART0_IRQ);
 
     // We can't send too many bytes, they have to fit in the FIFO.
     // This is because we aren't sending+receiving at the same time.
@@ -61,7 +65,7 @@ async fn main(_spawner: Spawner) {
             &mut uart,
             &mut tx,
             &mut rx,
-            &mut irq,
+            Irqs,
             &mut p.DMA_CH0,
             &mut p.DMA_CH1,
             config,
@@ -82,7 +86,7 @@ async fn main(_spawner: Spawner) {
             &mut uart,
             &mut tx,
             &mut rx,
-            &mut irq,
+            Irqs,
             &mut p.DMA_CH0,
             &mut p.DMA_CH1,
             config,
@@ -111,7 +115,7 @@ async fn main(_spawner: Spawner) {
             &mut uart,
             &mut tx,
             &mut rx,
-            &mut irq,
+            Irqs,
             &mut p.DMA_CH0,
             &mut p.DMA_CH1,
             config,
@@ -154,7 +158,7 @@ async fn main(_spawner: Spawner) {
         let mut config = Config::default();
         config.baudrate = 1000;
         config.parity = Parity::ParityEven;
-        let mut uart = UartRx::new(&mut uart, &mut rx, &mut irq, &mut p.DMA_CH0, config);
+        let mut uart = UartRx::new(&mut uart, &mut rx, Irqs, &mut p.DMA_CH0, config);
 
         async fn chr(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, parity: u32) {
             send(pin, v, Some(parity != 0)).await;
@@ -199,7 +203,7 @@ async fn main(_spawner: Spawner) {
         // choose a very slow baud rate to make tests reliable even with O0
         let mut config = Config::default();
         config.baudrate = 1000;
-        let mut uart = UartRx::new(&mut uart, &mut rx, &mut irq, &mut p.DMA_CH0, config);
+        let mut uart = UartRx::new(&mut uart, &mut rx, Irqs, &mut p.DMA_CH0, config);
 
         async fn chr(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, good: bool) {
             if good {
diff --git a/tests/rp/src/bin/uart_upgrade.rs b/tests/rp/src/bin/uart_upgrade.rs
index d8c9aecf6..8605bb1c5 100644
--- a/tests/rp/src/bin/uart_upgrade.rs
+++ b/tests/rp/src/bin/uart_upgrade.rs
@@ -4,11 +4,16 @@
 
 use defmt::{assert_eq, *};
 use embassy_executor::Spawner;
-use embassy_rp::interrupt;
-use embassy_rp::uart::{Config, Uart};
+use embassy_rp::bind_interrupts;
+use embassy_rp::peripherals::UART0;
+use embassy_rp::uart::{BufferedInterruptHandler, Config, Uart};
 use embedded_io::asynch::{Read, Write};
 use {defmt_rtt as _, panic_probe as _};
 
+bind_interrupts!(struct Irqs {
+    UART0_IRQ => BufferedInterruptHandler<UART0>;
+});
+
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
     let p = embassy_rp::init(Default::default());
@@ -29,11 +34,10 @@ async fn main(_spawner: Spawner) {
     uart.blocking_read(&mut buf).unwrap();
     assert_eq!(buf, data);
 
-    let irq = interrupt::take!(UART0_IRQ);
     let tx_buf = &mut [0u8; 16];
     let rx_buf = &mut [0u8; 16];
 
-    let mut uart = uart.into_buffered(irq, tx_buf, rx_buf);
+    let mut uart = uart.into_buffered(Irqs, tx_buf, rx_buf);
 
     // Make sure we send more bytes than fits in the FIFO, to test the actual
     // bufferedUart.