Add async CRYP to test.

2 files changed, 22 insertions, 10 deletions

diff --git a/tests/stm32/src/bin/cryp.rs b/tests/stm32/src/bin/cryp.rs
index f105abf26..6bca55f55 100644
--- a/tests/stm32/src/bin/cryp.rs
+++ b/tests/stm32/src/bin/cryp.rs
@@ -10,9 +10,17 @@ use aes_gcm::aead::{AeadInPlace, KeyInit};
 use aes_gcm::Aes128Gcm;
 use common::*;
 use embassy_executor::Spawner;
-use embassy_stm32::cryp::*;
+use embassy_stm32::{
+    bind_interrupts,
+    cryp::{self, *},
+    peripherals
+};
 use {defmt_rtt as _, panic_probe as _};
 
+bind_interrupts!(struct Irqs {
+    CRYP => cryp::InterruptHandler<peripherals::CRYP>;
+});
+
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
     let p: embassy_stm32::Peripherals = embassy_stm32::init(config());
@@ -22,27 +30,30 @@ async fn main(_spawner: Spawner) {
     const AAD1: &[u8] = b"additional data 1 stdargadrhaethaethjatjatjaetjartjstrjsfkk;'jopofyuisrteytweTASTUIKFUKIXTRDTEREharhaeryhaterjartjarthaethjrtjarthaetrhartjatejatrjsrtjartjyt1";
     const AAD2: &[u8] = b"additional data 2 stdhthsthsthsrthsrthsrtjdykjdukdyuldadfhsdghsdghsdghsadghjk'hioethjrtjarthaetrhartjatecfgjhzdfhgzdfhzdfghzdfhzdfhzfhjatrjsrtjartjytjfytjfyg";
 
-    let hw_cryp = Cryp::new(p.CRYP);
+    let in_dma = peri!(p, CRYP_IN_DMA);
+    let out_dma = peri!(p, CRYP_OUT_DMA);
+
+    let mut hw_cryp = Cryp::new(p.CRYP, in_dma, out_dma, Irqs);
     let key: [u8; 16] = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16];
     let mut ciphertext: [u8; PAYLOAD1.len() + PAYLOAD2.len()] = [0; PAYLOAD1.len() + PAYLOAD2.len()];
     let mut plaintext: [u8; PAYLOAD1.len() + PAYLOAD2.len()] = [0; PAYLOAD1.len() + PAYLOAD2.len()];
     let iv: [u8; 12] = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12];
 
-    // Encrypt in hardware using AES-GCM 128-bit
+    // Encrypt in hardware using AES-GCM 128-bit in blocking mode.
     let aes_gcm = AesGcm::new(&key, &iv);
-    let mut gcm_encrypt = hw_cryp.start(&aes_gcm, Direction::Encrypt);
+    let mut gcm_encrypt = hw_cryp.start_blocking(&aes_gcm, Direction::Encrypt);
     hw_cryp.aad_blocking(&mut gcm_encrypt, AAD1, false);
     hw_cryp.aad_blocking(&mut gcm_encrypt, AAD2, true);
     hw_cryp.payload_blocking(&mut gcm_encrypt, PAYLOAD1, &mut ciphertext[..PAYLOAD1.len()], false);
     hw_cryp.payload_blocking(&mut gcm_encrypt, PAYLOAD2, &mut ciphertext[PAYLOAD1.len()..], true);
     let encrypt_tag = hw_cryp.finish_blocking(gcm_encrypt);
 
-    // Decrypt in hardware using AES-GCM 128-bit
-    let mut gcm_decrypt = hw_cryp.start(&aes_gcm, Direction::Decrypt);
-    hw_cryp.aad_blocking(&mut gcm_decrypt, AAD1, false);
-    hw_cryp.aad_blocking(&mut gcm_decrypt, AAD2, true);
-    hw_cryp.payload_blocking(&mut gcm_decrypt, &ciphertext, &mut plaintext, true);
-    let decrypt_tag = hw_cryp.finish_blocking(gcm_decrypt);
+    // Decrypt in hardware using AES-GCM 128-bit in async (DMA) mode.
+    let mut gcm_decrypt = hw_cryp.start(&aes_gcm, Direction::Decrypt).await;
+    hw_cryp.aad(&mut gcm_decrypt, AAD1, false).await;
+    hw_cryp.aad(&mut gcm_decrypt, AAD2, true).await;
+    hw_cryp.payload(&mut gcm_decrypt, &ciphertext, &mut plaintext, true).await;
+    let decrypt_tag = hw_cryp.finish(gcm_decrypt).await;
 
     info!("AES-GCM Ciphertext: {:?}", ciphertext);
     info!("AES-GCM Plaintext: {:?}", plaintext);
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs
index 3297ea7e2..c379863a8 100644
--- a/tests/stm32/src/common.rs
+++ b/tests/stm32/src/common.rs
@@ -140,6 +140,7 @@ define_peris!(
 );
 #[cfg(any(feature = "stm32h755zi", feature = "stm32h753zi"))]
 define_peris!(
+    CRYP_IN_DMA = DMA1_CH0, CRYP_OUT_DMA = DMA1_CH1,
     UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH0, UART_RX_DMA = DMA1_CH1,
     SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PB5, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH0, SPI_RX_DMA = DMA1_CH1,
     ADC = ADC1, DAC = DAC1, DAC_PIN = PA4,