Merge pull request #2617 from embassy-rs/u5-rcc

stm32/rcc: port U5 to new API, add all PLLs, all HSE modes.

3 files changed, 14 insertions, 2 deletions

diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml
index 5b28b5849..828a28e2c 100644
--- a/tests/stm32/Cargo.toml
+++ b/tests/stm32/Cargo.toml
@@ -26,7 +26,7 @@ stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma", "rng", "hash"
 stm32l4r5zi = ["embassy-stm32/stm32l4r5zi", "chrono", "not-gpdma", "rng"]
 stm32l552ze = ["embassy-stm32/stm32l552ze", "not-gpdma", "rng", "hash"]
 stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng", "hash"]
-stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng"]
+stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng", "hash"]
 stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"]
 stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng", "hash"]
 stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono"]
diff --git a/tests/stm32/build.rs b/tests/stm32/build.rs
index bc5589164..176adff62 100644
--- a/tests/stm32/build.rs
+++ b/tests/stm32/build.rs
@@ -16,6 +16,7 @@ fn main() -> Result<(), Box<dyn Error>> {
         feature = "stm32l073rz",
         // wrong ram size in stm32-data
         feature = "stm32wl55jc",
+        feature = "stm32u5a5zj",
         // no VTOR, so interrupts can't work when running from RAM
         feature = "stm32f091rc",
     )) {
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs
index 50a7f9bae..1e6b1cce9 100644
--- a/tests/stm32/src/common.rs
+++ b/tests/stm32/src/common.rs
@@ -577,7 +577,18 @@ pub fn config() -> Config {
     #[cfg(any(feature = "stm32u585ai", feature = "stm32u5a5zj"))]
     {
         use embassy_stm32::rcc::*;
-        config.rcc.mux = ClockSrc::MSI(Msirange::RANGE_48MHZ);
+        config.rcc.hsi = true;
+        config.rcc.pll1 = Some(Pll {
+            source: PllSource::HSI, // 16 MHz
+            prediv: PllPreDiv::DIV1,
+            mul: PllMul::MUL10,
+            divp: None,
+            divq: None,
+            divr: Some(PllDiv::DIV1), // 160 MHz
+        });
+        config.rcc.mux = ClockSrc::PLL1_R;
+        config.rcc.voltage_range = VoltageScale::RANGE1;
+        config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: true }); // needed for USB
     }
 
     #[cfg(feature = "stm32wba52cg")]