aboutsummaryrefslogtreecommitdiff
path: root/tests
diff options
context:
space:
mode:
authorxoviat <[email protected]>2023-05-24 17:29:56 -0500
committerxoviat <[email protected]>2023-05-24 17:29:56 -0500
commit316be179af500fdf31606f085adf77c6879a396d (patch)
tree7a100f1dc652a53a327d0c0bd7a53be216db30c0 /tests
parent627d7f66efb7ff3dcf627477814c52ba4171bade (diff)
stm32: move to bind_interrupts
disable lora functionality for now
Diffstat (limited to 'tests')
-rw-r--r--tests/stm32/src/bin/sdmmc.rs23
-rw-r--r--tests/stm32/src/bin/usart.rs52
-rw-r--r--tests/stm32/src/bin/usart_dma.rs85
-rw-r--r--tests/stm32/src/bin/usart_rx_ringbuffered.rs79
4 files changed, 121 insertions, 118 deletions
diff --git a/tests/stm32/src/bin/sdmmc.rs b/tests/stm32/src/bin/sdmmc.rs
index c4e50cb4a..7d96cf41e 100644
--- a/tests/stm32/src/bin/sdmmc.rs
+++ b/tests/stm32/src/bin/sdmmc.rs
@@ -7,9 +7,13 @@ use defmt::{assert_eq, *};
7use embassy_executor::Spawner; 7use embassy_executor::Spawner;
8use embassy_stm32::sdmmc::{DataBlock, Sdmmc}; 8use embassy_stm32::sdmmc::{DataBlock, Sdmmc};
9use embassy_stm32::time::mhz; 9use embassy_stm32::time::mhz;
10use embassy_stm32::{interrupt, Config}; 10use embassy_stm32::{bind_interrupts, peripherals, sdmmc, Config};
11use {defmt_rtt as _, panic_probe as _}; 11use {defmt_rtt as _, panic_probe as _};
12 12
13bind_interrupts!(struct Irqs {
14 SDIO => sdmmc::InterruptHandler<peripherals::SDIO>;
15});
16
13#[embassy_executor::main] 17#[embassy_executor::main]
14async fn main(_spawner: Spawner) { 18async fn main(_spawner: Spawner) {
15 info!("Hello World!"); 19 info!("Hello World!");
@@ -20,17 +24,8 @@ async fn main(_spawner: Spawner) {
20 let p = embassy_stm32::init(config); 24 let p = embassy_stm32::init(config);
21 25
22 #[cfg(feature = "stm32f429zi")] 26 #[cfg(feature = "stm32f429zi")]
23 let (mut sdmmc, mut irq, mut dma, mut clk, mut cmd, mut d0, mut d1, mut d2, mut d3) = ( 27 let (mut sdmmc, mut dma, mut clk, mut cmd, mut d0, mut d1, mut d2, mut d3) =
24 p.SDIO, 28 (p.SDIO, p.DMA2_CH3, p.PC12, p.PD2, p.PC8, p.PC9, p.PC10, p.PC11);
25 interrupt::take!(SDIO),
26 p.DMA2_CH3,
27 p.PC12,
28 p.PD2,
29 p.PC8,
30 p.PC9,
31 p.PC10,
32 p.PC11,
33 );
34 29
35 // Arbitrary block index 30 // Arbitrary block index
36 let block_idx = 16; 31 let block_idx = 16;
@@ -48,7 +43,7 @@ async fn main(_spawner: Spawner) {
48 info!("initializing in 4-bit mode..."); 43 info!("initializing in 4-bit mode...");
49 let mut s = Sdmmc::new_4bit( 44 let mut s = Sdmmc::new_4bit(
50 &mut sdmmc, 45 &mut sdmmc,
51 &mut irq, 46 Irqs,
52 &mut dma, 47 &mut dma,
53 &mut clk, 48 &mut clk,
54 &mut cmd, 49 &mut cmd,
@@ -97,7 +92,7 @@ async fn main(_spawner: Spawner) {
97 info!("initializing in 1-bit mode..."); 92 info!("initializing in 1-bit mode...");
98 let mut s = Sdmmc::new_1bit( 93 let mut s = Sdmmc::new_1bit(
99 &mut sdmmc, 94 &mut sdmmc,
100 &mut irq, 95 Irqs,
101 &mut dma, 96 &mut dma,
102 &mut clk, 97 &mut clk,
103 &mut cmd, 98 &mut cmd,
diff --git a/tests/stm32/src/bin/usart.rs b/tests/stm32/src/bin/usart.rs
index 0749f8406..415c7afa9 100644
--- a/tests/stm32/src/bin/usart.rs
+++ b/tests/stm32/src/bin/usart.rs
@@ -7,11 +7,37 @@ mod example_common;
7use defmt::assert_eq; 7use defmt::assert_eq;
8use embassy_executor::Spawner; 8use embassy_executor::Spawner;
9use embassy_stm32::dma::NoDma; 9use embassy_stm32::dma::NoDma;
10use embassy_stm32::interrupt;
11use embassy_stm32::usart::{Config, Error, Uart}; 10use embassy_stm32::usart::{Config, Error, Uart};
11use embassy_stm32::{bind_interrupts, peripherals, usart};
12use embassy_time::{Duration, Instant}; 12use embassy_time::{Duration, Instant};
13use example_common::*; 13use example_common::*;
14 14
15#[cfg(any(
16 feature = "stm32f103c8",
17 feature = "stm32g491re",
18 feature = "stm32g071rb",
19 feature = "stm32h755zi",
20 feature = "stm32c031c6",
21))]
22bind_interrupts!(struct Irqs {
23 USART1 => usart::InterruptHandler<peripherals::USART1>;
24});
25
26#[cfg(feature = "stm32u585ai")]
27bind_interrupts!(struct Irqs {
28 USART3 => usart::InterruptHandler<peripherals::USART3>;
29});
30
31#[cfg(feature = "stm32f429zi")]
32bind_interrupts!(struct Irqs {
33 USART6 => usart::InterruptHandler<peripherals::USART6>;
34});
35
36#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
37bind_interrupts!(struct Irqs {
38 LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
39});
40
15#[embassy_executor::main] 41#[embassy_executor::main]
16async fn main(_spawner: Spawner) { 42async fn main(_spawner: Spawner) {
17 let p = embassy_stm32::init(config()); 43 let p = embassy_stm32::init(config());
@@ -20,27 +46,27 @@ async fn main(_spawner: Spawner) {
20 // Arduino pins D0 and D1 46 // Arduino pins D0 and D1
21 // They're connected together with a 1K resistor. 47 // They're connected together with a 1K resistor.
22 #[cfg(feature = "stm32f103c8")] 48 #[cfg(feature = "stm32f103c8")]
23 let (mut tx, mut rx, mut usart, mut irq) = (p.PA9, p.PA10, p.USART1, interrupt::take!(USART1)); 49 let (mut tx, mut rx, mut usart) = (p.PA9, p.PA10, p.USART1);
24 #[cfg(feature = "stm32g491re")] 50 #[cfg(feature = "stm32g491re")]
25 let (mut tx, mut rx, mut usart, mut irq) = (p.PC4, p.PC5, p.USART1, interrupt::take!(USART1)); 51 let (mut tx, mut rx, mut usart) = (p.PC4, p.PC5, p.USART1);
26 #[cfg(feature = "stm32g071rb")] 52 #[cfg(feature = "stm32g071rb")]
27 let (mut tx, mut rx, mut usart, mut irq) = (p.PC4, p.PC5, p.USART1, interrupt::take!(USART1)); 53 let (mut tx, mut rx, mut usart) = (p.PC4, p.PC5, p.USART1);
28 #[cfg(feature = "stm32f429zi")] 54 #[cfg(feature = "stm32f429zi")]
29 let (mut tx, mut rx, mut usart, mut irq) = (p.PG14, p.PG9, p.USART6, interrupt::take!(USART6)); 55 let (mut tx, mut rx, mut usart) = (p.PG14, p.PG9, p.USART6);
30 #[cfg(feature = "stm32wb55rg")] 56 #[cfg(feature = "stm32wb55rg")]
31 let (mut tx, mut rx, mut usart, mut irq) = (p.PA2, p.PA3, p.LPUART1, interrupt::take!(LPUART1)); 57 let (mut tx, mut rx, mut usart) = (p.PA2, p.PA3, p.LPUART1);
32 #[cfg(feature = "stm32h755zi")] 58 #[cfg(feature = "stm32h755zi")]
33 let (mut tx, mut rx, mut usart, mut irq) = (p.PB6, p.PB7, p.USART1, interrupt::take!(USART1)); 59 let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.USART1);
34 #[cfg(feature = "stm32u585ai")] 60 #[cfg(feature = "stm32u585ai")]
35 let (mut tx, mut rx, mut usart, mut irq) = (p.PD8, p.PD9, p.USART3, interrupt::take!(USART3)); 61 let (mut tx, mut rx, mut usart) = (p.PD8, p.PD9, p.USART3);
36 #[cfg(feature = "stm32h563zi")] 62 #[cfg(feature = "stm32h563zi")]
37 let (mut tx, mut rx, mut usart, mut irq) = (p.PB6, p.PB7, p.LPUART1, interrupt::take!(LPUART1)); 63 let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.LPUART1);
38 #[cfg(feature = "stm32c031c6")] 64 #[cfg(feature = "stm32c031c6")]
39 let (mut tx, mut rx, mut usart, mut irq) = (p.PB6, p.PB7, p.USART1, interrupt::take!(USART1)); 65 let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.USART1);
40 66
41 { 67 {
42 let config = Config::default(); 68 let config = Config::default();
43 let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, &mut irq, NoDma, NoDma, config); 69 let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
44 70
45 // We can't send too many bytes, they have to fit in the FIFO. 71 // We can't send too many bytes, they have to fit in the FIFO.
46 // This is because we aren't sending+receiving at the same time. 72 // This is because we aren't sending+receiving at the same time.
@@ -56,7 +82,7 @@ async fn main(_spawner: Spawner) {
56 // Test error handling with with an overflow error 82 // Test error handling with with an overflow error
57 { 83 {
58 let config = Config::default(); 84 let config = Config::default();
59 let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, &mut irq, NoDma, NoDma, config); 85 let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
60 86
61 // Send enough bytes to fill the RX FIFOs off all USART versions. 87 // Send enough bytes to fill the RX FIFOs off all USART versions.
62 let data = [0xC0, 0xDE, 0x12, 0x23, 0x34]; 88 let data = [0xC0, 0xDE, 0x12, 0x23, 0x34];
@@ -90,7 +116,7 @@ async fn main(_spawner: Spawner) {
90 116
91 let mut config = Config::default(); 117 let mut config = Config::default();
92 config.baudrate = baudrate; 118 config.baudrate = baudrate;
93 let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, &mut irq, NoDma, NoDma, config); 119 let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
94 120
95 let n = (baudrate as usize / 100).max(64); 121 let n = (baudrate as usize / 100).max(64);
96 122
diff --git a/tests/stm32/src/bin/usart_dma.rs b/tests/stm32/src/bin/usart_dma.rs
index 62444f0a8..7f002b97e 100644
--- a/tests/stm32/src/bin/usart_dma.rs
+++ b/tests/stm32/src/bin/usart_dma.rs
@@ -7,10 +7,36 @@ mod example_common;
7use defmt::assert_eq; 7use defmt::assert_eq;
8use embassy_executor::Spawner; 8use embassy_executor::Spawner;
9use embassy_futures::join::join; 9use embassy_futures::join::join;
10use embassy_stm32::interrupt;
11use embassy_stm32::usart::{Config, Uart}; 10use embassy_stm32::usart::{Config, Uart};
11use embassy_stm32::{bind_interrupts, peripherals, usart};
12use example_common::*; 12use example_common::*;
13 13
14#[cfg(any(
15 feature = "stm32f103c8",
16 feature = "stm32g491re",
17 feature = "stm32g071rb",
18 feature = "stm32h755zi",
19 feature = "stm32c031c6",
20))]
21bind_interrupts!(struct Irqs {
22 USART1 => usart::InterruptHandler<peripherals::USART1>;
23});
24
25#[cfg(feature = "stm32u585ai")]
26bind_interrupts!(struct Irqs {
27 USART3 => usart::InterruptHandler<peripherals::USART3>;
28});
29
30#[cfg(feature = "stm32f429zi")]
31bind_interrupts!(struct Irqs {
32 USART6 => usart::InterruptHandler<peripherals::USART6>;
33});
34
35#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
36bind_interrupts!(struct Irqs {
37 LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
38});
39
14#[embassy_executor::main] 40#[embassy_executor::main]
15async fn main(_spawner: Spawner) { 41async fn main(_spawner: Spawner) {
16 let p = embassy_stm32::init(config()); 42 let p = embassy_stm32::init(config());
@@ -19,62 +45,23 @@ async fn main(_spawner: Spawner) {
19 // Arduino pins D0 and D1 45 // Arduino pins D0 and D1
20 // They're connected together with a 1K resistor. 46 // They're connected together with a 1K resistor.
21 #[cfg(feature = "stm32f103c8")] 47 #[cfg(feature = "stm32f103c8")]
22 let (tx, rx, usart, irq, tx_dma, rx_dma) = ( 48 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, Irqs, p.DMA1_CH4, p.DMA1_CH5);
23 p.PA9,
24 p.PA10,
25 p.USART1,
26 interrupt::take!(USART1),
27 p.DMA1_CH4,
28 p.DMA1_CH5,
29 );
30 #[cfg(feature = "stm32g491re")] 49 #[cfg(feature = "stm32g491re")]
31 let (tx, rx, usart, irq, tx_dma, rx_dma) = 50 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
32 (p.PC4, p.PC5, p.USART1, interrupt::take!(USART1), p.DMA1_CH1, p.DMA1_CH2);
33 #[cfg(feature = "stm32g071rb")] 51 #[cfg(feature = "stm32g071rb")]
34 let (tx, rx, usart, irq, tx_dma, rx_dma) = 52 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
35 (p.PC4, p.PC5, p.USART1, interrupt::take!(USART1), p.DMA1_CH1, p.DMA1_CH2);
36 #[cfg(feature = "stm32f429zi")] 53 #[cfg(feature = "stm32f429zi")]
37 let (tx, rx, usart, irq, tx_dma, rx_dma) = ( 54 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, Irqs, p.DMA2_CH6, p.DMA2_CH1);
38 p.PG14,
39 p.PG9,
40 p.USART6,
41 interrupt::take!(USART6),
42 p.DMA2_CH6,
43 p.DMA2_CH1,
44 );
45 #[cfg(feature = "stm32wb55rg")] 55 #[cfg(feature = "stm32wb55rg")]
46 let (tx, rx, usart, irq, tx_dma, rx_dma) = ( 56 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
47 p.PA2,
48 p.PA3,
49 p.LPUART1,
50 interrupt::take!(LPUART1),
51 p.DMA1_CH1,
52 p.DMA1_CH2,
53 );
54 #[cfg(feature = "stm32h755zi")] 57 #[cfg(feature = "stm32h755zi")]
55 let (tx, rx, usart, irq, tx_dma, rx_dma) = 58 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH0, p.DMA1_CH1);
56 (p.PB6, p.PB7, p.USART1, interrupt::take!(USART1), p.DMA1_CH0, p.DMA1_CH1);
57 #[cfg(feature = "stm32u585ai")] 59 #[cfg(feature = "stm32u585ai")]
58 let (tx, rx, usart, irq, tx_dma, rx_dma) = ( 60 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1);
59 p.PD8,
60 p.PD9,
61 p.USART3,
62 interrupt::take!(USART3),
63 p.GPDMA1_CH0,
64 p.GPDMA1_CH1,
65 );
66 #[cfg(feature = "stm32h563zi")] 61 #[cfg(feature = "stm32h563zi")]
67 let (tx, rx, usart, irq, tx_dma, rx_dma) = ( 62 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.LPUART1, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1);
68 p.PB6,
69 p.PB7,
70 p.LPUART1,
71 interrupt::take!(LPUART1),
72 p.GPDMA1_CH0,
73 p.GPDMA1_CH1,
74 );
75 #[cfg(feature = "stm32c031c6")] 63 #[cfg(feature = "stm32c031c6")]
76 let (tx, rx, usart, irq, tx_dma, rx_dma) = 64 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
77 (p.PB6, p.PB7, p.USART1, interrupt::take!(USART1), p.DMA1_CH1, p.DMA1_CH2);
78 65
79 let config = Config::default(); 66 let config = Config::default();
80 let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config); 67 let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config);
diff --git a/tests/stm32/src/bin/usart_rx_ringbuffered.rs b/tests/stm32/src/bin/usart_rx_ringbuffered.rs
index 9d75dbe55..3a34773f7 100644
--- a/tests/stm32/src/bin/usart_rx_ringbuffered.rs
+++ b/tests/stm32/src/bin/usart_rx_ringbuffered.rs
@@ -8,13 +8,40 @@
8mod example_common; 8mod example_common;
9use defmt::{assert_eq, panic}; 9use defmt::{assert_eq, panic};
10use embassy_executor::Spawner; 10use embassy_executor::Spawner;
11use embassy_stm32::interrupt;
12use embassy_stm32::usart::{Config, DataBits, Parity, RingBufferedUartRx, StopBits, Uart, UartTx}; 11use embassy_stm32::usart::{Config, DataBits, Parity, RingBufferedUartRx, StopBits, Uart, UartTx};
12use embassy_stm32::{bind_interrupts, peripherals, usart};
13use embassy_time::{Duration, Timer}; 13use embassy_time::{Duration, Timer};
14use example_common::*; 14use example_common::*;
15use rand_chacha::ChaCha8Rng; 15use rand_chacha::ChaCha8Rng;
16use rand_core::{RngCore, SeedableRng}; 16use rand_core::{RngCore, SeedableRng};
17 17
18#[cfg(any(
19 feature = "stm32f103c8",
20 feature = "stm32g491re",
21 feature = "stm32g071rb",
22 feature = "stm32h755zi",
23 feature = "stm32c031c6",
24))]
25bind_interrupts!(struct Irqs {
26 USART1 => usart::InterruptHandler<peripherals::USART1>;
27});
28
29#[cfg(feature = "stm32u585ai")]
30bind_interrupts!(struct Irqs {
31 USART3 => usart::InterruptHandler<peripherals::USART3>;
32});
33
34#[cfg(feature = "stm32f429zi")]
35bind_interrupts!(struct Irqs {
36 USART1 => usart::InterruptHandler<peripherals::USART1>;
37 USART6 => usart::InterruptHandler<peripherals::USART6>;
38});
39
40#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
41bind_interrupts!(struct Irqs {
42 LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
43});
44
18#[cfg(feature = "stm32f103c8")] 45#[cfg(feature = "stm32f103c8")]
19mod board { 46mod board {
20 pub type Uart = embassy_stm32::peripherals::USART1; 47 pub type Uart = embassy_stm32::peripherals::USART1;
@@ -74,53 +101,21 @@ async fn main(spawner: Spawner) {
74 // Arduino pins D0 and D1 101 // Arduino pins D0 and D1
75 // They're connected together with a 1K resistor. 102 // They're connected together with a 1K resistor.
76 #[cfg(feature = "stm32f103c8")] 103 #[cfg(feature = "stm32f103c8")]
77 let (tx, rx, usart, irq, tx_dma, rx_dma) = ( 104 let (tx, rx, usart, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, p.DMA1_CH4, p.DMA1_CH5);
78 p.PA9,
79 p.PA10,
80 p.USART1,
81 interrupt::take!(USART1),
82 p.DMA1_CH4,
83 p.DMA1_CH5,
84 );
85 #[cfg(feature = "stm32g491re")] 105 #[cfg(feature = "stm32g491re")]
86 let (tx, rx, usart, irq, tx_dma, rx_dma) = 106 let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
87 (p.PC4, p.PC5, p.USART1, interrupt::take!(USART1), p.DMA1_CH1, p.DMA1_CH2);
88 #[cfg(feature = "stm32g071rb")] 107 #[cfg(feature = "stm32g071rb")]
89 let (tx, rx, usart, irq, tx_dma, rx_dma) = 108 let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
90 (p.PC4, p.PC5, p.USART1, interrupt::take!(USART1), p.DMA1_CH1, p.DMA1_CH2);
91 #[cfg(feature = "stm32f429zi")] 109 #[cfg(feature = "stm32f429zi")]
92 let (tx, rx, usart, irq, tx_dma, rx_dma) = ( 110 let (tx, rx, usart, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, p.DMA2_CH6, p.DMA2_CH1);
93 p.PG14,
94 p.PG9,
95 p.USART6,
96 interrupt::take!(USART6),
97 p.DMA2_CH6,
98 p.DMA2_CH1,
99 );
100 #[cfg(feature = "stm32wb55rg")] 111 #[cfg(feature = "stm32wb55rg")]
101 let (tx, rx, usart, irq, tx_dma, rx_dma) = ( 112 let (tx, rx, usart, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, p.DMA1_CH1, p.DMA1_CH2);
102 p.PA2,
103 p.PA3,
104 p.LPUART1,
105 interrupt::take!(LPUART1),
106 p.DMA1_CH1,
107 p.DMA1_CH2,
108 );
109 #[cfg(feature = "stm32h755zi")] 113 #[cfg(feature = "stm32h755zi")]
110 let (tx, rx, usart, irq, tx_dma, rx_dma) = 114 let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH0, p.DMA1_CH1);
111 (p.PB6, p.PB7, p.USART1, interrupt::take!(USART1), p.DMA1_CH0, p.DMA1_CH1);
112 #[cfg(feature = "stm32u585ai")] 115 #[cfg(feature = "stm32u585ai")]
113 let (tx, rx, usart, irq, tx_dma, rx_dma) = ( 116 let (tx, rx, usart, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, p.GPDMA1_CH0, p.GPDMA1_CH1);
114 p.PD8,
115 p.PD9,
116 p.USART3,
117 interrupt::take!(USART3),
118 p.GPDMA1_CH0,
119 p.GPDMA1_CH1,
120 );
121 #[cfg(feature = "stm32c031c6")] 117 #[cfg(feature = "stm32c031c6")]
122 let (tx, rx, usart, irq, tx_dma, rx_dma) = 118 let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
123 (p.PB6, p.PB7, p.USART1, interrupt::take!(USART1), p.DMA1_CH1, p.DMA1_CH2);
124 119
125 // To run this test, use the saturating_serial test utility to saturate the serial port 120 // To run this test, use the saturating_serial test utility to saturate the serial port
126 121
@@ -132,7 +127,7 @@ async fn main(spawner: Spawner) {
132 config.stop_bits = StopBits::STOP1; 127 config.stop_bits = StopBits::STOP1;
133 config.parity = Parity::ParityNone; 128 config.parity = Parity::ParityNone;
134 129
135 let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config); 130 let usart = Uart::new(usart, rx, tx, Irqs, tx_dma, rx_dma, config);
136 let (tx, rx) = usart.split(); 131 let (tx, rx) = usart.split();
137 static mut DMA_BUF: [u8; DMA_BUF_SIZE] = [0; DMA_BUF_SIZE]; 132 static mut DMA_BUF: [u8; DMA_BUF_SIZE] = [0; DMA_BUF_SIZE];
138 let dma_buf = unsafe { DMA_BUF.as_mut() }; 133 let dma_buf = unsafe { DMA_BUF.as_mut() };