diff options
| author | Priit Laes <[email protected]> | 2024-01-05 14:58:57 +0200 |
|---|---|---|
| committer | Priit Laes <[email protected]> | 2024-01-05 15:01:05 +0200 |
| commit | 890ceae4e5b353ac85d7030ea7b344c18a1d663e (patch) | |
| tree | 15893e72e92935948a0c8cc7bef139a0d134d492 /tests | |
| parent | 17346fdfc22a34d651d9d30bcc35125916ee44b5 (diff) | |
tests: Use unified link_ram_cortex_m.x file for all Cortex M targets
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/link_ram_cortex_m.x (renamed from tests/nrf/link_ram.x) | 0 | ||||
| -rw-r--r-- | tests/nrf/build.rs | 2 | ||||
| -rw-r--r-- | tests/rp/build.rs | 2 | ||||
| -rw-r--r-- | tests/rp/link_ram.x | 255 | ||||
| -rw-r--r-- | tests/rp/memory.x | 4 | ||||
| -rw-r--r-- | tests/stm32/build.rs | 2 | ||||
| -rw-r--r-- | tests/stm32/link_ram.x | 254 |
7 files changed, 7 insertions, 512 deletions
diff --git a/tests/nrf/link_ram.x b/tests/link_ram_cortex_m.x index 5cb23a642..5cb23a642 100644 --- a/tests/nrf/link_ram.x +++ b/tests/link_ram_cortex_m.x | |||
diff --git a/tests/nrf/build.rs b/tests/nrf/build.rs index 93e2a28cf..71c82a70f 100644 --- a/tests/nrf/build.rs +++ b/tests/nrf/build.rs | |||
| @@ -4,7 +4,7 @@ use std::{env, fs}; | |||
| 4 | 4 | ||
| 5 | fn main() -> Result<(), Box<dyn Error>> { | 5 | fn main() -> Result<(), Box<dyn Error>> { |
| 6 | let out = PathBuf::from(env::var("OUT_DIR").unwrap()); | 6 | let out = PathBuf::from(env::var("OUT_DIR").unwrap()); |
| 7 | fs::write(out.join("link_ram.x"), include_bytes!("link_ram.x")).unwrap(); | 7 | fs::write(out.join("link_ram.x"), include_bytes!("../link_ram_cortex_m.x")).unwrap(); |
| 8 | println!("cargo:rustc-link-search={}", out.display()); | 8 | println!("cargo:rustc-link-search={}", out.display()); |
| 9 | println!("cargo:rerun-if-changed=link_ram.x"); | 9 | println!("cargo:rerun-if-changed=link_ram.x"); |
| 10 | 10 | ||
diff --git a/tests/rp/build.rs b/tests/rp/build.rs index 93e2a28cf..71c82a70f 100644 --- a/tests/rp/build.rs +++ b/tests/rp/build.rs | |||
| @@ -4,7 +4,7 @@ use std::{env, fs}; | |||
| 4 | 4 | ||
| 5 | fn main() -> Result<(), Box<dyn Error>> { | 5 | fn main() -> Result<(), Box<dyn Error>> { |
| 6 | let out = PathBuf::from(env::var("OUT_DIR").unwrap()); | 6 | let out = PathBuf::from(env::var("OUT_DIR").unwrap()); |
| 7 | fs::write(out.join("link_ram.x"), include_bytes!("link_ram.x")).unwrap(); | 7 | fs::write(out.join("link_ram.x"), include_bytes!("../link_ram_cortex_m.x")).unwrap(); |
| 8 | println!("cargo:rustc-link-search={}", out.display()); | 8 | println!("cargo:rustc-link-search={}", out.display()); |
| 9 | println!("cargo:rerun-if-changed=link_ram.x"); | 9 | println!("cargo:rerun-if-changed=link_ram.x"); |
| 10 | 10 | ||
diff --git a/tests/rp/link_ram.x b/tests/rp/link_ram.x deleted file mode 100644 index 86a11e875..000000000 --- a/tests/rp/link_ram.x +++ /dev/null | |||
| @@ -1,255 +0,0 @@ | |||
| 1 | /* ##### EMBASSY NOTE | ||
| 2 | Originally from https://github.com/rust-embedded/cortex-m-rt/blob/master/link.x.in | ||
| 3 | Adjusted to put everything in RAM | ||
| 4 | */ | ||
| 5 | |||
| 6 | /* # Developer notes | ||
| 7 | |||
| 8 | - Symbols that start with a double underscore (__) are considered "private" | ||
| 9 | |||
| 10 | - Symbols that start with a single underscore (_) are considered "semi-public"; they can be | ||
| 11 | overridden in a user linker script, but should not be referred from user code (e.g. `extern "C" { | ||
| 12 | static mut __sbss }`). | ||
| 13 | |||
| 14 | - `EXTERN` forces the linker to keep a symbol in the final binary. We use this to make sure a | ||
| 15 | symbol if not dropped if it appears in or near the front of the linker arguments and "it's not | ||
| 16 | needed" by any of the preceding objects (linker arguments) | ||
| 17 | |||
| 18 | - `PROVIDE` is used to provide default values that can be overridden by a user linker script | ||
| 19 | |||
| 20 | - On alignment: it's important for correctness that the VMA boundaries of both .bss and .data *and* | ||
| 21 | the LMA of .data are all 4-byte aligned. These alignments are assumed by the RAM initialization | ||
| 22 | routine. There's also a second benefit: 4-byte aligned boundaries means that you won't see | ||
| 23 | "Address (..) is out of bounds" in the disassembly produced by `objdump`. | ||
| 24 | */ | ||
| 25 | |||
| 26 | /* Provides information about the memory layout of the device */ | ||
| 27 | MEMORY { | ||
| 28 | RAM : ORIGIN = 0x20000000, LENGTH = 256K | ||
| 29 | } | ||
| 30 | |||
| 31 | /* # Entry point = reset vector */ | ||
| 32 | EXTERN(__RESET_VECTOR); | ||
| 33 | EXTERN(Reset); | ||
| 34 | ENTRY(Reset); | ||
| 35 | |||
| 36 | /* # Exception vectors */ | ||
| 37 | /* This is effectively weak aliasing at the linker level */ | ||
| 38 | /* The user can override any of these aliases by defining the corresponding symbol themselves (cf. | ||
| 39 | the `exception!` macro) */ | ||
| 40 | EXTERN(__EXCEPTIONS); /* depends on all the these PROVIDED symbols */ | ||
| 41 | |||
| 42 | EXTERN(DefaultHandler); | ||
| 43 | |||
| 44 | PROVIDE(NonMaskableInt = DefaultHandler); | ||
| 45 | EXTERN(HardFaultTrampoline); | ||
| 46 | PROVIDE(MemoryManagement = DefaultHandler); | ||
| 47 | PROVIDE(BusFault = DefaultHandler); | ||
| 48 | PROVIDE(UsageFault = DefaultHandler); | ||
| 49 | PROVIDE(SecureFault = DefaultHandler); | ||
| 50 | PROVIDE(SVCall = DefaultHandler); | ||
| 51 | PROVIDE(DebugMonitor = DefaultHandler); | ||
| 52 | PROVIDE(PendSV = DefaultHandler); | ||
| 53 | PROVIDE(SysTick = DefaultHandler); | ||
| 54 | |||
| 55 | PROVIDE(DefaultHandler = DefaultHandler_); | ||
| 56 | PROVIDE(HardFault = HardFault_); | ||
| 57 | |||
| 58 | /* # Interrupt vectors */ | ||
| 59 | EXTERN(__INTERRUPTS); /* `static` variable similar to `__EXCEPTIONS` */ | ||
| 60 | |||
| 61 | /* # Pre-initialization function */ | ||
| 62 | /* If the user overrides this using the `pre_init!` macro or by creating a `__pre_init` function, | ||
| 63 | then the function this points to will be called before the RAM is initialized. */ | ||
| 64 | PROVIDE(__pre_init = DefaultPreInit); | ||
| 65 | |||
| 66 | /* # Sections */ | ||
| 67 | SECTIONS | ||
| 68 | { | ||
| 69 | PROVIDE(_stack_start = ORIGIN(RAM) + LENGTH(RAM)); | ||
| 70 | |||
| 71 | /* ## Sections in RAM */ | ||
| 72 | /* ### Vector table */ | ||
| 73 | .vector_table ORIGIN(RAM) : | ||
| 74 | { | ||
| 75 | /* Initial Stack Pointer (SP) value */ | ||
| 76 | LONG(_stack_start); | ||
| 77 | |||
| 78 | /* Reset vector */ | ||
| 79 | KEEP(*(.vector_table.reset_vector)); /* this is the `__RESET_VECTOR` symbol */ | ||
| 80 | __reset_vector = .; | ||
| 81 | |||
| 82 | /* Exceptions */ | ||
| 83 | KEEP(*(.vector_table.exceptions)); /* this is the `__EXCEPTIONS` symbol */ | ||
| 84 | __eexceptions = .; | ||
| 85 | |||
| 86 | /* Device specific interrupts */ | ||
| 87 | KEEP(*(.vector_table.interrupts)); /* this is the `__INTERRUPTS` symbol */ | ||
| 88 | } > RAM | ||
| 89 | |||
| 90 | PROVIDE(_stext = ADDR(.vector_table) + SIZEOF(.vector_table)); | ||
| 91 | |||
| 92 | /* ### .text */ | ||
| 93 | .text _stext : | ||
| 94 | { | ||
| 95 | __stext = .; | ||
| 96 | *(.Reset); | ||
| 97 | |||
| 98 | *(.text .text.*); | ||
| 99 | |||
| 100 | /* The HardFaultTrampoline uses the `b` instruction to enter `HardFault`, | ||
| 101 | so must be placed close to it. */ | ||
| 102 | *(.HardFaultTrampoline); | ||
| 103 | *(.HardFault.*); | ||
| 104 | |||
| 105 | . = ALIGN(4); /* Pad .text to the alignment to workaround overlapping load section bug in old lld */ | ||
| 106 | __etext = .; | ||
| 107 | } > RAM | ||
| 108 | |||
| 109 | /* ### .rodata */ | ||
| 110 | .rodata : ALIGN(4) | ||
| 111 | { | ||
| 112 | . = ALIGN(4); | ||
| 113 | __srodata = .; | ||
| 114 | *(.rodata .rodata.*); | ||
| 115 | |||
| 116 | /* 4-byte align the end (VMA) of this section. | ||
| 117 | This is required by LLD to ensure the LMA of the following .data | ||
| 118 | section will have the correct alignment. */ | ||
| 119 | . = ALIGN(4); | ||
| 120 | __erodata = .; | ||
| 121 | } > RAM | ||
| 122 | |||
| 123 | /* ## Sections in RAM */ | ||
| 124 | /* ### .data */ | ||
| 125 | .data : ALIGN(4) | ||
| 126 | { | ||
| 127 | . = ALIGN(4); | ||
| 128 | __sdata = .; | ||
| 129 | __edata = .; | ||
| 130 | *(.data .data.*); | ||
| 131 | . = ALIGN(4); /* 4-byte align the end (VMA) of this section */ | ||
| 132 | } > RAM | ||
| 133 | /* Allow sections from user `memory.x` injected using `INSERT AFTER .data` to | ||
| 134 | * use the .data loading mechanism by pushing __edata. Note: do not change | ||
| 135 | * output region or load region in those user sections! */ | ||
| 136 | . = ALIGN(4); | ||
| 137 | |||
| 138 | /* LMA of .data */ | ||
| 139 | __sidata = LOADADDR(.data); | ||
| 140 | |||
| 141 | /* ### .gnu.sgstubs | ||
| 142 | This section contains the TrustZone-M veneers put there by the Arm GNU linker. */ | ||
| 143 | /* Security Attribution Unit blocks must be 32 bytes aligned. */ | ||
| 144 | /* Note that this pads the RAM usage to 32 byte alignment. */ | ||
| 145 | .gnu.sgstubs : ALIGN(32) | ||
| 146 | { | ||
| 147 | . = ALIGN(32); | ||
| 148 | __veneer_base = .; | ||
| 149 | *(.gnu.sgstubs*) | ||
| 150 | . = ALIGN(32); | ||
| 151 | __veneer_limit = .; | ||
| 152 | } > RAM | ||
| 153 | |||
| 154 | /* ### .bss */ | ||
| 155 | .bss (NOLOAD) : ALIGN(4) | ||
| 156 | { | ||
| 157 | . = ALIGN(4); | ||
| 158 | __sbss = .; | ||
| 159 | *(.bss .bss.*); | ||
| 160 | *(COMMON); /* Uninitialized C statics */ | ||
| 161 | . = ALIGN(4); /* 4-byte align the end (VMA) of this section */ | ||
| 162 | } > RAM | ||
| 163 | /* Allow sections from user `memory.x` injected using `INSERT AFTER .bss` to | ||
| 164 | * use the .bss zeroing mechanism by pushing __ebss. Note: do not change | ||
| 165 | * output region or load region in those user sections! */ | ||
| 166 | . = ALIGN(4); | ||
| 167 | __ebss = .; | ||
| 168 | |||
| 169 | /* ### .uninit */ | ||
| 170 | .uninit (NOLOAD) : ALIGN(4) | ||
| 171 | { | ||
| 172 | . = ALIGN(4); | ||
| 173 | __suninit = .; | ||
| 174 | *(.uninit .uninit.*); | ||
| 175 | . = ALIGN(4); | ||
| 176 | __euninit = .; | ||
| 177 | } > RAM | ||
| 178 | |||
| 179 | /* Place the heap right after `.uninit` in RAM */ | ||
| 180 | PROVIDE(__sheap = __euninit); | ||
| 181 | |||
| 182 | /* ## .got */ | ||
| 183 | /* Dynamic relocations are unsupported. This section is only used to detect relocatable code in | ||
| 184 | the input files and raise an error if relocatable code is found */ | ||
| 185 | .got (NOLOAD) : | ||
| 186 | { | ||
| 187 | KEEP(*(.got .got.*)); | ||
| 188 | } | ||
| 189 | |||
| 190 | /* ## Discarded sections */ | ||
| 191 | /DISCARD/ : | ||
| 192 | { | ||
| 193 | /* Unused exception related info that only wastes space */ | ||
| 194 | *(.ARM.exidx); | ||
| 195 | *(.ARM.exidx.*); | ||
| 196 | *(.ARM.extab.*); | ||
| 197 | } | ||
| 198 | } | ||
| 199 | |||
| 200 | /* Do not exceed this mark in the error messages below | */ | ||
| 201 | /* # Alignment checks */ | ||
| 202 | ASSERT(ORIGIN(RAM) % 4 == 0, " | ||
| 203 | ERROR(cortex-m-rt): the start of the RAM region must be 4-byte aligned"); | ||
| 204 | |||
| 205 | ASSERT(__sdata % 4 == 0 && __edata % 4 == 0, " | ||
| 206 | BUG(cortex-m-rt): .data is not 4-byte aligned"); | ||
| 207 | |||
| 208 | ASSERT(__sidata % 4 == 0, " | ||
| 209 | BUG(cortex-m-rt): the LMA of .data is not 4-byte aligned"); | ||
| 210 | |||
| 211 | ASSERT(__sbss % 4 == 0 && __ebss % 4 == 0, " | ||
| 212 | BUG(cortex-m-rt): .bss is not 4-byte aligned"); | ||
| 213 | |||
| 214 | ASSERT(__sheap % 4 == 0, " | ||
| 215 | BUG(cortex-m-rt): start of .heap is not 4-byte aligned"); | ||
| 216 | |||
| 217 | /* # Position checks */ | ||
| 218 | |||
| 219 | /* ## .vector_table */ | ||
| 220 | ASSERT(__reset_vector == ADDR(.vector_table) + 0x8, " | ||
| 221 | BUG(cortex-m-rt): the reset vector is missing"); | ||
| 222 | |||
| 223 | ASSERT(__eexceptions == ADDR(.vector_table) + 0x40, " | ||
| 224 | BUG(cortex-m-rt): the exception vectors are missing"); | ||
| 225 | |||
| 226 | ASSERT(SIZEOF(.vector_table) > 0x40, " | ||
| 227 | ERROR(cortex-m-rt): The interrupt vectors are missing. | ||
| 228 | Possible solutions, from most likely to less likely: | ||
| 229 | - Link to a svd2rust generated device crate | ||
| 230 | - Check that you actually use the device/hal/bsp crate in your code | ||
| 231 | - Disable the 'device' feature of cortex-m-rt to build a generic application (a dependency | ||
| 232 | may be enabling it) | ||
| 233 | - Supply the interrupt handlers yourself. Check the documentation for details."); | ||
| 234 | |||
| 235 | /* ## .text */ | ||
| 236 | ASSERT(ADDR(.vector_table) + SIZEOF(.vector_table) <= _stext, " | ||
| 237 | ERROR(cortex-m-rt): The .text section can't be placed inside the .vector_table section | ||
| 238 | Set _stext to an address greater than the end of .vector_table (See output of `nm`)"); | ||
| 239 | |||
| 240 | ASSERT(_stext + SIZEOF(.text) < ORIGIN(RAM) + LENGTH(RAM), " | ||
| 241 | ERROR(cortex-m-rt): The .text section must be placed inside the RAM memory. | ||
| 242 | Set _stext to an address smaller than 'ORIGIN(RAM) + LENGTH(RAM)'"); | ||
| 243 | |||
| 244 | /* # Other checks */ | ||
| 245 | ASSERT(SIZEOF(.got) == 0, " | ||
| 246 | ERROR(cortex-m-rt): .got section detected in the input object files | ||
| 247 | Dynamic relocations are not supported. If you are linking to C code compiled using | ||
| 248 | the 'cc' crate then modify your build script to compile the C code _without_ | ||
| 249 | the -fPIC flag. See the documentation of the `cc::Build.pic` method for details."); | ||
| 250 | /* Do not exceed this mark in the error messages above | */ | ||
| 251 | |||
| 252 | |||
| 253 | /* Provides weak aliases (cf. PROVIDED) for device specific interrupt handlers */ | ||
| 254 | /* This will usually be provided by a device crate generated using svd2rust (see `device.x`) */ | ||
| 255 | INCLUDE device.x \ No newline at end of file | ||
diff --git a/tests/rp/memory.x b/tests/rp/memory.x new file mode 100644 index 000000000..bf0041d7d --- /dev/null +++ b/tests/rp/memory.x | |||
| @@ -0,0 +1,4 @@ | |||
| 1 | /* Provides information about the memory layout of the device */ | ||
| 2 | MEMORY { | ||
| 3 | RAM : ORIGIN = 0x20000000, LENGTH = 256K | ||
| 4 | } | ||
diff --git a/tests/stm32/build.rs b/tests/stm32/build.rs index c5d0e40d6..f32a7b2f8 100644 --- a/tests/stm32/build.rs +++ b/tests/stm32/build.rs | |||
| @@ -4,7 +4,7 @@ use std::{env, fs}; | |||
| 4 | 4 | ||
| 5 | fn main() -> Result<(), Box<dyn Error>> { | 5 | fn main() -> Result<(), Box<dyn Error>> { |
| 6 | let out = PathBuf::from(env::var("OUT_DIR").unwrap()); | 6 | let out = PathBuf::from(env::var("OUT_DIR").unwrap()); |
| 7 | fs::write(out.join("link_ram.x"), include_bytes!("link_ram.x")).unwrap(); | 7 | fs::write(out.join("link_ram.x"), include_bytes!("../link_ram_cortex_m.x")).unwrap(); |
| 8 | println!("cargo:rustc-link-search={}", out.display()); | 8 | println!("cargo:rustc-link-search={}", out.display()); |
| 9 | println!("cargo:rustc-link-arg-bins=--nmagic"); | 9 | println!("cargo:rustc-link-arg-bins=--nmagic"); |
| 10 | 10 | ||
diff --git a/tests/stm32/link_ram.x b/tests/stm32/link_ram.x deleted file mode 100644 index 26da86baa..000000000 --- a/tests/stm32/link_ram.x +++ /dev/null | |||
| @@ -1,254 +0,0 @@ | |||
| 1 | /* ##### EMBASSY NOTE | ||
| 2 | Originally from https://github.com/rust-embedded/cortex-m-rt/blob/master/link.x.in | ||
| 3 | Adjusted to put everything in RAM | ||
| 4 | */ | ||
| 5 | |||
| 6 | /* # Developer notes | ||
| 7 | |||
| 8 | - Symbols that start with a double underscore (__) are considered "private" | ||
| 9 | |||
| 10 | - Symbols that start with a single underscore (_) are considered "semi-public"; they can be | ||
| 11 | overridden in a user linker script, but should not be referred from user code (e.g. `extern "C" { | ||
| 12 | static mut __sbss }`). | ||
| 13 | |||
| 14 | - `EXTERN` forces the linker to keep a symbol in the final binary. We use this to make sure a | ||
| 15 | symbol if not dropped if it appears in or near the front of the linker arguments and "it's not | ||
| 16 | needed" by any of the preceding objects (linker arguments) | ||
| 17 | |||
| 18 | - `PROVIDE` is used to provide default values that can be overridden by a user linker script | ||
| 19 | |||
| 20 | - On alignment: it's important for correctness that the VMA boundaries of both .bss and .data *and* | ||
| 21 | the LMA of .data are all 4-byte aligned. These alignments are assumed by the RAM initialization | ||
| 22 | routine. There's also a second benefit: 4-byte aligned boundaries means that you won't see | ||
| 23 | "Address (..) is out of bounds" in the disassembly produced by `objdump`. | ||
| 24 | */ | ||
| 25 | |||
| 26 | /* Provides information about the memory layout of the device */ | ||
| 27 | /* This will be provided by the user (see `memory.x`) or by a Board Support Crate */ | ||
| 28 | INCLUDE memory.x | ||
| 29 | |||
| 30 | /* # Entry point = reset vector */ | ||
| 31 | EXTERN(__RESET_VECTOR); | ||
| 32 | EXTERN(Reset); | ||
| 33 | ENTRY(Reset); | ||
| 34 | |||
| 35 | /* # Exception vectors */ | ||
| 36 | /* This is effectively weak aliasing at the linker level */ | ||
| 37 | /* The user can override any of these aliases by defining the corresponding symbol themselves (cf. | ||
| 38 | the `exception!` macro) */ | ||
| 39 | EXTERN(__EXCEPTIONS); /* depends on all the these PROVIDED symbols */ | ||
| 40 | |||
| 41 | EXTERN(DefaultHandler); | ||
| 42 | |||
| 43 | PROVIDE(NonMaskableInt = DefaultHandler); | ||
| 44 | EXTERN(HardFaultTrampoline); | ||
| 45 | PROVIDE(MemoryManagement = DefaultHandler); | ||
| 46 | PROVIDE(BusFault = DefaultHandler); | ||
| 47 | PROVIDE(UsageFault = DefaultHandler); | ||
| 48 | PROVIDE(SecureFault = DefaultHandler); | ||
| 49 | PROVIDE(SVCall = DefaultHandler); | ||
| 50 | PROVIDE(DebugMonitor = DefaultHandler); | ||
| 51 | PROVIDE(PendSV = DefaultHandler); | ||
| 52 | PROVIDE(SysTick = DefaultHandler); | ||
| 53 | |||
| 54 | PROVIDE(DefaultHandler = DefaultHandler_); | ||
| 55 | PROVIDE(HardFault = HardFault_); | ||
| 56 | |||
| 57 | /* # Interrupt vectors */ | ||
| 58 | EXTERN(__INTERRUPTS); /* `static` variable similar to `__EXCEPTIONS` */ | ||
| 59 | |||
| 60 | /* # Pre-initialization function */ | ||
| 61 | /* If the user overrides this using the `pre_init!` macro or by creating a `__pre_init` function, | ||
| 62 | then the function this points to will be called before the RAM is initialized. */ | ||
| 63 | PROVIDE(__pre_init = DefaultPreInit); | ||
| 64 | |||
| 65 | /* # Sections */ | ||
| 66 | SECTIONS | ||
| 67 | { | ||
| 68 | PROVIDE(_stack_start = ORIGIN(RAM) + LENGTH(RAM)); | ||
| 69 | |||
| 70 | /* ## Sections in RAM */ | ||
| 71 | /* ### Vector table */ | ||
| 72 | .vector_table ORIGIN(RAM) : | ||
| 73 | { | ||
| 74 | /* Initial Stack Pointer (SP) value */ | ||
| 75 | LONG(_stack_start); | ||
| 76 | |||
| 77 | /* Reset vector */ | ||
| 78 | KEEP(*(.vector_table.reset_vector)); /* this is the `__RESET_VECTOR` symbol */ | ||
| 79 | __reset_vector = .; | ||
| 80 | |||
| 81 | /* Exceptions */ | ||
| 82 | KEEP(*(.vector_table.exceptions)); /* this is the `__EXCEPTIONS` symbol */ | ||
| 83 | __eexceptions = .; | ||
| 84 | |||
| 85 | /* Device specific interrupts */ | ||
| 86 | KEEP(*(.vector_table.interrupts)); /* this is the `__INTERRUPTS` symbol */ | ||
| 87 | } > RAM | ||
| 88 | |||
| 89 | PROVIDE(_stext = ADDR(.vector_table) + SIZEOF(.vector_table)); | ||
| 90 | |||
| 91 | /* ### .text */ | ||
| 92 | .text _stext : | ||
| 93 | { | ||
| 94 | __stext = .; | ||
| 95 | *(.Reset); | ||
| 96 | |||
| 97 | *(.text .text.*); | ||
| 98 | |||
| 99 | /* The HardFaultTrampoline uses the `b` instruction to enter `HardFault`, | ||
| 100 | so must be placed close to it. */ | ||
| 101 | *(.HardFaultTrampoline); | ||
| 102 | *(.HardFault.*); | ||
| 103 | |||
| 104 | . = ALIGN(4); /* Pad .text to the alignment to workaround overlapping load section bug in old lld */ | ||
| 105 | __etext = .; | ||
| 106 | } > RAM | ||
| 107 | |||
| 108 | /* ### .rodata */ | ||
| 109 | .rodata : ALIGN(4) | ||
| 110 | { | ||
| 111 | . = ALIGN(4); | ||
| 112 | __srodata = .; | ||
| 113 | *(.rodata .rodata.*); | ||
| 114 | |||
| 115 | /* 4-byte align the end (VMA) of this section. | ||
| 116 | This is required by LLD to ensure the LMA of the following .data | ||
| 117 | section will have the correct alignment. */ | ||
| 118 | . = ALIGN(4); | ||
| 119 | __erodata = .; | ||
| 120 | } > RAM | ||
| 121 | |||
| 122 | /* ## Sections in RAM */ | ||
| 123 | /* ### .data */ | ||
| 124 | .data : ALIGN(4) | ||
| 125 | { | ||
| 126 | . = ALIGN(4); | ||
| 127 | __sdata = .; | ||
| 128 | __edata = .; | ||
| 129 | *(.data .data.*); | ||
| 130 | . = ALIGN(4); /* 4-byte align the end (VMA) of this section */ | ||
| 131 | } > RAM | ||
| 132 | /* Allow sections from user `memory.x` injected using `INSERT AFTER .data` to | ||
| 133 | * use the .data loading mechanism by pushing __edata. Note: do not change | ||
| 134 | * output region or load region in those user sections! */ | ||
| 135 | . = ALIGN(4); | ||
| 136 | |||
| 137 | /* LMA of .data */ | ||
| 138 | __sidata = LOADADDR(.data); | ||
| 139 | |||
| 140 | /* ### .gnu.sgstubs | ||
| 141 | This section contains the TrustZone-M veneers put there by the Arm GNU linker. */ | ||
| 142 | /* Security Attribution Unit blocks must be 32 bytes aligned. */ | ||
| 143 | /* Note that this pads the RAM usage to 32 byte alignment. */ | ||
| 144 | .gnu.sgstubs : ALIGN(32) | ||
| 145 | { | ||
| 146 | . = ALIGN(32); | ||
| 147 | __veneer_base = .; | ||
| 148 | *(.gnu.sgstubs*) | ||
| 149 | . = ALIGN(32); | ||
| 150 | __veneer_limit = .; | ||
| 151 | } > RAM | ||
| 152 | |||
| 153 | /* ### .bss */ | ||
| 154 | .bss (NOLOAD) : ALIGN(4) | ||
| 155 | { | ||
| 156 | . = ALIGN(4); | ||
| 157 | __sbss = .; | ||
| 158 | *(.bss .bss.*); | ||
| 159 | *(COMMON); /* Uninitialized C statics */ | ||
| 160 | . = ALIGN(4); /* 4-byte align the end (VMA) of this section */ | ||
| 161 | } > RAM | ||
| 162 | /* Allow sections from user `memory.x` injected using `INSERT AFTER .bss` to | ||
| 163 | * use the .bss zeroing mechanism by pushing __ebss. Note: do not change | ||
| 164 | * output region or load region in those user sections! */ | ||
| 165 | . = ALIGN(4); | ||
| 166 | __ebss = .; | ||
| 167 | |||
| 168 | /* ### .uninit */ | ||
| 169 | .uninit (NOLOAD) : ALIGN(4) | ||
| 170 | { | ||
| 171 | . = ALIGN(4); | ||
| 172 | __suninit = .; | ||
| 173 | *(.uninit .uninit.*); | ||
| 174 | . = ALIGN(4); | ||
| 175 | __euninit = .; | ||
| 176 | } > RAM | ||
| 177 | |||
| 178 | /* Place the heap right after `.uninit` in RAM */ | ||
| 179 | PROVIDE(__sheap = __euninit); | ||
| 180 | |||
| 181 | /* ## .got */ | ||
| 182 | /* Dynamic relocations are unsupported. This section is only used to detect relocatable code in | ||
| 183 | the input files and raise an error if relocatable code is found */ | ||
| 184 | .got (NOLOAD) : | ||
| 185 | { | ||
| 186 | KEEP(*(.got .got.*)); | ||
| 187 | } | ||
| 188 | |||
| 189 | /* ## Discarded sections */ | ||
| 190 | /DISCARD/ : | ||
| 191 | { | ||
| 192 | /* Unused exception related info that only wastes space */ | ||
| 193 | *(.ARM.exidx); | ||
| 194 | *(.ARM.exidx.*); | ||
| 195 | *(.ARM.extab.*); | ||
| 196 | } | ||
| 197 | } | ||
| 198 | |||
| 199 | /* Do not exceed this mark in the error messages below | */ | ||
| 200 | /* # Alignment checks */ | ||
| 201 | ASSERT(ORIGIN(RAM) % 4 == 0, " | ||
| 202 | ERROR(cortex-m-rt): the start of the RAM region must be 4-byte aligned"); | ||
| 203 | |||
| 204 | ASSERT(__sdata % 4 == 0 && __edata % 4 == 0, " | ||
| 205 | BUG(cortex-m-rt): .data is not 4-byte aligned"); | ||
| 206 | |||
| 207 | ASSERT(__sidata % 4 == 0, " | ||
| 208 | BUG(cortex-m-rt): the LMA of .data is not 4-byte aligned"); | ||
| 209 | |||
| 210 | ASSERT(__sbss % 4 == 0 && __ebss % 4 == 0, " | ||
| 211 | BUG(cortex-m-rt): .bss is not 4-byte aligned"); | ||
| 212 | |||
| 213 | ASSERT(__sheap % 4 == 0, " | ||
| 214 | BUG(cortex-m-rt): start of .heap is not 4-byte aligned"); | ||
| 215 | |||
| 216 | /* # Position checks */ | ||
| 217 | |||
| 218 | /* ## .vector_table */ | ||
| 219 | ASSERT(__reset_vector == ADDR(.vector_table) + 0x8, " | ||
| 220 | BUG(cortex-m-rt): the reset vector is missing"); | ||
| 221 | |||
| 222 | ASSERT(__eexceptions == ADDR(.vector_table) + 0x40, " | ||
| 223 | BUG(cortex-m-rt): the exception vectors are missing"); | ||
| 224 | |||
| 225 | ASSERT(SIZEOF(.vector_table) > 0x40, " | ||
| 226 | ERROR(cortex-m-rt): The interrupt vectors are missing. | ||
| 227 | Possible solutions, from most likely to less likely: | ||
| 228 | - Link to a svd2rust generated device crate | ||
| 229 | - Check that you actually use the device/hal/bsp crate in your code | ||
| 230 | - Disable the 'device' feature of cortex-m-rt to build a generic application (a dependency | ||
| 231 | may be enabling it) | ||
| 232 | - Supply the interrupt handlers yourself. Check the documentation for details."); | ||
| 233 | |||
| 234 | /* ## .text */ | ||
| 235 | ASSERT(ADDR(.vector_table) + SIZEOF(.vector_table) <= _stext, " | ||
| 236 | ERROR(cortex-m-rt): The .text section can't be placed inside the .vector_table section | ||
| 237 | Set _stext to an address greater than the end of .vector_table (See output of `nm`)"); | ||
| 238 | |||
| 239 | ASSERT(_stext + SIZEOF(.text) < ORIGIN(RAM) + LENGTH(RAM), " | ||
| 240 | ERROR(cortex-m-rt): The .text section must be placed inside the RAM memory. | ||
| 241 | Set _stext to an address smaller than 'ORIGIN(RAM) + LENGTH(RAM)'"); | ||
| 242 | |||
| 243 | /* # Other checks */ | ||
| 244 | ASSERT(SIZEOF(.got) == 0, " | ||
| 245 | ERROR(cortex-m-rt): .got section detected in the input object files | ||
| 246 | Dynamic relocations are not supported. If you are linking to C code compiled using | ||
| 247 | the 'cc' crate then modify your build script to compile the C code _without_ | ||
| 248 | the -fPIC flag. See the documentation of the `cc::Build.pic` method for details."); | ||
| 249 | /* Do not exceed this mark in the error messages above | */ | ||
| 250 | |||
| 251 | |||
| 252 | /* Provides weak aliases (cf. PROVIDED) for device specific interrupt handlers */ | ||
| 253 | /* This will usually be provided by a device crate generated using svd2rust (see `device.x`) */ | ||
| 254 | INCLUDE device.x \ No newline at end of file | ||
