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authorDario Nieuwenhuis <[email protected]>2023-09-26 05:16:26 +0200
committerDario Nieuwenhuis <[email protected]>2023-09-26 05:30:50 +0200
commit8b5fb254c04ec479b8a7f3bd5880a944313abbf7 (patch)
tree180bfbc176202bd4008c0f0d61985c40c6423634 /tests
parent624f786203bbe7c6a96f5bdeca6e74c821223069 (diff)
tests/stm32: add L0, L1, L4, L4+, L5
Diffstat (limited to 'tests')
-rw-r--r--tests/stm32/Cargo.toml5
-rw-r--r--tests/stm32/build.rs3
-rw-r--r--tests/stm32/src/common.rs91
3 files changed, 97 insertions, 2 deletions
diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml
index f78cb5098..bfe5bc823 100644
--- a/tests/stm32/Cargo.toml
+++ b/tests/stm32/Cargo.toml
@@ -15,6 +15,11 @@ stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "not-gpdma", "dac-adc-pin"] # Nu
15stm32wb55rg = ["embassy-stm32/stm32wb55rg", "not-gpdma", "ble", "mac" ] # Nucleo 15stm32wb55rg = ["embassy-stm32/stm32wb55rg", "not-gpdma", "ble", "mac" ] # Nucleo
16stm32h563zi = ["embassy-stm32/stm32h563zi"] # Nucleo 16stm32h563zi = ["embassy-stm32/stm32h563zi"] # Nucleo
17stm32u585ai = ["embassy-stm32/stm32u585ai"] # IoT board 17stm32u585ai = ["embassy-stm32/stm32u585ai"] # IoT board
18stm32l073rz = ["embassy-stm32/stm32l073rz", "not-gpdma"] # Nucleo
19stm32l152re = ["embassy-stm32/stm32l152re", "not-gpdma"] # Nucleo
20stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "not-gpdma"] # Nucleo
21stm32l4r5zi = ["embassy-stm32/stm32l4r5zi", "not-gpdma"] # Nucleo
22stm32l552ze = ["embassy-stm32/stm32l552ze", "not-gpdma"] # Nucleo
18 23
19sdmmc = [] 24sdmmc = []
20stop = ["embassy-stm32/low-power"] 25stop = ["embassy-stm32/low-power"]
diff --git a/tests/stm32/build.rs b/tests/stm32/build.rs
index 2e71954d7..9aabf8541 100644
--- a/tests/stm32/build.rs
+++ b/tests/stm32/build.rs
@@ -12,7 +12,8 @@ fn main() -> Result<(), Box<dyn Error>> {
12 if cfg!(any( 12 if cfg!(any(
13 feature = "stm32f103c8", 13 feature = "stm32f103c8",
14 feature = "stm32c031c6", 14 feature = "stm32c031c6",
15 feature = "stm32wb55rg" 15 feature = "stm32wb55rg",
16 feature = "stm32l073rz",
16 )) { 17 )) {
17 println!("cargo:rustc-link-arg-bins=-Tlink.x"); 18 println!("cargo:rustc-link-arg-bins=-Tlink.x");
18 println!("cargo:rerun-if-changed=link.x"); 19 println!("cargo:rerun-if-changed=link.x");
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs
index 055eade6b..9c0b8c39e 100644
--- a/tests/stm32/src/common.rs
+++ b/tests/stm32/src/common.rs
@@ -24,6 +24,16 @@ teleprobe_meta::target!(b"iot-stm32u585ai");
24teleprobe_meta::target!(b"nucleo-stm32h563zi"); 24teleprobe_meta::target!(b"nucleo-stm32h563zi");
25#[cfg(feature = "stm32c031c6")] 25#[cfg(feature = "stm32c031c6")]
26teleprobe_meta::target!(b"nucleo-stm32c031c6"); 26teleprobe_meta::target!(b"nucleo-stm32c031c6");
27#[cfg(feature = "stm32l073rz")]
28teleprobe_meta::target!(b"nucleo-stm32l073rz");
29#[cfg(feature = "stm32l152re")]
30teleprobe_meta::target!(b"nucleo-stm32l152re");
31#[cfg(feature = "stm32l4a6zg")]
32teleprobe_meta::target!(b"nucleo-stm32l4a6zg");
33#[cfg(feature = "stm32l4r5zi")]
34teleprobe_meta::target!(b"nucleo-stm32l4r5zi");
35#[cfg(feature = "stm32l552ze")]
36teleprobe_meta::target!(b"nucleo-stm32l552ze");
27 37
28macro_rules! define_peris { 38macro_rules! define_peris {
29 ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => { 39 ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => {
@@ -109,6 +119,36 @@ define_peris!(
109 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, 119 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
110 @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;}, 120 @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
111); 121);
122#[cfg(feature = "stm32l4a6zg")]
123define_peris!(
124 UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3,
125 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2,
126 @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
127);
128#[cfg(feature = "stm32l4r5zi")]
129define_peris!(
130 UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
131 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
132 @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
133);
134#[cfg(feature = "stm32l073rz")]
135define_peris!(
136 UART = USART4, UART_TX = PA0, UART_RX = PA1, UART_TX_DMA = DMA1_CH3, UART_RX_DMA = DMA1_CH2,
137 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2,
138 @irq UART = {USART4_5 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART4>;},
139);
140#[cfg(feature = "stm32l152re")]
141define_peris!(
142 UART = USART3, UART_TX = PB10, UART_RX = PB11, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3,
143 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2,
144 @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
145);
146#[cfg(feature = "stm32l552ze")]
147define_peris!(
148 UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
149 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
150 @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
151);
112 152
113pub fn config() -> Config { 153pub fn config() -> Config {
114 #[allow(unused_mut)] 154 #[allow(unused_mut)]
@@ -144,9 +184,58 @@ pub fn config() -> Config {
144 config.rcc.adc_clock_source = AdcClockSource::PLL2_P; 184 config.rcc.adc_clock_source = AdcClockSource::PLL2_P;
145 } 185 }
146 186
187 #[cfg(any(feature = "stm32l4a6zg", feature = "stm32l4r5zi"))]
188 {
189 use embassy_stm32::rcc::*;
190 config.rcc.mux = ClockSrc::PLL(
191 // 72Mhz clock (16 / 1 * 18 / 4)
192 PLLSource::HSI16,
193 PLLClkDiv::Div4,
194 PLLSrcDiv::Div1,
195 PLLMul::Mul18,
196 Some(PLLClkDiv::Div6), // 48Mhz (16 / 1 * 18 / 6)
197 );
198 }
199
200 #[cfg(any(feature = "stm32l552ze"))]
201 {
202 use embassy_stm32::rcc::*;
203 config.rcc.mux = ClockSrc::PLL(
204 // 110Mhz clock (16 / 4 * 55 / 2)
205 PLLSource::HSI16,
206 PLLClkDiv::Div2,
207 PLLSrcDiv::Div4,
208 PLLMul::Mul55,
209 None,
210 );
211 }
212
147 #[cfg(feature = "stm32u585ai")] 213 #[cfg(feature = "stm32u585ai")]
148 { 214 {
149 config.rcc.mux = embassy_stm32::rcc::ClockSrc::MSI(embassy_stm32::rcc::MSIRange::Range48mhz); 215 use embassy_stm32::rcc::*;
216 config.rcc.mux = ClockSrc::MSI(MSIRange::Range48mhz);
217 }
218
219 #[cfg(feature = "stm32l073rz")]
220 {
221 use embassy_stm32::rcc::*;
222 config.rcc.mux = ClockSrc::PLL(
223 // 32Mhz clock (16 * 4 / 2)
224 PLLSource::HSI16,
225 PLLMul::Mul4,
226 PLLDiv::Div2,
227 );
228 }
229
230 #[cfg(any(feature = "stm32l152re"))]
231 {
232 use embassy_stm32::rcc::*;
233 config.rcc.mux = ClockSrc::PLL(
234 // 32Mhz clock (16 * 4 / 2)
235 PLLSource::HSI,
236 PLLMul::Mul4,
237 PLLDiv::Div2,
238 );
150 } 239 }
151 240
152 config 241 config