diff options
| author | xoviat <[email protected]> | 2023-10-16 20:04:10 -0500 |
|---|---|---|
| committer | xoviat <[email protected]> | 2023-10-16 20:04:10 -0500 |
| commit | a3574e519ad191c3c4c49fe9779a0a71d61cae3b (patch) | |
| tree | bdadb4c56d3e96f06af771780a8ea7f44cd4cd91 /tests | |
| parent | f7980885a5dc9cd095c07efed3c38091b6f1ae8f (diff) | |
stm32: update metapac
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/stm32/src/common.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 6dc1b3002..a802cdfcf 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs | |||
| @@ -290,7 +290,7 @@ pub fn config() -> Config { | |||
| 290 | config.rcc.mux = ClockSrc::PLL; | 290 | config.rcc.mux = ClockSrc::PLL; |
| 291 | config.rcc.hsi16 = true; | 291 | config.rcc.hsi16 = true; |
| 292 | config.rcc.pll = Some(Pll { | 292 | config.rcc.pll = Some(Pll { |
| 293 | source: PLLSource::HSI16, | 293 | source: PLLSource::HSI, |
| 294 | prediv: PllPreDiv::DIV1, | 294 | prediv: PllPreDiv::DIV1, |
| 295 | mul: PllMul::MUL18, | 295 | mul: PllMul::MUL18, |
| 296 | divp: None, | 296 | divp: None, |