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authorpennae <[email protected]>2023-04-30 04:14:07 +0200
committerpennae <[email protected]>2023-05-01 13:00:40 +0200
commitbcbe3040a1eb9d96feae8f6d665bbbcc5ea41c4e (patch)
tree04e2d586d629f9ea322b4e904ecc1a3e5fafa35b /tests
parentce04b732d131f488967846f6f593e10d7721ca86 (diff)
tests/rp: fix buffered uart test
the rp uart receive fifo is 32 entries deep, so the 31 byte test data fits into it without needing any buffering. extend to 48 bytes to fill the entire fifo and the 16 byte test buffer.
Diffstat (limited to 'tests')
-rw-r--r--tests/rp/src/bin/uart_buffered.rs6
1 files changed, 3 insertions, 3 deletions
diff --git a/tests/rp/src/bin/uart_buffered.rs b/tests/rp/src/bin/uart_buffered.rs
index bea9283e7..a1f0e2bf3 100644
--- a/tests/rp/src/bin/uart_buffered.rs
+++ b/tests/rp/src/bin/uart_buffered.rs
@@ -26,13 +26,13 @@ async fn main(_spawner: Spawner) {
26 // bufferedUart. 26 // bufferedUart.
27 27
28 let data = [ 28 let data = [
29 1u8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 29 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30,
30 30, 31, 30 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
31 ]; 31 ];
32 uart.write_all(&data).await.unwrap(); 32 uart.write_all(&data).await.unwrap();
33 info!("Done writing"); 33 info!("Done writing");
34 34
35 let mut buf = [0; 31]; 35 let mut buf = [0; 48];
36 uart.read_exact(&mut buf).await.unwrap(); 36 uart.read_exact(&mut buf).await.unwrap();
37 assert_eq!(buf, data); 37 assert_eq!(buf, data);
38 38