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authorGustav Toft <[email protected]>2024-05-30 09:56:09 +0200
committerGustav Toft <[email protected]>2024-05-30 09:56:09 +0200
commitd3c3670a966cd68b8d2d46a732ab971390ec3006 (patch)
treee0815debd51e1baa5b019049e0ea1b1a286f7742 /tests
parentab36329dce653a2ee20d32e9a5345799d9595202 (diff)
parent50210e8cdc95c3c8bea150541cd8f15482450b1e (diff)
Merge branch 'main' of https://github.com/embassy-rs/embassy into fix_main
Diffstat (limited to 'tests')
-rw-r--r--tests/nrf51422/Cargo.toml2
-rw-r--r--tests/nrf52840/Cargo.toml2
-rw-r--r--tests/perf-client/Cargo.toml2
-rw-r--r--tests/riscv32/Cargo.toml6
-rw-r--r--tests/riscv32/link.x214
-rw-r--r--tests/rp/Cargo.toml3
-rw-r--r--tests/stm32/.cargo/config.toml2
-rw-r--r--tests/stm32/Cargo.toml8
-rw-r--r--tests/stm32/src/bin/cordic.rs7
-rw-r--r--tests/stm32/src/bin/dac.rs4
-rw-r--r--tests/stm32/src/bin/dac_l1.rs2
-rw-r--r--tests/stm32/src/bin/fdcan.rs36
-rw-r--r--tests/stm32/src/bin/gpio.rs7
-rw-r--r--tests/stm32/src/bin/hash.rs3
-rw-r--r--tests/stm32/src/bin/rng.rs7
-rw-r--r--tests/stm32/src/bin/spi.rs13
-rw-r--r--tests/stm32/src/bin/stop.rs7
-rw-r--r--tests/stm32/src/bin/usart.rs8
-rw-r--r--tests/stm32/src/bin/usart_rx_ringbuffered.rs5
-rw-r--r--tests/stm32/src/common.rs61
-rw-r--r--tests/utils/Cargo.toml2
21 files changed, 361 insertions, 40 deletions
diff --git a/tests/nrf51422/Cargo.toml b/tests/nrf51422/Cargo.toml
index 07236987b..70de9d321 100644
--- a/tests/nrf51422/Cargo.toml
+++ b/tests/nrf51422/Cargo.toml
@@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0"
8teleprobe-meta = "1" 8teleprobe-meta = "1"
9 9
10embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } 10embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
11embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt", ] } 11embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt", ] }
12embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "task-arena-size-128", "integrated-timers"] } 12embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "task-arena-size-128", "integrated-timers"] }
13embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } 13embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
14embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf51", "time-driver-rtc1", "unstable-pac", "time", "gpiote"] } 14embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf51", "time-driver-rtc1", "unstable-pac", "time", "gpiote"] }
diff --git a/tests/nrf52840/Cargo.toml b/tests/nrf52840/Cargo.toml
index 84ca99f1f..4b89ec569 100644
--- a/tests/nrf52840/Cargo.toml
+++ b/tests/nrf52840/Cargo.toml
@@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0"
8teleprobe-meta = "1" 8teleprobe-meta = "1"
9 9
10embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } 10embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
11embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt", ] } 11embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt", ] }
12embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "task-arena-size-16384", "integrated-timers"] } 12embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "task-arena-size-16384", "integrated-timers"] }
13embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } 13embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
14embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac"] } 14embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac"] }
diff --git a/tests/perf-client/Cargo.toml b/tests/perf-client/Cargo.toml
index 4390a6da1..a347608b3 100644
--- a/tests/perf-client/Cargo.toml
+++ b/tests/perf-client/Cargo.toml
@@ -3,8 +3,6 @@ name = "perf-client"
3version = "0.1.0" 3version = "0.1.0"
4edition = "2021" 4edition = "2021"
5 5
6# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
7
8[dependencies] 6[dependencies]
9embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4"] } 7embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4"] }
10embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", ] } 8embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", ] }
diff --git a/tests/riscv32/Cargo.toml b/tests/riscv32/Cargo.toml
index 38fb2deec..909f9a72c 100644
--- a/tests/riscv32/Cargo.toml
+++ b/tests/riscv32/Cargo.toml
@@ -6,13 +6,13 @@ license = "MIT OR Apache-2.0"
6 6
7[dependencies] 7[dependencies]
8critical-section = { version = "1.1.1", features = ["restore-state-bool"] } 8critical-section = { version = "1.1.1", features = ["restore-state-bool"] }
9embassy-sync = { version = "0.5.0", path = "../../embassy-sync" } 9embassy-sync = { version = "0.6.0", path = "../../embassy-sync" }
10embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-riscv32", "executor-thread"] } 10embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-riscv32", "executor-thread"] }
11embassy-time = { version = "0.3.0", path = "../../embassy-time" } 11embassy-time = { version = "0.3.0", path = "../../embassy-time" }
12embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } 12embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
13 13
14riscv-rt = "0.11" 14riscv-rt = "0.12.2"
15riscv = { version = "0.10", features = ["critical-section-single-hart"] } 15riscv = { version = "0.11.1", features = ["critical-section-single-hart"] }
16 16
17 17
18[profile.dev] 18[profile.dev]
diff --git a/tests/riscv32/link.x b/tests/riscv32/link.x
new file mode 100644
index 000000000..4076b0c68
--- /dev/null
+++ b/tests/riscv32/link.x
@@ -0,0 +1,214 @@
1/* # EMBASSY notes
2 This file is a workaround for https://github.com/rust-embedded/riscv/issues/196
3 Remove when fixed upstream.
4*/
5/* # Developer notes
6
7- Symbols that start with a double underscore (__) are considered "private"
8
9- Symbols that start with a single underscore (_) are considered "semi-public"; they can be
10 overridden in a user linker script, but should not be referred from user code (e.g. `extern "C" {
11 static mut _heap_size }`).
12
13- `EXTERN` forces the linker to keep a symbol in the final binary. We use this to make sure a
14 symbol if not dropped if it appears in or near the front of the linker arguments and "it's not
15 needed" by any of the preceding objects (linker arguments)
16
17- `PROVIDE` is used to provide default values that can be overridden by a user linker script
18
19- In this linker script, you may find symbols that look like `${...}` (e.g., `4`).
20 These are wildcards used by the `build.rs` script to adapt to different target particularities.
21 Check `build.rs` for more details about these symbols.
22
23- On alignment: it's important for correctness that the VMA boundaries of both .bss and .data *and*
24 the LMA of .data are all `4`-byte aligned. These alignments are assumed by the RAM
25 initialization routine. There's also a second benefit: `4`-byte aligned boundaries
26 means that you won't see "Address (..) is out of bounds" in the disassembly produced by `objdump`.
27*/
28
29PROVIDE(_stext = ORIGIN(REGION_TEXT));
30PROVIDE(_stack_start = ORIGIN(REGION_STACK) + LENGTH(REGION_STACK));
31PROVIDE(_max_hart_id = 0);
32PROVIDE(_hart_stack_size = 2K);
33PROVIDE(_heap_size = 0);
34
35PROVIDE(InstructionMisaligned = ExceptionHandler);
36PROVIDE(InstructionFault = ExceptionHandler);
37PROVIDE(IllegalInstruction = ExceptionHandler);
38PROVIDE(Breakpoint = ExceptionHandler);
39PROVIDE(LoadMisaligned = ExceptionHandler);
40PROVIDE(LoadFault = ExceptionHandler);
41PROVIDE(StoreMisaligned = ExceptionHandler);
42PROVIDE(StoreFault = ExceptionHandler);;
43PROVIDE(UserEnvCall = ExceptionHandler);
44PROVIDE(SupervisorEnvCall = ExceptionHandler);
45PROVIDE(MachineEnvCall = ExceptionHandler);
46PROVIDE(InstructionPageFault = ExceptionHandler);
47PROVIDE(LoadPageFault = ExceptionHandler);
48PROVIDE(StorePageFault = ExceptionHandler);
49
50PROVIDE(SupervisorSoft = DefaultHandler);
51PROVIDE(MachineSoft = DefaultHandler);
52PROVIDE(SupervisorTimer = DefaultHandler);
53PROVIDE(MachineTimer = DefaultHandler);
54PROVIDE(SupervisorExternal = DefaultHandler);
55PROVIDE(MachineExternal = DefaultHandler);
56
57PROVIDE(DefaultHandler = DefaultInterruptHandler);
58PROVIDE(ExceptionHandler = DefaultExceptionHandler);
59
60/* # Pre-initialization function */
61/* If the user overrides this using the `#[pre_init]` attribute or by creating a `__pre_init` function,
62 then the function this points to will be called before the RAM is initialized. */
63PROVIDE(__pre_init = default_pre_init);
64
65/* A PAC/HAL defined routine that should initialize custom interrupt controller if needed. */
66PROVIDE(_setup_interrupts = default_setup_interrupts);
67
68/* # Multi-processing hook function
69 fn _mp_hook() -> bool;
70
71 This function is called from all the harts and must return true only for one hart,
72 which will perform memory initialization. For other harts it must return false
73 and implement wake-up in platform-dependent way (e.g. after waiting for a user interrupt).
74*/
75PROVIDE(_mp_hook = default_mp_hook);
76
77/* # Start trap function override
78 By default uses the riscv crates default trap handler
79 but by providing the `_start_trap` symbol external crates can override.
80*/
81PROVIDE(_start_trap = default_start_trap);
82
83SECTIONS
84{
85 .text.dummy (NOLOAD) :
86 {
87 /* This section is intended to make _stext address work */
88 . = ABSOLUTE(_stext);
89 } > REGION_TEXT
90
91 .text _stext :
92 {
93 /* Put reset handler first in .text section so it ends up as the entry */
94 /* point of the program. */
95 KEEP(*(.init));
96 KEEP(*(.init.rust));
97 . = ALIGN(4);
98 *(.trap);
99 *(.trap.rust);
100 *(.text.abort);
101 *(.text .text.*);
102 } > REGION_TEXT
103
104 .eh_frame : { KEEP(*(.eh_frame)) } > REGION_TEXT
105 .eh_frame_hdr : { *(.eh_frame_hdr) } > REGION_TEXT
106
107 .rodata : ALIGN(4)
108 {
109 *(.srodata .srodata.*);
110 *(.rodata .rodata.*);
111
112 /* 4-byte align the end (VMA) of this section.
113 This is required by LLD to ensure the LMA of the following .data
114 section will have the correct alignment. */
115 . = ALIGN(4);
116 } > REGION_RODATA
117
118 .data : ALIGN(4)
119 {
120 _sidata = LOADADDR(.data);
121 _sdata = .;
122 /* Must be called __global_pointer$ for linker relaxations to work. */
123 PROVIDE(__global_pointer$ = . + 0x800);
124 *(.sdata .sdata.* .sdata2 .sdata2.*);
125 *(.data .data.*);
126 . = ALIGN(4);
127 _edata = .;
128 } > REGION_DATA AT > REGION_RODATA
129
130 .bss (NOLOAD) : ALIGN(4)
131 {
132 _sbss = .;
133 *(.sbss .sbss.* .bss .bss.*);
134 . = ALIGN(4);
135 _ebss = .;
136 } > REGION_BSS
137
138 /* fictitious region that represents the memory available for the heap */
139 .heap (NOLOAD) :
140 {
141 _sheap = .;
142 . += _heap_size;
143 . = ALIGN(4);
144 _eheap = .;
145 } > REGION_HEAP
146
147 /* fictitious region that represents the memory available for the stack */
148 .stack (NOLOAD) :
149 {
150 _estack = .;
151 . = ABSOLUTE(_stack_start);
152 _sstack = .;
153 } > REGION_STACK
154
155 /* fake output .got section */
156 /* Dynamic relocations are unsupported. This section is only used to detect
157 relocatable code in the input files and raise an error if relocatable code
158 is found */
159 .got (INFO) :
160 {
161 KEEP(*(.got .got.*));
162 }
163}
164
165/* Do not exceed this mark in the error messages above | */
166ASSERT(ORIGIN(REGION_TEXT) % 4 == 0, "
167ERROR(riscv-rt): the start of the REGION_TEXT must be 4-byte aligned");
168
169ASSERT(ORIGIN(REGION_RODATA) % 4 == 0, "
170ERROR(riscv-rt): the start of the REGION_RODATA must be 4-byte aligned");
171
172ASSERT(ORIGIN(REGION_DATA) % 4 == 0, "
173ERROR(riscv-rt): the start of the REGION_DATA must be 4-byte aligned");
174
175ASSERT(ORIGIN(REGION_HEAP) % 4 == 0, "
176ERROR(riscv-rt): the start of the REGION_HEAP must be 4-byte aligned");
177
178ASSERT(ORIGIN(REGION_TEXT) % 4 == 0, "
179ERROR(riscv-rt): the start of the REGION_TEXT must be 4-byte aligned");
180
181ASSERT(ORIGIN(REGION_STACK) % 4 == 0, "
182ERROR(riscv-rt): the start of the REGION_STACK must be 4-byte aligned");
183
184ASSERT(_stext % 4 == 0, "
185ERROR(riscv-rt): `_stext` must be 4-byte aligned");
186
187ASSERT(_sdata % 4 == 0 && _edata % 4 == 0, "
188BUG(riscv-rt): .data is not 4-byte aligned");
189
190ASSERT(_sidata % 4 == 0, "
191BUG(riscv-rt): the LMA of .data is not 4-byte aligned");
192
193ASSERT(_sbss % 4 == 0 && _ebss % 4 == 0, "
194BUG(riscv-rt): .bss is not 4-byte aligned");
195
196ASSERT(_sheap % 4 == 0, "
197BUG(riscv-rt): start of .heap is not 4-byte aligned");
198
199ASSERT(_stext + SIZEOF(.text) < ORIGIN(REGION_TEXT) + LENGTH(REGION_TEXT), "
200ERROR(riscv-rt): The .text section must be placed inside the REGION_TEXT region.
201Set _stext to an address smaller than 'ORIGIN(REGION_TEXT) + LENGTH(REGION_TEXT)'");
202
203ASSERT(SIZEOF(.stack) > (_max_hart_id + 1) * _hart_stack_size, "
204ERROR(riscv-rt): .stack section is too small for allocating stacks for all the harts.
205Consider changing `_max_hart_id` or `_hart_stack_size`.");
206
207ASSERT(SIZEOF(.got) == 0, "
208.got section detected in the input files. Dynamic relocations are not
209supported. If you are linking to C code compiled using the `gcc` crate
210then modify your build script to compile the C code _without_ the
211-fPIC flag. See the documentation of the `gcc::Config.fpic` method for
212details.");
213
214/* Do not exceed this mark in the error messages above | */
diff --git a/tests/rp/Cargo.toml b/tests/rp/Cargo.toml
index e67f2117d..b7eee92e8 100644
--- a/tests/rp/Cargo.toml
+++ b/tests/rp/Cargo.toml
@@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0"
7[dependencies] 7[dependencies]
8teleprobe-meta = "1.1" 8teleprobe-meta = "1.1"
9 9
10embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } 10embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] }
11embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } 11embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] }
12embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", ] } 12embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", ] }
13embassy-rp = { version = "0.1.0", path = "../../embassy-rp", features = [ "defmt", "unstable-pac", "time-driver", "critical-section-impl", "intrinsics", "rom-v2-intrinsics", "run-from-ram"] } 13embassy-rp = { version = "0.1.0", path = "../../embassy-rp", features = [ "defmt", "unstable-pac", "time-driver", "critical-section-impl", "intrinsics", "rom-v2-intrinsics", "run-from-ram"] }
@@ -29,7 +29,6 @@ embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
29embedded-hal-async = { version = "1.0" } 29embedded-hal-async = { version = "1.0" }
30embedded-hal-bus = { version = "0.1", features = ["async"] } 30embedded-hal-bus = { version = "0.1", features = ["async"] }
31panic-probe = { version = "0.3.0", features = ["print-defmt"] } 31panic-probe = { version = "0.3.0", features = ["print-defmt"] }
32futures = { version = "0.3.17", default-features = false, features = ["async-await"] }
33embedded-io-async = { version = "0.6.1" } 32embedded-io-async = { version = "0.6.1" }
34embedded-storage = { version = "0.3" } 33embedded-storage = { version = "0.3" }
35static_cell = "2" 34static_cell = "2"
diff --git a/tests/stm32/.cargo/config.toml b/tests/stm32/.cargo/config.toml
index 528bd3451..8752da59b 100644
--- a/tests/stm32/.cargo/config.toml
+++ b/tests/stm32/.cargo/config.toml
@@ -4,7 +4,7 @@
4 4
5[target.'cfg(all(target_arch = "arm", target_os = "none"))'] 5[target.'cfg(all(target_arch = "arm", target_os = "none"))']
6runner = "teleprobe client run" 6runner = "teleprobe client run"
7#runner = "teleprobe local run --chip STM32F103C8 --elf" 7#runner = "teleprobe local run --chip STM32H7S3L8Hx --elf"
8 8
9rustflags = [ 9rustflags = [
10 # Code-size optimizations. 10 # Code-size optimizations.
diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml
index e09083111..f6d1d98eb 100644
--- a/tests/stm32/Cargo.toml
+++ b/tests/stm32/Cargo.toml
@@ -15,7 +15,7 @@ stm32f446re = ["embassy-stm32/stm32f446re", "chrono", "stop", "can", "not-gpdma"
15stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth", "rng"] 15stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth", "rng"]
16stm32g071rb = ["embassy-stm32/stm32g071rb", "cm0", "not-gpdma", "dac", "ucpd"] 16stm32g071rb = ["embassy-stm32/stm32g071rb", "cm0", "not-gpdma", "dac", "ucpd"]
17stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "stop", "not-gpdma", "rng", "fdcan", "cordic"] 17stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "stop", "not-gpdma", "rng", "fdcan", "cordic"]
18stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng", "hash", "cordic"] 18stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng", "fdcan", "hash", "cordic", "stop"]
19stm32h753zi = ["embassy-stm32/stm32h753zi", "chrono", "not-gpdma", "eth", "rng", "fdcan", "hash", "cryp"] 19stm32h753zi = ["embassy-stm32/stm32h753zi", "chrono", "not-gpdma", "eth", "rng", "fdcan", "hash", "cryp"]
20stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac", "rng", "fdcan", "hash", "cryp"] 20stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac", "rng", "fdcan", "hash", "cryp"]
21stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "not-gpdma", "rng", "fdcan"] 21stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "not-gpdma", "rng", "fdcan"]
@@ -31,7 +31,9 @@ stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac"
31stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng", "hash"] 31stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng", "hash"]
32stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono"] 32stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono"]
33stm32f091rc = ["embassy-stm32/stm32f091rc", "cm0", "not-gpdma", "chrono"] 33stm32f091rc = ["embassy-stm32/stm32f091rc", "cm0", "not-gpdma", "chrono"]
34stm32h503rb = ["embassy-stm32/stm32h503rb", "rng"] 34stm32h503rb = ["embassy-stm32/stm32h503rb", "rng", "stop"]
35stm32h7s3l8 = ["embassy-stm32/stm32h7s3l8", "rng", "cordic", "hash"] # TODO: fdcan crashes, cryp dma hangs.
36stm32u083rc = ["embassy-stm32/stm32u083rc", "cm0", "rng", "chrono"]
35 37
36cryp = [] 38cryp = []
37hash = [] 39hash = []
@@ -55,7 +57,7 @@ cm0 = ["portable-atomic/unsafe-assume-single-core"]
55[dependencies] 57[dependencies]
56teleprobe-meta = "1" 58teleprobe-meta = "1"
57 59
58embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } 60embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] }
59embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } 61embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] }
60embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "tick-hz-131_072", "defmt-timestamp-uptime"] } 62embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "tick-hz-131_072", "defmt-timestamp-uptime"] }
61embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "unstable-pac", "memory-x", "time-driver-any"] } 63embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "unstable-pac", "memory-x", "time-driver-any"] }
diff --git a/tests/stm32/src/bin/cordic.rs b/tests/stm32/src/bin/cordic.rs
index 400e10207..e09226de8 100644
--- a/tests/stm32/src/bin/cordic.rs
+++ b/tests/stm32/src/bin/cordic.rs
@@ -67,7 +67,12 @@ async fn main(_spawner: Spawner) {
67 #[cfg(feature = "stm32g491re")] 67 #[cfg(feature = "stm32g491re")]
68 let (mut write_dma, mut read_dma) = (dp.DMA1_CH4, dp.DMA1_CH5); 68 let (mut write_dma, mut read_dma) = (dp.DMA1_CH4, dp.DMA1_CH5);
69 69
70 #[cfg(any(feature = "stm32h563zi", feature = "stm32u585ai", feature = "stm32u5a5zj"))] 70 #[cfg(any(
71 feature = "stm32h563zi",
72 feature = "stm32u585ai",
73 feature = "stm32u5a5zj",
74 feature = "stm32h7s3l8"
75 ))]
71 let (mut write_dma, mut read_dma) = (dp.GPDMA1_CH0, dp.GPDMA1_CH1); 76 let (mut write_dma, mut read_dma) = (dp.GPDMA1_CH0, dp.GPDMA1_CH1);
72 77
73 // calculate first result using blocking mode 78 // calculate first result using blocking mode
diff --git a/tests/stm32/src/bin/dac.rs b/tests/stm32/src/bin/dac.rs
index 9d64742df..06501ab14 100644
--- a/tests/stm32/src/bin/dac.rs
+++ b/tests/stm32/src/bin/dac.rs
@@ -13,7 +13,7 @@ use embassy_executor::Spawner;
13use embassy_stm32::adc::Adc; 13use embassy_stm32::adc::Adc;
14use embassy_stm32::dac::{DacCh1, Value}; 14use embassy_stm32::dac::{DacCh1, Value};
15use embassy_stm32::dma::NoDma; 15use embassy_stm32::dma::NoDma;
16use embassy_time::{Delay, Timer}; 16use embassy_time::Timer;
17use micromath::F32Ext; 17use micromath::F32Ext;
18use {defmt_rtt as _, panic_probe as _}; 18use {defmt_rtt as _, panic_probe as _};
19 19
@@ -28,7 +28,7 @@ async fn main(_spawner: Spawner) {
28 let mut adc_pin = unsafe { core::ptr::read(&dac_pin) }; 28 let mut adc_pin = unsafe { core::ptr::read(&dac_pin) };
29 29
30 let mut dac = DacCh1::new(dac, NoDma, dac_pin); 30 let mut dac = DacCh1::new(dac, NoDma, dac_pin);
31 let mut adc = Adc::new(adc, &mut Delay); 31 let mut adc = Adc::new(adc);
32 32
33 #[cfg(feature = "stm32h755zi")] 33 #[cfg(feature = "stm32h755zi")]
34 let normalization_factor = 256; 34 let normalization_factor = 256;
diff --git a/tests/stm32/src/bin/dac_l1.rs b/tests/stm32/src/bin/dac_l1.rs
index f8b00aaef..d5e9c9722 100644
--- a/tests/stm32/src/bin/dac_l1.rs
+++ b/tests/stm32/src/bin/dac_l1.rs
@@ -19,7 +19,7 @@ use micromath::F32Ext;
19use {defmt_rtt as _, panic_probe as _}; 19use {defmt_rtt as _, panic_probe as _};
20 20
21bind_interrupts!(struct Irqs { 21bind_interrupts!(struct Irqs {
22 ADC1 => embassy_stm32::adc::InterruptHandler<peripherals::ADC>; 22 ADC1 => embassy_stm32::adc::InterruptHandler<peripherals::ADC1>;
23}); 23});
24 24
25#[embassy_executor::main] 25#[embassy_executor::main]
diff --git a/tests/stm32/src/bin/fdcan.rs b/tests/stm32/src/bin/fdcan.rs
index 27bdd038a..20bd3f7e3 100644
--- a/tests/stm32/src/bin/fdcan.rs
+++ b/tests/stm32/src/bin/fdcan.rs
@@ -24,7 +24,19 @@ bind_interrupts!(struct Irqs1 {
24 FDCAN1_IT1 => can::IT1InterruptHandler<FDCAN1>; 24 FDCAN1_IT1 => can::IT1InterruptHandler<FDCAN1>;
25}); 25});
26 26
27#[cfg(any(feature = "stm32h755zi", feature = "stm32h753zi", feature = "stm32h563zi"))] 27#[cfg(feature = "stm32h563zi")]
28fn options() -> (Config, TestOptions) {
29 info!("H563 config");
30 (
31 config(),
32 TestOptions {
33 max_latency: Duration::from_micros(1200),
34 max_buffered: 3,
35 },
36 )
37}
38
39#[cfg(any(feature = "stm32h755zi", feature = "stm32h753zi"))]
28fn options() -> (Config, TestOptions) { 40fn options() -> (Config, TestOptions) {
29 use embassy_stm32::rcc; 41 use embassy_stm32::rcc;
30 info!("H75 config"); 42 info!("H75 config");
@@ -62,6 +74,20 @@ fn options() -> (Config, TestOptions) {
62 ) 74 )
63} 75}
64 76
77#[cfg(any(feature = "stm32h7s3l8"))]
78fn options() -> (Config, TestOptions) {
79 use embassy_stm32::rcc;
80 let mut c = config();
81 c.rcc.mux.fdcansel = rcc::mux::Fdcansel::HSE;
82 (
83 c,
84 TestOptions {
85 max_latency: Duration::from_micros(1200),
86 max_buffered: 3,
87 },
88 )
89}
90
65#[cfg(any(feature = "stm32g491re", feature = "stm32g431cb"))] 91#[cfg(any(feature = "stm32g491re", feature = "stm32g431cb"))]
66fn options() -> (Config, TestOptions) { 92fn options() -> (Config, TestOptions) {
67 info!("G4 config"); 93 info!("G4 config");
@@ -88,11 +114,11 @@ async fn main(_spawner: Spawner) {
88 can.set_bitrate(250_000); 114 can.set_bitrate(250_000);
89 can2.set_bitrate(250_000); 115 can2.set_bitrate(250_000);
90 116
91 can.set_extended_filter( 117 can.properties().set_extended_filter(
92 can::filter::ExtendedFilterSlot::_0, 118 can::filter::ExtendedFilterSlot::_0,
93 can::filter::ExtendedFilter::accept_all_into_fifo1(), 119 can::filter::ExtendedFilter::accept_all_into_fifo1(),
94 ); 120 );
95 can2.set_extended_filter( 121 can2.properties().set_extended_filter(
96 can::filter::ExtendedFilterSlot::_0, 122 can::filter::ExtendedFilterSlot::_0,
97 can::filter::ExtendedFilter::accept_all_into_fifo1(), 123 can::filter::ExtendedFilter::accept_all_into_fifo1(),
98 ); 124 );
@@ -106,8 +132,8 @@ async fn main(_spawner: Spawner) {
106 info!("CAN Configured"); 132 info!("CAN Configured");
107 133
108 // Test again with a split 134 // Test again with a split
109 let (mut tx, mut rx) = can.split(); 135 let (mut tx, mut rx, _props) = can.split();
110 let (mut tx2, mut rx2) = can2.split(); 136 let (mut tx2, mut rx2, _props) = can2.split();
111 run_split_can_tests(&mut tx, &mut rx, &options).await; 137 run_split_can_tests(&mut tx, &mut rx, &options).await;
112 run_split_can_tests(&mut tx2, &mut rx2, &options).await; 138 run_split_can_tests(&mut tx2, &mut rx2, &options).await;
113 139
diff --git a/tests/stm32/src/bin/gpio.rs b/tests/stm32/src/bin/gpio.rs
index c4e2fe161..dfa299ab5 100644
--- a/tests/stm32/src/bin/gpio.rs
+++ b/tests/stm32/src/bin/gpio.rs
@@ -216,7 +216,12 @@ async fn main(_spawner: Spawner) {
216} 216}
217 217
218fn delay() { 218fn delay() {
219 #[cfg(any(feature = "stm32h755zi", feature = "stm32h753zi", feature = "stm32h7a3zi"))] 219 #[cfg(any(
220 feature = "stm32h755zi",
221 feature = "stm32h753zi",
222 feature = "stm32h7a3zi",
223 feature = "stm32h7s3l8"
224 ))]
220 cortex_m::asm::delay(9000); 225 cortex_m::asm::delay(9000);
221 cortex_m::asm::delay(1000); 226 cortex_m::asm::delay(1000);
222} 227}
diff --git a/tests/stm32/src/bin/hash.rs b/tests/stm32/src/bin/hash.rs
index 8cc5d593f..5f54ea435 100644
--- a/tests/stm32/src/bin/hash.rs
+++ b/tests/stm32/src/bin/hash.rs
@@ -26,7 +26,8 @@ bind_interrupts!(struct Irqs {
26 feature = "stm32h563zi", 26 feature = "stm32h563zi",
27 feature = "stm32h503rb", 27 feature = "stm32h503rb",
28 feature = "stm32u5a5zj", 28 feature = "stm32u5a5zj",
29 feature = "stm32u585ai" 29 feature = "stm32u585ai",
30 feature = "stm32h7s3l8"
30))] 31))]
31bind_interrupts!(struct Irqs { 32bind_interrupts!(struct Irqs {
32 HASH => hash::InterruptHandler<peripherals::HASH>; 33 HASH => hash::InterruptHandler<peripherals::HASH>;
diff --git a/tests/stm32/src/bin/rng.rs b/tests/stm32/src/bin/rng.rs
index 7f2023d4d..15ef4fb60 100644
--- a/tests/stm32/src/bin/rng.rs
+++ b/tests/stm32/src/bin/rng.rs
@@ -23,12 +23,17 @@ bind_interrupts!(struct Irqs {
23bind_interrupts!(struct Irqs { 23bind_interrupts!(struct Irqs {
24 RNG_LPUART1 => rng::InterruptHandler<peripherals::RNG>; 24 RNG_LPUART1 => rng::InterruptHandler<peripherals::RNG>;
25}); 25});
26#[cfg(any(feature = "stm32u083rc"))]
27bind_interrupts!(struct Irqs {
28 RNG_CRYP => rng::InterruptHandler<peripherals::RNG>;
29});
26#[cfg(not(any( 30#[cfg(not(any(
27 feature = "stm32l4a6zg", 31 feature = "stm32l4a6zg",
28 feature = "stm32l073rz", 32 feature = "stm32l073rz",
29 feature = "stm32h755zi", 33 feature = "stm32h755zi",
30 feature = "stm32h753zi", 34 feature = "stm32h753zi",
31 feature = "stm32f429zi" 35 feature = "stm32f429zi",
36 feature = "stm32u083rc"
32)))] 37)))]
33bind_interrupts!(struct Irqs { 38bind_interrupts!(struct Irqs {
34 RNG => rng::InterruptHandler<peripherals::RNG>; 39 RNG => rng::InterruptHandler<peripherals::RNG>;
diff --git a/tests/stm32/src/bin/spi.rs b/tests/stm32/src/bin/spi.rs
index b0bdd477f..c1576bfeb 100644
--- a/tests/stm32/src/bin/spi.rs
+++ b/tests/stm32/src/bin/spi.rs
@@ -6,7 +6,6 @@ mod common;
6use common::*; 6use common::*;
7use defmt::assert_eq; 7use defmt::assert_eq;
8use embassy_executor::Spawner; 8use embassy_executor::Spawner;
9use embassy_stm32::dma::NoDma;
10use embassy_stm32::spi::{self, Spi}; 9use embassy_stm32::spi::{self, Spi};
11use embassy_stm32::time::Hertz; 10use embassy_stm32::time::Hertz;
12 11
@@ -23,11 +22,11 @@ async fn main(_spawner: Spawner) {
23 let mut spi_config = spi::Config::default(); 22 let mut spi_config = spi::Config::default();
24 spi_config.frequency = Hertz(1_000_000); 23 spi_config.frequency = Hertz(1_000_000);
25 24
26 let mut spi = Spi::new( 25 let mut spi = Spi::new_blocking(
27 spi, sck, // Arduino D13 26 spi, sck, // Arduino D13
28 mosi, // Arduino D11 27 mosi, // Arduino D11
29 miso, // Arduino D12 28 miso, // Arduino D12
30 NoDma, NoDma, spi_config, 29 spi_config,
31 ); 30 );
32 31
33 let data: [u8; 9] = [0x00, 0xFF, 0xAA, 0x55, 0xC0, 0xFF, 0xEE, 0xC0, 0xDE]; 32 let data: [u8; 9] = [0x00, 0xFF, 0xAA, 0x55, 0xC0, 0xFF, 0xEE, 0xC0, 0xDE];
@@ -59,6 +58,14 @@ async fn main(_spawner: Spawner) {
59 spi.blocking_read::<u8>(&mut []).unwrap(); 58 spi.blocking_read::<u8>(&mut []).unwrap();
60 spi.blocking_write::<u8>(&[]).unwrap(); 59 spi.blocking_write::<u8>(&[]).unwrap();
61 60
61 // Assert the RCC bit gets disabled on drop.
62 #[cfg(feature = "stm32f429zi")]
63 {
64 defmt::assert!(embassy_stm32::pac::RCC.apb2enr().read().spi1en());
65 drop(spi);
66 defmt::assert!(!embassy_stm32::pac::RCC.apb2enr().read().spi1en());
67 }
68
62 info!("Test OK"); 69 info!("Test OK");
63 cortex_m::asm::bkpt(); 70 cortex_m::asm::bkpt();
64} 71}
diff --git a/tests/stm32/src/bin/stop.rs b/tests/stm32/src/bin/stop.rs
index 000296d46..c1106bb2f 100644
--- a/tests/stm32/src/bin/stop.rs
+++ b/tests/stm32/src/bin/stop.rs
@@ -51,6 +51,13 @@ async fn async_main(spawner: Spawner) {
51 let mut config = Config::default(); 51 let mut config = Config::default();
52 config.rcc.ls = LsConfig::default_lse(); 52 config.rcc.ls = LsConfig::default_lse();
53 53
54 // System Clock seems cannot be greater than 16 MHz
55 #[cfg(any(feature = "stm32h563zi", feature = "stm32h503rb"))]
56 {
57 use embassy_stm32::rcc::HSIPrescaler;
58 config.rcc.hsi = Some(HSIPrescaler::DIV4); // 64 MHz HSI will need a /4
59 }
60
54 let p = embassy_stm32::init(config); 61 let p = embassy_stm32::init(config);
55 info!("Hello World!"); 62 info!("Hello World!");
56 63
diff --git a/tests/stm32/src/bin/usart.rs b/tests/stm32/src/bin/usart.rs
index 9b20eb784..a6e34674d 100644
--- a/tests/stm32/src/bin/usart.rs
+++ b/tests/stm32/src/bin/usart.rs
@@ -6,7 +6,6 @@ mod common;
6use common::*; 6use common::*;
7use defmt::{assert, assert_eq, unreachable}; 7use defmt::{assert, assert_eq, unreachable};
8use embassy_executor::Spawner; 8use embassy_executor::Spawner;
9use embassy_stm32::dma::NoDma;
10use embassy_stm32::usart::{Config, ConfigError, Error, Uart}; 9use embassy_stm32::usart::{Config, ConfigError, Error, Uart};
11use embassy_time::{block_for, Duration, Instant}; 10use embassy_time::{block_for, Duration, Instant};
12 11
@@ -20,11 +19,10 @@ async fn main(_spawner: Spawner) {
20 let mut usart = peri!(p, UART); 19 let mut usart = peri!(p, UART);
21 let mut rx = peri!(p, UART_RX); 20 let mut rx = peri!(p, UART_RX);
22 let mut tx = peri!(p, UART_TX); 21 let mut tx = peri!(p, UART_TX);
23 let irq = irqs!(UART);
24 22
25 { 23 {
26 let config = Config::default(); 24 let config = Config::default();
27 let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config).unwrap(); 25 let mut usart = Uart::new_blocking(&mut usart, &mut rx, &mut tx, config).unwrap();
28 26
29 // We can't send too many bytes, they have to fit in the FIFO. 27 // We can't send too many bytes, they have to fit in the FIFO.
30 // This is because we aren't sending+receiving at the same time. 28 // This is because we aren't sending+receiving at the same time.
@@ -40,7 +38,7 @@ async fn main(_spawner: Spawner) {
40 // Test error handling with with an overflow error 38 // Test error handling with with an overflow error
41 { 39 {
42 let config = Config::default(); 40 let config = Config::default();
43 let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config).unwrap(); 41 let mut usart = Uart::new_blocking(&mut usart, &mut rx, &mut tx, config).unwrap();
44 42
45 // Send enough bytes to fill the RX FIFOs off all USART versions. 43 // Send enough bytes to fill the RX FIFOs off all USART versions.
46 let data = [0; 64]; 44 let data = [0; 64];
@@ -70,7 +68,7 @@ async fn main(_spawner: Spawner) {
70 68
71 let mut config = Config::default(); 69 let mut config = Config::default();
72 config.baudrate = baudrate; 70 config.baudrate = baudrate;
73 let mut usart = match Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config) { 71 let mut usart = match Uart::new_blocking(&mut usart, &mut rx, &mut tx, config) {
74 Ok(x) => x, 72 Ok(x) => x,
75 Err(ConfigError::BaudrateTooHigh) => { 73 Err(ConfigError::BaudrateTooHigh) => {
76 info!("baudrate too high"); 74 info!("baudrate too high");
diff --git a/tests/stm32/src/bin/usart_rx_ringbuffered.rs b/tests/stm32/src/bin/usart_rx_ringbuffered.rs
index 0c110421d..ea1e52358 100644
--- a/tests/stm32/src/bin/usart_rx_ringbuffered.rs
+++ b/tests/stm32/src/bin/usart_rx_ringbuffered.rs
@@ -8,6 +8,7 @@ mod common;
8use common::*; 8use common::*;
9use defmt::{assert_eq, panic}; 9use defmt::{assert_eq, panic};
10use embassy_executor::Spawner; 10use embassy_executor::Spawner;
11use embassy_stm32::mode::Async;
11use embassy_stm32::usart::{Config, DataBits, Parity, RingBufferedUartRx, StopBits, Uart, UartTx}; 12use embassy_stm32::usart::{Config, DataBits, Parity, RingBufferedUartRx, StopBits, Uart, UartTx};
12use embassy_time::Timer; 13use embassy_time::Timer;
13use rand_chacha::ChaCha8Rng; 14use rand_chacha::ChaCha8Rng;
@@ -51,7 +52,7 @@ async fn main(spawner: Spawner) {
51} 52}
52 53
53#[embassy_executor::task] 54#[embassy_executor::task]
54async fn transmit_task(mut tx: UartTx<'static, peris::UART, peris::UART_TX_DMA>) { 55async fn transmit_task(mut tx: UartTx<'static, Async>) {
55 // workaround https://github.com/embassy-rs/embassy/issues/1426 56 // workaround https://github.com/embassy-rs/embassy/issues/1426
56 Timer::after_millis(100).await; 57 Timer::after_millis(100).await;
57 58
@@ -74,7 +75,7 @@ async fn transmit_task(mut tx: UartTx<'static, peris::UART, peris::UART_TX_DMA>)
74} 75}
75 76
76#[embassy_executor::task] 77#[embassy_executor::task]
77async fn receive_task(mut rx: RingBufferedUartRx<'static, peris::UART>) { 78async fn receive_task(mut rx: RingBufferedUartRx<'static>) {
78 info!("Ready to receive..."); 79 info!("Ready to receive...");
79 80
80 let mut rng = ChaCha8Rng::seed_from_u64(1337); 81 let mut rng = ChaCha8Rng::seed_from_u64(1337);
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs
index 0e555efc8..4e0231858 100644
--- a/tests/stm32/src/common.rs
+++ b/tests/stm32/src/common.rs
@@ -60,6 +60,10 @@ teleprobe_meta::target!(b"nucleo-stm32wba52cg");
60teleprobe_meta::target!(b"nucleo-stm32f091rc"); 60teleprobe_meta::target!(b"nucleo-stm32f091rc");
61#[cfg(feature = "stm32h503rb")] 61#[cfg(feature = "stm32h503rb")]
62teleprobe_meta::target!(b"nucleo-stm32h503rb"); 62teleprobe_meta::target!(b"nucleo-stm32h503rb");
63#[cfg(feature = "stm32h7s3l8")]
64teleprobe_meta::target!(b"nucleo-stm32h7s3l8");
65#[cfg(feature = "stm32u083rc")]
66teleprobe_meta::target!(b"nucleo-stm32u083rc");
63 67
64macro_rules! define_peris { 68macro_rules! define_peris {
65 ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => { 69 ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => {
@@ -120,7 +124,7 @@ define_peris!(
120define_peris!( 124define_peris!(
121 UART = USART6, UART_TX = PG14, UART_RX = PG9, UART_TX_DMA = DMA2_CH6, UART_RX_DMA = DMA2_CH1, 125 UART = USART6, UART_TX = PG14, UART_RX = PG9, UART_TX_DMA = DMA2_CH6, UART_RX_DMA = DMA2_CH1,
122 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA2_CH3, SPI_RX_DMA = DMA2_CH2, 126 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA2_CH3, SPI_RX_DMA = DMA2_CH2,
123 ADC = ADC1, DAC = DAC, DAC_PIN = PA4, 127 ADC = ADC1, DAC = DAC1, DAC_PIN = PA4,
124 CAN = CAN1, CAN_RX = PD0, CAN_TX = PD1, 128 CAN = CAN1, CAN_RX = PD0, CAN_TX = PD1,
125 @irq UART = {USART6 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART6>;}, 129 @irq UART = {USART6 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART6>;},
126); 130);
@@ -128,7 +132,7 @@ define_peris!(
128define_peris!( 132define_peris!(
129 UART = USART1, UART_TX = PA9, UART_RX = PA10, UART_TX_DMA = DMA2_CH7, UART_RX_DMA = DMA2_CH5, 133 UART = USART1, UART_TX = PA9, UART_RX = PA10, UART_TX_DMA = DMA2_CH7, UART_RX_DMA = DMA2_CH5,
130 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA2_CH3, SPI_RX_DMA = DMA2_CH2, 134 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA2_CH3, SPI_RX_DMA = DMA2_CH2,
131 ADC = ADC1, DAC = DAC, DAC_PIN = PA4, 135 ADC = ADC1, DAC = DAC1, DAC_PIN = PA4,
132 CAN = CAN1, CAN_RX = PA11, CAN_TX = PA12, 136 CAN = CAN1, CAN_RX = PA11, CAN_TX = PA12,
133 @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;}, 137 @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
134); 138);
@@ -210,7 +214,7 @@ define_peris!(
210define_peris!( 214define_peris!(
211 UART = USART3, UART_TX = PB10, UART_RX = PB11, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3, 215 UART = USART3, UART_TX = PB10, UART_RX = PB11, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3,
212 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2, 216 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2,
213 ADC = ADC, DAC = DAC, DAC_PIN = PA4, 217 ADC = ADC1, DAC = DAC1, DAC_PIN = PA4,
214 @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;}, 218 @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
215); 219);
216#[cfg(feature = "stm32l552ze")] 220#[cfg(feature = "stm32l552ze")]
@@ -249,6 +253,19 @@ define_peris!(
249 SPI = SPI1, SPI_SCK = PB4, SPI_MOSI = PA15, SPI_MISO = PB3, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, 253 SPI = SPI1, SPI_SCK = PB4, SPI_MOSI = PA15, SPI_MISO = PB3, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1,
250 @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;}, 254 @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;},
251); 255);
256#[cfg(feature = "stm32h7s3l8")]
257define_peris!(
258 CRYP_IN_DMA = GPDMA1_CH0, CRYP_OUT_DMA = GPDMA1_CH1,
259 UART = USART1, UART_TX = PB14, UART_RX = PA10, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1,
260 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PB5, SPI_MISO = PA6, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1,
261 @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
262);
263#[cfg(feature = "stm32u083rc")]
264define_peris!(
265 UART = USART1, UART_TX = PA9, UART_RX = PA10, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
266 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
267 @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
268);
252 269
253pub fn config() -> Config { 270pub fn config() -> Config {
254 #[allow(unused_mut)] 271 #[allow(unused_mut)]
@@ -641,6 +658,44 @@ pub fn config() -> Config {
641 }); 658 });
642 config.rcc.sys = Sysclk::PLL1_R; 659 config.rcc.sys = Sysclk::PLL1_R;
643 } 660 }
661 #[cfg(any(feature = "stm32h7s3l8"))]
662 {
663 config.rcc.hse = Some(Hse {
664 freq: Hertz(24_000_000),
665 mode: HseMode::Oscillator,
666 });
667 config.rcc.pll1 = Some(Pll {
668 source: PllSource::HSE,
669 prediv: PllPreDiv::DIV3,
670 mul: PllMul::MUL150,
671 divp: Some(PllDiv::DIV2), // 600Mhz
672 divq: Some(PllDiv::DIV25), // 48Mhz
673 divr: None,
674 });
675 config.rcc.sys = Sysclk::PLL1_P; // 600 Mhz
676 config.rcc.ahb_pre = AHBPrescaler::DIV2; // 300 Mhz
677 config.rcc.apb1_pre = APBPrescaler::DIV2; // 150 Mhz
678 config.rcc.apb2_pre = APBPrescaler::DIV2; // 150 Mhz
679 config.rcc.apb4_pre = APBPrescaler::DIV2; // 150 Mhz
680 config.rcc.apb5_pre = APBPrescaler::DIV2; // 150 Mhz
681 config.rcc.voltage_scale = VoltageScale::HIGH;
682 config.rcc.mux.spi1sel = mux::Spi123sel::PLL1_Q;
683 }
684 #[cfg(any(feature = "stm32u083rc"))]
685 {
686 config.rcc.hsi = true;
687 config.rcc.pll = Some(Pll {
688 source: PllSource::HSI, // 16 MHz
689 prediv: PllPreDiv::DIV1,
690 mul: PllMul::MUL7,
691 divp: None,
692 divq: None,
693 divr: Some(PllRDiv::DIV2), // 56 MHz
694 });
695 config.rcc.sys = Sysclk::PLL1_R;
696 config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: true }); // needed for USB
697 config.rcc.mux.clk48sel = mux::Clk48sel::HSI48; // USB uses ICLK
698 }
644 699
645 config 700 config
646} 701}
diff --git a/tests/utils/Cargo.toml b/tests/utils/Cargo.toml
index 7d66fd586..7b54a4f52 100644
--- a/tests/utils/Cargo.toml
+++ b/tests/utils/Cargo.toml
@@ -3,8 +3,6 @@ name = "test-utils"
3version = "0.1.0" 3version = "0.1.0"
4edition = "2021" 4edition = "2021"
5 5
6# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
7
8[dependencies] 6[dependencies]
9rand = "0.8" 7rand = "0.8"
10serial = "0.4" 8serial = "0.4"