163 files changed, 3045 insertions, 1072 deletions
diff --git a/.vscode/settings.json b/.vscode/settings.json
index 73dfa53a4..2b99a313d 100644
--- a/.vscode/settings.json
+++ b/.vscode/settings.json
@@ -34,6 +34,7 @@
    // "examples/mspm0c1104/Cargo.toml",
    // "examples/mspm0g3507/Cargo.toml",
    // "examples/mspm0g3519/Cargo.toml",
+    // "examples/mspm0g5187/Cargo.toml",
    // "examples/mspm0l1306/Cargo.toml",
    // "examples/mspm0l2228/Cargo.toml",
    // "examples/nrf52840-rtic/Cargo.toml",
diff --git a/ci.sh b/ci.sh
index e489982a7..1eecd158f 100755
--- a/ci.sh
+++ b/ci.sh
@@ -35,8 +35,8 @@ rm -rf out/tests/nrf5340-dk
 # disabled because these boards are not on the shelf
 rm -rf out/tests/mspm0g3507
-# rm out/tests/stm32wb55rg/wpan_mac
+rm out/tests/stm32wb55rg/wpan_mac
-# rm out/tests/stm32wb55rg/wpan_ble
+rm out/tests/stm32wb55rg/wpan_ble
 # unstable, I think it's running out of RAM?
 rm out/tests/stm32f207zg/eth
diff --git a/cyw43/Cargo.toml b/cyw43/Cargo.toml
index 6d7647697..c4f5c0ebd 100644
--- a/cyw43/Cargo.toml
+++ b/cyw43/Cargo.toml
@@ -10,7 +10,7 @@ repository = "https://github.com/embassy-rs/embassy"
 documentation = "https://docs.embassy.dev/cyw43"
 [features]
-defmt = ["dep:defmt", "heapless/defmt-03", "embassy-time/defmt", "bt-hci?/defmt", "embedded-io-async?/defmt-03"]
+defmt = ["dep:defmt", "heapless/defmt-03", "embassy-time/defmt", "bt-hci?/defmt", "embedded-io-async?/defmt"]
 log = ["dep:log"]
 bluetooth = ["dep:bt-hci", "dep:embedded-io-async"]
@@ -35,8 +35,8 @@ num_enum = { version = "0.5.7", default-features = false }
 heapless = "0.8.0"
 # Bluetooth deps
-embedded-io-async = { version = "0.6.0", optional = true }
+embedded-io-async = { version = "0.7.0", optional = true }
-bt-hci = { version = "0.6.0", optional = true }
+bt-hci = { git = "https://github.com/embassy-rs/bt-hci", rev = "51791fd4d422449dd0eca5ddead32886101215f7", optional = true }
 [package.metadata.embassy]
 build = [
diff --git a/cyw43/src/bluetooth.rs b/cyw43/src/bluetooth.rs
index 332b7048d..256451fae 100644
--- a/cyw43/src/bluetooth.rs
+++ b/cyw43/src/bluetooth.rs
@@ -490,6 +490,14 @@ impl From<FromHciBytesError> for Error {
    }
 }
+impl core::fmt::Display for Error {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        core::fmt::Debug::fmt(self, f)
+    }
+}
+impl core::error::Error for Error {}
 impl<'d> embedded_io_async::ErrorType for BtDriver<'d> {
    type Error = Error;
 }
diff --git a/docs/examples/basic/Cargo.toml b/docs/examples/basic/Cargo.toml
index fadda102b..495e484f8 100644
--- a/docs/examples/basic/Cargo.toml
+++ b/docs/examples/basic/Cargo.toml
@@ -9,7 +9,7 @@ publish = false
 [dependencies]
 embassy-executor = { version = "0.9.0", path = "../../../embassy-executor", features = ["defmt", "arch-cortex-m", "executor-thread"] }
 embassy-time = { version = "0.5.0", path = "../../../embassy-time", features = ["defmt"] }
-embassy-nrf = { version = "0.8.0", path = "../../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote"] }
+embassy-nrf = { version = "0.9.0", path = "../../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/embassy-boot-nrf/CHANGELOG.md b/embassy-boot-nrf/CHANGELOG.md
index 54b7c8067..5bf8cf4b0 100644
--- a/embassy-boot-nrf/CHANGELOG.md
+++ b/embassy-boot-nrf/CHANGELOG.md
@@ -8,6 +8,10 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 <!-- next-header -->
 ## Unreleased - ReleaseDate
+## 0.10.0 - 2025-12-15
+- Bumped embassy-nrf to 0.9.0
 ## 0.9.0 - 2025-09-30
 - Bumped embassy-nrf to 0.8.0
diff --git a/embassy-boot-nrf/Cargo.toml b/embassy-boot-nrf/Cargo.toml
index 787a28d70..4f6d9ed2e 100644
--- a/embassy-boot-nrf/Cargo.toml
+++ b/embassy-boot-nrf/Cargo.toml
@@ -1,7 +1,7 @@
 [package]
 edition = "2024"
 name = "embassy-boot-nrf"
-version = "0.9.0"
+version = "0.10.0"
 description = "Bootloader lib for nRF chips"
 license = "MIT OR Apache-2.0"
 repository = "https://github.com/embassy-rs/embassy"
@@ -36,7 +36,7 @@ defmt = { version = "1.0.1", optional = true }
 log = { version = "0.4.17", optional = true }
 embassy-sync = { version = "0.7.2", path = "../embassy-sync" }
-embassy-nrf = { version = "0.8.0", path = "../embassy-nrf", default-features = false }
+embassy-nrf = { version = "0.9.0", path = "../embassy-nrf", default-features = false }
 embassy-boot = { version = "0.6.1", path = "../embassy-boot" }
 cortex-m = { version = "0.7.6" }
 cortex-m-rt = { version = "0.7" }
diff --git a/embassy-executor/CHANGELOG.md b/embassy-executor/CHANGELOG.md
index 8f1db7de7..cc4027fca 100644
--- a/embassy-executor/CHANGELOG.md
+++ b/embassy-executor/CHANGELOG.md
@@ -16,6 +16,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - Migrate `cortex-ar` to `aarch32-cpu`. The feature name `arch-cortex-ar` remains the same and
  legacy ARM architectures are not supported.
 - Added `run_until` to `arch-std` variant of `Executor`.
+- Added `__try_embassy_time_queue_item_from_waker`
 ## 0.9.1 - 2025-08-31
diff --git a/embassy-executor/src/raw/mod.rs b/embassy-executor/src/raw/mod.rs
index ab845ed3b..2b7560de6 100644
--- a/embassy-executor/src/raw/mod.rs
+++ b/embassy-executor/src/raw/mod.rs
@@ -49,6 +49,7 @@ use self::run_queue::{RunQueue, RunQueueItem};
 use self::state::State;
 use self::util::{SyncUnsafeCell, UninitCell};
 pub use self::waker::task_from_waker;
+use self::waker::try_task_from_waker;
 use super::SpawnToken;
 use crate::{Metadata, SpawnError};
@@ -57,6 +58,11 @@ extern "Rust" fn __embassy_time_queue_item_from_waker(waker: &Waker) -> &'static
    unsafe { task_from_waker(waker).timer_queue_item() }
 }
+#[unsafe(no_mangle)]
+extern "Rust" fn __try_embassy_time_queue_item_from_waker(waker: &Waker) -> Option<&'static mut TimerQueueItem> {
+    unsafe { try_task_from_waker(waker).map(|task| task.timer_queue_item()) }
+}
 /// Raw task header for use in task pointers.
 ///
 /// A task can be in one of the following states:
diff --git a/embassy-executor/src/raw/waker.rs b/embassy-executor/src/raw/waker.rs
index 2706f0fdf..8416f9f93 100644
--- a/embassy-executor/src/raw/waker.rs
+++ b/embassy-executor/src/raw/waker.rs
@@ -32,13 +32,18 @@ pub(crate) unsafe fn from_task(p: TaskRef) -> Waker {
 ///
 /// Panics if the waker is not created by the Embassy executor.
 pub fn task_from_waker(waker: &Waker) -> TaskRef {
+    unwrap!(
+        try_task_from_waker(waker),
+        "Found waker not created by the Embassy executor. Unless the generic timer queue is enabled, `embassy_time::Timer` only works with the Embassy executor."
+    )
+}
+pub(crate) fn try_task_from_waker(waker: &Waker) -> Option<TaskRef> {
    // make sure to compare vtable addresses. Doing `==` on the references
    // will compare the contents, which is slower.
    if waker.vtable() as *const _ != &VTABLE as *const _ {
-        panic!(
+        return None;
-            "Found waker not created by the Embassy executor. `embassy_time::Timer` only works with the Embassy executor."
-        )
    }
    // safety: our wakers are always created with `TaskRef::as_ptr`
-    unsafe { TaskRef::from_ptr(waker.data() as *const TaskHeader) }
+    Some(unsafe { TaskRef::from_ptr(waker.data() as *const TaskHeader) })
 }
diff --git a/embassy-executor/src/raw/waker_turbo.rs b/embassy-executor/src/raw/waker_turbo.rs
index 919bcc61a..ee33e7633 100644
--- a/embassy-executor/src/raw/waker_turbo.rs
+++ b/embassy-executor/src/raw/waker_turbo.rs
@@ -25,6 +25,10 @@ pub fn task_from_waker(waker: &Waker) -> TaskRef {
    unsafe { TaskRef::from_ptr(ptr as *const TaskHeader) }
 }
+pub(crate) fn try_task_from_waker(waker: &Waker) -> Option<TaskRef> {
+    Some(task_from_waker(waker))
+}
 #[inline(never)]
 #[unsafe(no_mangle)]
 fn _turbo_wake(ptr: NonNull<()>) {
diff --git a/embassy-imxrt/Cargo.toml b/embassy-imxrt/Cargo.toml
index 81377579b..5ffa054f1 100644
--- a/embassy-imxrt/Cargo.toml
+++ b/embassy-imxrt/Cargo.toml
@@ -85,8 +85,8 @@ cfg-if = "1.0.0"
 cortex-m-rt = ">=0.7.3,<0.8"
 cortex-m = "0.7.6"
 critical-section = "1.1"
-embedded-io = { version = "0.6.1" }
+embedded-io = { version = "0.7.1" }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 fixed = "1.23.1"
 rand-core-06 = { package = "rand_core", version = "0.6" }
diff --git a/embassy-imxrt/src/dma.rs b/embassy-imxrt/src/dma.rs
index e71a27e0e..eaa09870d 100644
--- a/embassy-imxrt/src/dma.rs
+++ b/embassy-imxrt/src/dma.rs
@@ -16,6 +16,8 @@ use crate::peripherals::DMA0;
 use crate::sealed::Sealed;
 use crate::{BitIter, interrupt, pac, peripherals};
+pub(crate) const MAX_CHUNK_SIZE: usize = 1024;
 #[cfg(feature = "rt")]
 #[interrupt]
 fn DMA0() {
@@ -69,7 +71,7 @@ pub(crate) unsafe fn init() {
 ///
 /// SAFETY: Slice must point to a valid location reachable by DMA.
 pub unsafe fn read<'a, C: Channel, W: Word>(ch: Peri<'a, C>, from: *const W, to: *mut [W]) -> Transfer<'a, C> {
-    let count = ((to.len() / W::size() as usize) - 1) as isize;
+    let count = (to.len().div_ceil(W::size() as usize) - 1) as isize;
    copy_inner(
        ch,
@@ -87,7 +89,7 @@ pub unsafe fn read<'a, C: Channel, W: Word>(ch: Peri<'a, C>, from: *const W, to:
 ///
 /// SAFETY: Slice must point to a valid location reachable by DMA.
 pub unsafe fn write<'a, C: Channel, W: Word>(ch: Peri<'a, C>, from: *const [W], to: *mut W) -> Transfer<'a, C> {
-    let count = ((from.len() / W::size() as usize) - 1) as isize;
+    let count = (from.len().div_ceil(W::size() as usize) - 1) as isize;
    copy_inner(
        ch,
@@ -109,7 +111,7 @@ pub unsafe fn copy<'a, C: Channel, W: Word>(ch: Peri<'a, C>, from: &[W], to: &mu
    let to_len = to.len();
    assert_eq!(from_len, to_len);
-    let count = ((from_len / W::size() as usize) - 1) as isize;
+    let count = (from_len.div_ceil(W::size() as usize) - 1) as isize;
    copy_inner(
        ch,
diff --git a/embassy-imxrt/src/flexcomm/uart.rs b/embassy-imxrt/src/flexcomm/uart.rs
index 2b759ba84..d13b32e93 100644
--- a/embassy-imxrt/src/flexcomm/uart.rs
+++ b/embassy-imxrt/src/flexcomm/uart.rs
@@ -598,7 +598,7 @@ impl<'a> UartTx<'a, Async> {
            regs.fifocfg().modify(|_, w| w.dmatx().disabled());
        });
-        for chunk in buf.chunks(1024) {
+        for chunk in buf.chunks(dma::MAX_CHUNK_SIZE) {
            regs.fifocfg().modify(|_, w| w.dmatx().enabled());
            let ch = self.tx_dma.as_mut().unwrap().reborrow();
@@ -726,7 +726,7 @@ impl<'a> UartRx<'a, Async> {
            regs.fifocfg().modify(|_, w| w.dmarx().disabled());
        });
-        for chunk in buf.chunks_mut(1024) {
+        for chunk in buf.chunks_mut(dma::MAX_CHUNK_SIZE) {
            regs.fifocfg().modify(|_, w| w.dmarx().enabled());
            let ch = self.rx_dma.as_mut().unwrap().reborrow();
diff --git a/embassy-mcxa/Cargo.toml b/embassy-mcxa/Cargo.toml
index 76ce59f5a..0d9663879 100644
--- a/embassy-mcxa/Cargo.toml
+++ b/embassy-mcxa/Cargo.toml
@@ -36,8 +36,8 @@ embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
 embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
 embedded-hal-async = { version = "1.0" }
 embedded-hal-nb = { version = "1.0" }
-embedded-io = "0.6"
+embedded-io = "0.7"
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 heapless = "0.8"
 mcxa-pac = { version = "0.1.0", features = ["rt", "critical-section"] }
 nb = "1.1.0"
diff --git a/embassy-mcxa/src/clkout.rs b/embassy-mcxa/src/clkout.rs
index 5b21f24b0..3495eb886 100644
--- a/embassy-mcxa/src/clkout.rs
+++ b/embassy-mcxa/src/clkout.rs
@@ -20,6 +20,7 @@ pub struct ClockOut<'a> {
 }
 /// Selected clock source to output
+#[derive(Copy, Clone)]
 pub enum ClockOutSel {
    /// 12MHz Internal Oscillator
    Fro12M,
@@ -36,6 +37,7 @@ pub enum ClockOutSel {
 }
 /// Configuration for the ClockOut
+#[derive(Copy, Clone)]
 pub struct Config {
    /// Selected Source Clock
    pub sel: ClockOutSel,
@@ -157,6 +159,12 @@ mod sealed {
                fn mux(&self) {
                    self.set_function(crate::pac::port0::pcr0::Mux::$func);
                    self.set_pull(Pull::Disabled);
+                    // TODO: we may want to expose these as options to allow the slew rate
+                    // and drive strength for clocks if they are particularly high speed.
+                    //
+                    // self.set_drive_strength(crate::pac::port0::pcr0::Dse::Dse1);
+                    // self.set_slew_rate(crate::pac::port0::pcr0::Sre::Sre0);
                }
            }
        };
diff --git a/embassy-mcxa/src/clocks/config.rs b/embassy-mcxa/src/clocks/config.rs
index 0563b8917..4beca5f27 100644
--- a/embassy-mcxa/src/clocks/config.rs
+++ b/embassy-mcxa/src/clocks/config.rs
@@ -119,6 +119,140 @@ pub struct ClocksConfig {
    pub sirc: SircConfig,
    /// FRO16K clock source
    pub fro16k: Option<Fro16KConfig>,
+    /// SOSC, clk_in clock source
+    pub sosc: Option<SoscConfig>,
+    /// SPLL
+    pub spll: Option<SpllConfig>,
+}
+// SOSC
+/// The mode of the external reference clock
+#[derive(Copy, Clone)]
+pub enum SoscMode {
+    /// Passive crystal oscillators
+    CrystalOscillator,
+    /// Active external reference clock
+    ActiveClock,
+}
+/// SOSC/clk_in configuration
+#[derive(Copy, Clone)]
+pub struct SoscConfig {
+    /// Mode of the external reference clock
+    pub mode: SoscMode,
+    /// Specific frequency of the external reference clock
+    pub frequency: u32,
+    /// Power state of the external reference clock
+    pub power: PoweredClock,
+}
+// SPLL
+/// PLL1/SPLL configuration
+pub struct SpllConfig {
+    /// Input clock source for the PLL1/SPLL
+    pub source: SpllSource,
+    /// Mode of operation for the PLL1/SPLL
+    pub mode: SpllMode,
+    /// Power state of the SPLL
+    pub power: PoweredClock,
+    /// Is the "pll1_clk_div" clock enabled?
+    pub pll1_clk_div: Option<Div8>,
+}
+/// Input clock source for the PLL1/SPLL
+pub enum SpllSource {
+    /// External Oscillator (8-50MHz)
+    Sosc,
+    /// Fast Internal Oscillator (45MHz)
+    // NOTE: Figure 69 says "firc_45mhz"/"clk_45m", not "fro_hf_gated",
+    // so this is is always 45MHz.
+    Firc,
+    /// S Internal Oscillator (12M)
+    Sirc,
+    // TODO: the reference manual hints that ROSC is possible,
+    // however the minimum input frequency is 32K, but ROSC is 16K.
+    // Some diagrams show this option, and some diagrams omit it.
+    // SVD shows it as "reserved".
+    //
+    // /// Realtime Internal Oscillator (16K Osc)
+    // Rosc,
+}
+/// Mode of operation for the SPLL/PLL1
+///
+/// NOTE: Currently, only "Mode 1" normal operational modes are implemented,
+/// as described in the Reference Manual.
+#[non_exhaustive]
+pub enum SpllMode {
+    /// Mode 1a does not use the Pre/Post dividers.
+    ///
+    /// `Fout = m_mult x SpllSource`
+    ///
+    /// Both of the following constraints must be met:
+    ///
+    /// * Fout: 275MHz to 550MHz
+    /// * Fout: 4.3MHz to 2x Max CPU Frequency
+    Mode1a {
+        /// PLL Multiplier. Must be in the range 1..=65535.
+        m_mult: u16,
+    },
+    /// Mode 1b does not use the Pre-divider.
+    ///
+    /// * `if !bypass_p2_div: Fout = (M / (2 x P)) x Fin`
+    /// * `if  bypass_p2_div: Fout = (M /    P   ) x Fin`
+    ///
+    /// Both of the following constraints must be met:
+    ///
+    /// * Fcco: 275MHz to 550MHz
+    ///   * `Fcco = m_mult x SpllSource`
+    /// * Fout: 4.3MHz to 2x Max CPU Frequency
+    Mode1b {
+        /// PLL Multiplier. `m_mult` must be in the range 1..=65535.
+        m_mult: u16,
+        /// Post Divider. `p_div` must be in the range 1..=31.
+        p_div: u8,
+        /// Bonus post divider
+        bypass_p2_div: bool,
+    },
+    /// Mode 1c does use the Pre-divider, but does not use the Post-divider
+    ///
+    /// `Fout = (M / N) x Fin`
+    ///
+    /// Both of the following constraints must be met:
+    ///
+    /// * Fout: 275MHz to 550MHz
+    /// * Fout: 4.3MHz to 2x Max CPU Frequency
+    Mode1c {
+        /// PLL Multiplier. `m_mult` must be in the range 1..=65535.
+        m_mult: u16,
+        /// Pre Divider. `n_div` must be in the range 1..=255.
+        n_div: u8,
+    },
+    /// Mode 1b uses both the Pre and Post dividers.
+    ///
+    /// * `if !bypass_p2_div: Fout = (M / (N x 2 x P)) x Fin`
+    /// * `if  bypass_p2_div: Fout = (M / (  N x P  )) x Fin`
+    ///
+    /// Both of the following constraints must be met:
+    ///
+    /// * Fcco: 275MHz to 550MHz
+    ///   * `Fcco = (m_mult x SpllSource) / (n_div x p_div (x 2))`
+    /// * Fout: 4.3MHz to 2x Max CPU Frequency
+    Mode1d {
+        /// PLL Multiplier. `m_mult` must be in the range 1..=65535.
+        m_mult: u16,
+        /// Pre Divider. `n_div` must be in the range 1..=255.
+        n_div: u8,
+        /// Post Divider. `p_div` must be in the range 1..=31.
+        p_div: u8,
+        /// Bonus post divider
+        bypass_p2_div: bool,
+    },
 }
 // FIRC/FRO180M
@@ -199,6 +333,8 @@ impl Default for ClocksConfig {
                vsys_domain_active: true,
                vdd_core_domain_active: true,
            }),
+            sosc: None,
+            spll: None,
        }
    }
 }
diff --git a/embassy-mcxa/src/clocks/mod.rs b/embassy-mcxa/src/clocks/mod.rs
index 037f0a656..04559fd04 100644
--- a/embassy-mcxa/src/clocks/mod.rs
+++ b/embassy-mcxa/src/clocks/mod.rs
@@ -87,6 +87,8 @@ pub fn init(settings: ClocksConfig) -> Result<(), ClockError> {
    operator.configure_firc_clocks()?;
    operator.configure_sirc_clocks()?;
    operator.configure_fro16k_clocks()?;
+    operator.configure_sosc()?;
+    operator.configure_spll()?;
    // For now, just use FIRC as the main/cpu clock, which should already be
    // the case on reset
@@ -136,6 +138,7 @@ pub fn with_clocks<R: 'static, F: FnOnce(&Clocks) -> R>(f: F) -> Option<R> {
 #[non_exhaustive]
 pub struct Clocks {
    /// The `clk_in` is a clock provided by an external oscillator
+    /// AKA SOSC
    pub clk_in: Option<Clock>,
    // FRO180M stuff
@@ -197,6 +200,9 @@ pub struct Clocks {
    /// `pll1_clk` is the output of the main system PLL, `pll1`.
    pub pll1_clk: Option<Clock>,
+    /// `pll1_clk_div` is a configurable frequency clock, sourced from `pll1_clk`
+    pub pll1_clk_div: Option<Clock>,
 }
 /// `ClockError` is the main error returned when configuring or checking clock state
@@ -433,60 +439,49 @@ pub unsafe fn pulse_reset<G: Gate>() {
 /// selected clocks are active at a suitable level at time of construction. These methods
 /// return the frequency of the requested clock, in Hertz, or a [`ClockError`].
 impl Clocks {
-    /// Ensure the `fro_lf_div` clock is active and valid at the given power state.
+    fn ensure_clock_active(
-    pub fn ensure_fro_lf_div_active(&self, at_level: &PoweredClock) -> Result<u32, ClockError> {
+        &self,
-        let Some(clk) = self.fro_lf_div.as_ref() else {
+        clock: &Option<Clock>,
+        name: &'static str,
+        at_level: &PoweredClock,
+    ) -> Result<u32, ClockError> {
+        let Some(clk) = clock.as_ref() else {
            return Err(ClockError::BadConfig {
-                clock: "fro_lf_div",
+                clock: name,
                reason: "required but not active",
            });
        };
        if !clk.power.meets_requirement_of(at_level) {
            return Err(ClockError::BadConfig {
-                clock: "fro_lf_div",
+                clock: name,
                reason: "not low power active",
            });
        }
        Ok(clk.frequency)
    }
+    /// Ensure the `fro_lf_div` clock is active and valid at the given power state.
+    #[inline]
+    pub fn ensure_fro_lf_div_active(&self, at_level: &PoweredClock) -> Result<u32, ClockError> {
+        self.ensure_clock_active(&self.fro_lf_div, "fro_lf_div", at_level)
+    }
    /// Ensure the `fro_hf` clock is active and valid at the given power state.
+    #[inline]
    pub fn ensure_fro_hf_active(&self, at_level: &PoweredClock) -> Result<u32, ClockError> {
-        let Some(clk) = self.fro_hf.as_ref() else {
+        self.ensure_clock_active(&self.fro_hf, "fro_hf", at_level)
-            return Err(ClockError::BadConfig {
-                clock: "fro_hf",
-                reason: "required but not active",
-            });
-        };
-        if !clk.power.meets_requirement_of(at_level) {
-            return Err(ClockError::BadConfig {
-                clock: "fro_hf",
-                reason: "not low power active",
-            });
-        }
-        Ok(clk.frequency)
    }
    /// Ensure the `fro_hf_div` clock is active and valid at the given power state.
+    #[inline]
    pub fn ensure_fro_hf_div_active(&self, at_level: &PoweredClock) -> Result<u32, ClockError> {
-        let Some(clk) = self.fro_hf_div.as_ref() else {
+        self.ensure_clock_active(&self.fro_hf_div, "fro_hf_div", at_level)
-            return Err(ClockError::BadConfig {
-                clock: "fro_hf_div",
-                reason: "required but not active",
-            });
-        };
-        if !clk.power.meets_requirement_of(at_level) {
-            return Err(ClockError::BadConfig {
-                clock: "fro_hf_div",
-                reason: "not low power active",
-            });
-        }
-        Ok(clk.frequency)
    }
    /// Ensure the `clk_in` clock is active and valid at the given power state.
-    pub fn ensure_clk_in_active(&self, _at_level: &PoweredClock) -> Result<u32, ClockError> {
+    #[inline]
-        Err(ClockError::NotImplemented { clock: "clk_in" })
+    pub fn ensure_clk_in_active(&self, at_level: &PoweredClock) -> Result<u32, ClockError> {
+        self.ensure_clock_active(&self.clk_in, "clk_in", at_level)
    }
    /// Ensure the `clk_16k_vsys` clock is active and valid at the given power state.
@@ -516,30 +511,21 @@ impl Clocks {
    }
    /// Ensure the `clk_1m` clock is active and valid at the given power state.
+    #[inline]
    pub fn ensure_clk_1m_active(&self, at_level: &PoweredClock) -> Result<u32, ClockError> {
-        let Some(clk) = self.clk_1m.as_ref() else {
+        self.ensure_clock_active(&self.clk_1m, "clk_1m", at_level)
-            return Err(ClockError::BadConfig {
-                clock: "clk_1m",
-                reason: "required but not active",
-            });
-        };
-        if !clk.power.meets_requirement_of(at_level) {
-            return Err(ClockError::BadConfig {
-                clock: "clk_1m",
-                reason: "not low power active",
-            });
-        }
-        Ok(clk.frequency)
    }
    /// Ensure the `pll1_clk` clock is active and valid at the given power state.
-    pub fn ensure_pll1_clk_active(&self, _at_level: &PoweredClock) -> Result<u32, ClockError> {
+    #[inline]
-        Err(ClockError::NotImplemented { clock: "pll1_clk" })
+    pub fn ensure_pll1_clk_active(&self, at_level: &PoweredClock) -> Result<u32, ClockError> {
+        self.ensure_clock_active(&self.pll1_clk, "pll1_clk", at_level)
    }
    /// Ensure the `pll1_clk_div` clock is active and valid at the given power state.
-    pub fn ensure_pll1_clk_div_active(&self, _at_level: &PoweredClock) -> Result<u32, ClockError> {
+    #[inline]
-        Err(ClockError::NotImplemented { clock: "pll1_clk_div" })
+    pub fn ensure_pll1_clk_div_active(&self, at_level: &PoweredClock) -> Result<u32, ClockError> {
+        self.ensure_clock_active(&self.pll1_clk_div, "pll1_clk_div", at_level)
    }
    /// Ensure the `CPU_CLK` or `SYSTEM_CLK` is active
@@ -811,7 +797,7 @@ impl ClockOperator<'_> {
        Ok(())
    }
-    /// Configure the FRO16K/clk_16k clock family
+    /// Configure the ROSC/FRO16K/clk_16k clock family
    fn configure_fro16k_clocks(&mut self) -> Result<(), ClockError> {
        let Some(fro16k) = self.config.fro16k.as_ref() else {
            return Ok(());
@@ -851,6 +837,485 @@ impl ClockOperator<'_> {
        Ok(())
    }
+    fn ensure_ldo_active(&mut self) {
+        // TODO: Config for the LDO? For now, just enable
+        // using the default settings:
+        // LDOBYPASS: 0/not bypassed
+        // VOUT_SEL: 0b100: 1.1v
+        // LDOEN: 0/Disabled
+        let already_enabled = {
+            let ldocsr = self.scg0.ldocsr().read();
+            ldocsr.ldoen().is_enabled() && ldocsr.vout_ok().is_enabled()
+        };
+        if !already_enabled {
+            self.scg0.ldocsr().modify(|_r, w| w.ldoen().enabled());
+            while self.scg0.ldocsr().read().vout_ok().is_disabled() {}
+        }
+    }
+    /// Configure the SOSC/clk_in oscillator
+    fn configure_sosc(&mut self) -> Result<(), ClockError> {
+        let Some(parts) = self.config.sosc.as_ref() else {
+            return Ok(());
+        };
+        // Enable (and wait for) LDO to be active
+        self.ensure_ldo_active();
+        // TODO: something something pins? This seems to work when the pins are
+        // not enabled, even if GPIO hasn't been initialized at all yet.
+        let eref = match parts.mode {
+            config::SoscMode::CrystalOscillator => pac::scg0::sosccfg::Erefs::Internal,
+            config::SoscMode::ActiveClock => pac::scg0::sosccfg::Erefs::External,
+        };
+        let freq = parts.frequency;
+        // TODO: Fix PAC names here
+        //
+        // #[doc = "0: Frequency range select of 8-16 MHz."]
+        // Freq16to20mhz = 0,
+        // #[doc = "1: Frequency range select of 16-25 MHz."]
+        // LowFreq = 1,
+        // #[doc = "2: Frequency range select of 25-40 MHz."]
+        // MediumFreq = 2,
+        // #[doc = "3: Frequency range select of 40-50 MHz."]
+        // HighFreq = 3,
+        let range = match freq {
+            0..8_000_000 => {
+                return Err(ClockError::BadConfig {
+                    clock: "clk_in",
+                    reason: "freq too low",
+                });
+            }
+            8_000_000..16_000_000 => pac::scg0::sosccfg::Range::Freq16to20mhz,
+            16_000_000..25_000_000 => pac::scg0::sosccfg::Range::LowFreq,
+            25_000_000..40_000_000 => pac::scg0::sosccfg::Range::MediumFreq,
+            40_000_000..50_000_001 => pac::scg0::sosccfg::Range::HighFreq,
+            50_000_001.. => {
+                return Err(ClockError::BadConfig {
+                    clock: "clk_in",
+                    reason: "freq too high",
+                });
+            }
+        };
+        // Set source/erefs and range
+        self.scg0.sosccfg().modify(|_r, w| {
+            w.erefs().variant(eref);
+            w.range().variant(range);
+            w
+        });
+        // Disable lock
+        self.scg0.sosccsr().modify(|_r, w| w.lk().clear_bit());
+        // TODO: We could enable the SOSC clock monitor. There are some things to
+        // figure out first:
+        //
+        // * This requires SIRC to be enabled, not sure which branch. Maybe fro12m_root?
+        // * If SOSC needs to work in deep sleep, AND the monitor is enabled:
+        //   * SIRC also need needs to be low power
+        // * We need to decide if we need an interrupt or a reset if the monitor trips
+        // Apply remaining config
+        self.scg0.sosccsr().modify(|_r, w| {
+            // For now, just disable the monitor. See above.
+            w.sosccm().disabled();
+            // Set deep sleep mode
+            match parts.power {
+                PoweredClock::NormalEnabledDeepSleepDisabled => {
+                    w.soscsten().clear_bit();
+                }
+                PoweredClock::AlwaysEnabled => {
+                    w.soscsten().set_bit();
+                }
+            }
+            // Enable SOSC
+            w.soscen().enabled()
+        });
+        // Wait for SOSC to be valid, check for errors
+        while !self.scg0.sosccsr().read().soscvld().bit_is_set() {}
+        if self.scg0.sosccsr().read().soscerr().is_enabled_and_error() {
+            return Err(ClockError::BadConfig {
+                clock: "clk_in",
+                reason: "soscerr is set",
+            });
+        }
+        // Re-lock the sosc
+        self.scg0.sosccsr().modify(|_r, w| w.lk().set_bit());
+        self.clocks.clk_in = Some(Clock {
+            frequency: freq,
+            power: parts.power,
+        });
+        Ok(())
+    }
+    fn configure_spll(&mut self) -> Result<(), ClockError> {
+        // # Vocab
+        //
+        // | Name   | Meaning                                                     |
+        // | :---   | :---                                                        |
+        // | Fin    | Frequency of clkin                                          |
+        // | clkout | Output clock of the PLL                                     |
+        // | Fout   | Frequency of clkout (depends on mode)                       |
+        // | clkref | PLL Reference clock, the input clock to the PFD             |
+        // | Fref   | Frequency of clkref, Fref = Fin / N                         |
+        // | Fcco   | Frequency of the output clock of the CCO, Fcco = M * Fref   |
+        // | N      | Predivider value                                            |
+        // | M      | Feedback divider value                                      |
+        // | P      | Postdivider value                                           |
+        // | Tpon   | PLL start-up time                                           |
+        // No PLL? Nothing to do!
+        let Some(cfg) = self.config.spll.as_ref() else {
+            return Ok(());
+        };
+        // Ensure the LDO is active
+        self.ensure_ldo_active();
+        // match on the source, ensure it is active already
+        let res = match cfg.source {
+            config::SpllSource::Sosc => self
+                .clocks
+                .clk_in
+                .as_ref()
+                .map(|c| (c, pac::scg0::spllctrl::Source::Sosc))
+                .ok_or("sosc not active"),
+            config::SpllSource::Firc => self
+                .clocks
+                .clk_45m
+                .as_ref()
+                .map(|c| (c, pac::scg0::spllctrl::Source::Firc))
+                .ok_or("firc not active"),
+            config::SpllSource::Sirc => self
+                .clocks
+                .fro_12m
+                .as_ref()
+                .map(|c| (c, pac::scg0::spllctrl::Source::Sirc))
+                .ok_or("sirc not active"),
+        };
+        // This checks if active
+        let (clk, variant) = res.map_err(|s| ClockError::BadConfig {
+            clock: "spll",
+            reason: s,
+        })?;
+        // This checks the correct power reqs
+        if !clk.power.meets_requirement_of(&cfg.power) {
+            return Err(ClockError::BadConfig {
+                clock: "spll",
+                reason: "needs low power source",
+            });
+        }
+        // Bandwidth calc
+        //
+        // > In normal applications, you must calculate the bandwidth manually by using the feedback divider M (ranging from 1 to 216-1),
+        // > Equation 1, and Equation 2. The PLL is automatically stable in such case. In normal applications, SPLLCTRL[BANDDIRECT] must
+        // > be 0; in this case, the bandwidth changes as a function of M.
+        if clk.frequency == 0 {
+            return Err(ClockError::BadConfig {
+                clock: "spll",
+                reason: "internal error",
+            });
+        }
+        // These are calculated differently depending on the mode.
+        let f_in = clk.frequency;
+        let bp_pre: bool;
+        let bp_post: bool;
+        let bp_post2: bool;
+        let m: u16;
+        let p: Option<u8>;
+        let n: Option<u8>;
+        // Calculate both Fout and Fcco so we can ensure they don't overflow
+        // and are in range
+        let fout: Option<u32>;
+        let fcco: Option<u32>;
+        let m_check = |m: u16| {
+            if !(1..=u16::MAX).contains(&m) {
+                Err(ClockError::BadConfig {
+                    clock: "spll",
+                    reason: "m_mult out of range",
+                })
+            } else {
+                Ok(m)
+            }
+        };
+        let p_check = |p: u8| {
+            if !(1..=31).contains(&p) {
+                Err(ClockError::BadConfig {
+                    clock: "spll",
+                    reason: "p_div out of range",
+                })
+            } else {
+                Ok(p)
+            }
+        };
+        let n_check = |n: u8| {
+            if !(1..=u8::MAX).contains(&n) {
+                Err(ClockError::BadConfig {
+                    clock: "spll",
+                    reason: "n_div out of range",
+                })
+            } else {
+                Ok(n)
+            }
+        };
+        match cfg.mode {
+            // Fout = M x Fin
+            config::SpllMode::Mode1a { m_mult } => {
+                bp_pre = true;
+                bp_post = true;
+                bp_post2 = false;
+                m = m_check(m_mult)?;
+                p = None;
+                n = None;
+                fcco = f_in.checked_mul(m_mult as u32);
+                fout = fcco;
+            }
+            // if !bypass_p2_div: Fout = (M / (2 x P)) x Fin
+            // if  bypass_p2_div: Fout = (M /    P   ) x Fin
+            config::SpllMode::Mode1b {
+                m_mult,
+                p_div,
+                bypass_p2_div,
+            } => {
+                bp_pre = true;
+                bp_post = false;
+                bp_post2 = bypass_p2_div;
+                m = m_check(m_mult)?;
+                p = Some(p_check(p_div)?);
+                n = None;
+                let mut div = p_div as u32;
+                if !bypass_p2_div {
+                    div *= 2;
+                }
+                fcco = f_in.checked_mul(m_mult as u32);
+                fout = (f_in / div).checked_mul(m_mult as u32);
+            }
+            // Fout = (M / N) x Fin
+            config::SpllMode::Mode1c { m_mult, n_div } => {
+                bp_pre = false;
+                bp_post = true;
+                bp_post2 = false;
+                m = m_check(m_mult)?;
+                p = None;
+                n = Some(n_check(n_div)?);
+                fcco = (f_in / (n_div as u32)).checked_mul(m_mult as u32);
+                fout = fcco;
+            }
+            // if !bypass_p2_div: Fout = (M / (N x 2 x P)) x Fin
+            // if  bypass_p2_div: Fout = (M / (  N x P  )) x Fin
+            config::SpllMode::Mode1d {
+                m_mult,
+                n_div,
+                p_div,
+                bypass_p2_div,
+            } => {
+                bp_pre = false;
+                bp_post = false;
+                bp_post2 = bypass_p2_div;
+                m = m_check(m_mult)?;
+                p = Some(p_check(p_div)?);
+                n = Some(n_check(n_div)?);
+                // This can't overflow: u8 x u8 (x 2) always fits in u32
+                let mut div = (p_div as u32) * (n_div as u32);
+                if !bypass_p2_div {
+                    div *= 2;
+                }
+                fcco = (f_in / (n_div as u32)).checked_mul(m_mult as u32);
+                fout = (f_in / div).checked_mul(m_mult as u32);
+            }
+        };
+        // Dump all the PLL calcs if needed for debugging
+        #[cfg(feature = "defmt")]
+        {
+            defmt::debug!("f_in: {:?}", f_in);
+            defmt::debug!("bp_pre: {:?}", bp_pre);
+            defmt::debug!("bp_post: {:?}", bp_post);
+            defmt::debug!("bp_post2: {:?}", bp_post2);
+            defmt::debug!("m: {:?}", m);
+            defmt::debug!("p: {:?}", p);
+            defmt::debug!("n: {:?}", n);
+            defmt::debug!("fout: {:?}", fout);
+            defmt::debug!("fcco: {:?}", fcco);
+        }
+        // Ensure the Fcco and Fout calcs didn't overflow
+        let fcco = fcco.ok_or(ClockError::BadConfig {
+            clock: "spll",
+            reason: "fcco invalid1",
+        })?;
+        let fout = fout.ok_or(ClockError::BadConfig {
+            clock: "spll",
+            reason: "fout invalid",
+        })?;
+        // Fcco: 275MHz to 550MHz
+        if !(275_000_000..=550_000_000).contains(&fcco) {
+            return Err(ClockError::BadConfig {
+                clock: "spll",
+                reason: "fcco invalid2",
+            });
+        }
+        // TODO: Different for different CPUs?
+        const CPU_MAX_FREQ: u32 = 180_000_000;
+        // Fout: 4.3MHz to 2x Max CPU Frequency
+        if !(4_300_000..=(2 * CPU_MAX_FREQ)).contains(&fout) {
+            return Err(ClockError::BadConfig {
+                clock: "spll",
+                reason: "fout invalid",
+            });
+        }
+        // A = floor(m / 4) + 1
+        let selp_a = (m / 4) + 1;
+        // SELP = A  if A <  31
+        //      = 31 if A >= 31
+        let selp = selp_a.min(31);
+        // A = 1                    if        M >= 8000
+        //   = floor(8000 / M)      if 8000 > M >= 122
+        //   = 2 x floor(M / 4) / 3 if 122  > M >= 1
+        let seli_a = if m >= 8000 {
+            1
+        } else if m >= 122 {
+            8000 / m
+        } else {
+            (2 * (m / 4)) / 3
+        };
+        // SELI = A  if A <  63
+        //      = 63 if A >= 63
+        let seli = seli_a.min(63);
+        // SELR must be 0.
+        let selr = 0;
+        self.scg0.spllctrl().modify(|_r, w| {
+            w.source().variant(variant);
+            unsafe {
+                w.selp().bits(selp as u8);
+                w.seli().bits(seli as u8);
+                w.selr().bits(selr);
+            }
+            w
+        });
+        if let Some(n) = n {
+            self.scg0.spllndiv().modify(|_r, w| unsafe { w.ndiv().bits(n) });
+        }
+        if let Some(p) = p {
+            self.scg0.spllpdiv().modify(|_r, w| unsafe { w.pdiv().bits(p) });
+        }
+        self.scg0.spllmdiv().modify(|_r, w| unsafe { w.mdiv().bits(m) });
+        self.scg0.spllctrl().modify(|_r, w| {
+            w.bypassprediv().bit(bp_pre);
+            w.bypasspostdiv().bit(bp_post);
+            w.bypasspostdiv2().bit(bp_post2);
+            // TODO: support FRM?
+            w.frm().disabled();
+            w
+        });
+        // Unlock
+        self.scg0.spllcsr().modify(|_r, w| w.lk().write_enabled());
+        // TODO: Support clock monitors?
+        // self.scg0.spllcsr().modify(|_r, w| w.spllcm().?);
+        self.scg0.trim_lock().write(|w| unsafe {
+            w.trim_lock_key().bits(0x5a5a);
+            w.trim_unlock().not_locked()
+        });
+        // SPLLLOCK_CNFG: The lock time programmed in this register must be
+        // equal to meet the PLL 500μs lock time plus the 300 refclk count startup.
+        //
+        // LOCK_TIME = 500μs/T ref + 300, F ref = F in /N (input frequency divided by pre-divider ratio).
+        //
+        // 500us is 1/2000th of a second, therefore Fref / 2000 is the number of cycles in 500us.
+        let f_ref = if let Some(n) = n { f_in / (n as u32) } else { f_in };
+        let lock_time = f_ref.div_ceil(2000) + 300;
+        self.scg0
+            .splllock_cnfg()
+            .write(|w| unsafe { w.lock_time().bits(lock_time) });
+        // TODO: Support Spread spectrum?
+        self.scg0.spllcsr().modify(|_r, w| {
+            w.spllclken().enabled();
+            w.spllpwren().enabled();
+            w.spllsten().bit(matches!(cfg.power, PoweredClock::AlwaysEnabled));
+            w
+        });
+        // Wait for SPLL to set up
+        loop {
+            let csr = self.scg0.spllcsr().read();
+            if csr.spll_lock().is_enabled_and_valid() {
+                if csr.spllerr().is_enabled_and_error() {
+                    return Err(ClockError::BadConfig {
+                        clock: "spll",
+                        reason: "spllerr is set",
+                    });
+                }
+                break;
+            }
+        }
+        // Re-lock SPLL CSR
+        self.scg0.spllcsr().modify(|_r, w| w.lk().write_disabled());
+        // Store clock state
+        self.clocks.pll1_clk = Some(Clock {
+            frequency: fout,
+            power: cfg.power,
+        });
+        // Do we enable the `pll1_clk_div` output?
+        if let Some(d) = cfg.pll1_clk_div.as_ref() {
+            // Halt and reset the div; then set our desired div.
+            self.syscon.pll1clkdiv().write(|w| {
+                w.halt().halt();
+                w.reset().asserted();
+                unsafe { w.div().bits(d.into_bits()) };
+                w
+            });
+            // Then unhalt it, and reset it
+            self.syscon.pll1clkdiv().write(|w| {
+                w.halt().run();
+                w.reset().released();
+                w
+            });
+            // Wait for clock to stabilize
+            while self.syscon.pll1clkdiv().read().unstab().is_ongoing() {}
+            // Store off the clock info
+            self.clocks.pll1_clk_div = Some(Clock {
+                frequency: fout / d.into_divisor(),
+                power: cfg.power,
+            });
+        }
+        Ok(())
+    }
 }
 //
diff --git a/embassy-mcxa/src/dma.rs b/embassy-mcxa/src/dma.rs
index 8d519d99b..b68f55e65 100644
--- a/embassy-mcxa/src/dma.rs
+++ b/embassy-mcxa/src/dma.rs
@@ -1924,7 +1924,7 @@ impl Iterator for TransferErrorRawIter {
        for (mask, var) in TransferErrorRaw::MAP {
            // If the bit is set...
-            if self.0 | mask != 0 {
+            if self.0 & mask != 0 {
                // clear the bit
                self.0 &= !mask;
                // and return the answer
diff --git a/embassy-mcxa/src/gpio.rs b/embassy-mcxa/src/gpio.rs
index 65f8df985..29d66656d 100644
--- a/embassy-mcxa/src/gpio.rs
+++ b/embassy-mcxa/src/gpio.rs
@@ -81,7 +81,7 @@ fn GPIO4() {
    irq_handler(4, crate::pac::Gpio4::ptr());
 }
-pub(crate) unsafe fn init() {
+pub(crate) unsafe fn interrupt_init() {
    use embassy_hal_internal::interrupt::InterruptExt;
    crate::pac::interrupt::GPIO0.enable();
@@ -320,8 +320,12 @@ impl GpioPin for AnyPin {}
 macro_rules! impl_pin {
    ($peri:ident, $port:expr, $pin:expr, $block:ident) => {
+        impl_pin!(crate::peripherals, $peri, $port, $pin, $block);
+    };
+    ($perip:path, $peri:ident, $port:expr, $pin:expr, $block:ident) => {
        paste! {
-            impl SealedPin for crate::peripherals::$peri {
+            impl SealedPin for $perip::$peri {
                fn pin_port(&self) -> usize {
                    $port * 32 + $pin
                }
@@ -372,15 +376,15 @@ macro_rules! impl_pin {
                }
            }
-            impl GpioPin for crate::peripherals::$peri {}
+            impl GpioPin for $perip::$peri {}
-            impl From<crate::peripherals::$peri> for AnyPin {
+            impl From<$perip::$peri> for AnyPin {
-                fn from(value: crate::peripherals::$peri) -> Self {
+                fn from(value: $perip::$peri) -> Self {
                    value.degrade()
                }
            }
-            impl crate::peripherals::$peri {
+            impl $perip::$peri {
                /// Convenience helper to obtain a type-erased handle to this pin.
                pub fn degrade(&self) -> AnyPin {
                    AnyPin::new(self.port(), self.pin(), self.gpio(), self.port_reg(), self.pcr_reg())
@@ -453,8 +457,8 @@ impl_pin!(P1_26, 1, 26, Gpio1);
 impl_pin!(P1_27, 1, 27, Gpio1);
 impl_pin!(P1_28, 1, 28, Gpio1);
 impl_pin!(P1_29, 1, 29, Gpio1);
-impl_pin!(P1_30, 1, 30, Gpio1);
+impl_pin!(crate::internal_peripherals, P1_30, 1, 30, Gpio1);
-impl_pin!(P1_31, 1, 31, Gpio1);
+impl_pin!(crate::internal_peripherals, P1_31, 1, 31, Gpio1);
 impl_pin!(P2_0, 2, 0, Gpio2);
 impl_pin!(P2_1, 2, 1, Gpio2);
diff --git a/embassy-mcxa/src/i2c/mod.rs b/embassy-mcxa/src/i2c/mod.rs
index 9a014224a..55c933f71 100644
--- a/embassy-mcxa/src/i2c/mod.rs
+++ b/embassy-mcxa/src/i2c/mod.rs
@@ -180,8 +180,11 @@ impl_pin!(P1_12, LPI2C1, Mux2, SdaPin);
 impl_pin!(P1_13, LPI2C1, Mux2, SclPin);
 impl_pin!(P1_14, LPI2C1, Mux2, SclPin);
 impl_pin!(P1_15, LPI2C1, Mux2, SdaPin);
-impl_pin!(P1_30, LPI2C0, Mux3, SdaPin);
+// NOTE: P1_30 and P1_31 are typically used for the external oscillator
-impl_pin!(P1_31, LPI2C0, Mux3, SclPin);
+// For now, we just don't give users these pins.
+//
+// impl_pin!(P1_30, LPI2C0, Mux3, SdaPin);
+// impl_pin!(P1_31, LPI2C0, Mux3, SclPin);
 impl_pin!(P3_27, LPI2C3, Mux2, SclPin);
 impl_pin!(P3_28, LPI2C3, Mux2, SdaPin);
 // impl_pin!(P3_29, LPI2C3, Mux2, HreqPin); What is this HREQ pin?
diff --git a/embassy-mcxa/src/lib.rs b/embassy-mcxa/src/lib.rs
index 6383353db..76fd58210 100644
--- a/embassy-mcxa/src/lib.rs
+++ b/embassy-mcxa/src/lib.rs
@@ -175,8 +175,18 @@ embassy_hal_internal::peripherals!(
    P1_27,
    P1_28,
    P1_29,
-    P1_30,
+    // TODO: These pins are optionally used as the clock sources for SOSC.
-    P1_31,
+    // Ideally, we'd want to have a custom version of the `peripheral!` macro
+    // that presented these as `Option<Peri<'_, P1_30>>` instead of `Peri<'_, P1_30>`
+    // when the user DOES enable the external SOSC. For now, I'm guessing MOST designs
+    // will have an external clock sitting on these pins anyway, so we just notch them
+    // out from the `Peripherals` struct given to users.
+    //
+    // If you find this and want your extra two pins to be available: please open an
+    // embassy issue to discuss how we could do this.
+    //
+    // P1_30,
+    // P1_31,
    P2_0,
    P2_1,
@@ -337,6 +347,14 @@ embassy_hal_internal::peripherals!(
    WWDT0,
 );
+// See commented out items above to understand why we create the instances
+// here but don't give them to the user.
+pub(crate) mod internal_peripherals {
+    embassy_hal_internal::peripherals_definition!(P1_30, P1_31,);
+    pub(crate) use peripherals::*;
+}
 // Use cortex-m-rt's #[interrupt] attribute directly; PAC does not re-export it.
 // Re-export interrupt traits and types
@@ -369,7 +387,7 @@ pub fn init(cfg: crate::config::Config) -> Peripherals {
    crate::clocks::init(cfg.clock_cfg).unwrap();
    unsafe {
-        crate::gpio::init();
+        crate::gpio::interrupt_init();
    }
    // Initialize DMA controller (clock, reset, configuration)
diff --git a/embassy-mcxa/src/lpuart/mod.rs b/embassy-mcxa/src/lpuart/mod.rs
index bce3986b5..ae511e8d3 100644
--- a/embassy-mcxa/src/lpuart/mod.rs
+++ b/embassy-mcxa/src/lpuart/mod.rs
@@ -568,6 +568,27 @@ pub enum Error {
    ClockSetup(ClockError),
 }
+impl core::fmt::Display for Error {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        match self {
+            Error::Read => write!(f, "Read error"),
+            Error::Overrun => write!(f, "Buffer overflow"),
+            Error::Noise => write!(f, "Noise error"),
+            Error::Framing => write!(f, "Framing error"),
+            Error::Parity => write!(f, "Parity error"),
+            Error::Fail => write!(f, "Failure"),
+            Error::InvalidArgument => write!(f, "Invalid argument"),
+            Error::UnsupportedBaudrate => write!(f, "Unsupported baud rate"),
+            Error::RxFifoEmpty => write!(f, "RX FIFO empty"),
+            Error::TxFifoFull => write!(f, "TX FIFO full"),
+            Error::TxBusy => write!(f, "TX busy"),
+            Error::ClockSetup(e) => write!(f, "Clock setup error: {:?}", e),
+        }
+    }
+}
+impl core::error::Error for Error {}
 /// A specialized Result type for LPUART operations
 pub type Result<T> = core::result::Result<T, Error>;
diff --git a/embassy-mcxa/src/reset_reason.rs b/embassy-mcxa/src/reset_reason.rs
index f9a9ce096..1787690a7 100644
--- a/embassy-mcxa/src/reset_reason.rs
+++ b/embassy-mcxa/src/reset_reason.rs
@@ -6,45 +6,158 @@
 /// Reads the most recent reset reason from the Core Mode Controller
 /// (CMC).
-pub fn reset_reason() -> ResetReason {
+pub fn reset_reason() -> ResetReasonRaw {
    let regs = unsafe { &*crate::pac::Cmc::steal() };
+    let srs = regs.srs().read().bits();
+    ResetReasonRaw(srs)
+}
+/// Raw reset reason bits. Can be queried or all reasons can be iterated over
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+#[derive(Copy, Clone, Debug)]
+pub struct ResetReasonRaw(u32);
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+#[derive(Copy, Clone, Debug)]
+pub struct ResetReasonRawIter(u32);
+impl ResetReasonRaw {
+    const MAP: &[(u32, ResetReason)] = &[
+        (1 << 0, ResetReason::WakeUp),
+        (1 << 1, ResetReason::Por),
+        (1 << 2, ResetReason::VoltageDetect),
+        (1 << 4, ResetReason::Warm),
+        (1 << 5, ResetReason::Fatal),
+        (1 << 8, ResetReason::Pin),
+        (1 << 9, ResetReason::Dap),
+        (1 << 10, ResetReason::ResetAckTimeout),
+        (1 << 11, ResetReason::LowPowerAckTimeout),
+        (1 << 12, ResetReason::SystemClockGeneration),
+        (1 << 13, ResetReason::Wwdt0),
+        (1 << 14, ResetReason::Software),
+        (1 << 15, ResetReason::Lockup),
+        (1 << 26, ResetReason::Cdog0),
+        (1 << 27, ResetReason::Cdog1),
+        (1 << 28, ResetReason::Jtag),
+    ];
+    /// Convert to an iterator of contained reset reasons
+    pub fn into_iter(self) -> ResetReasonRawIter {
+        ResetReasonRawIter(self.0)
+    }
+    /// Wake up
+    #[inline]
+    pub fn is_wakeup(&self) -> bool {
+        (self.0 & (1 << 0)) != 0
+    }
+    /// Power-on Reset
+    #[inline]
+    pub fn is_por(&self) -> bool {
+        (self.0 & (1 << 1)) != 0
+    }
+    /// Voltage detect
+    #[inline]
+    pub fn is_voltage_detect(&self) -> bool {
+        (self.0 & (1 << 2)) != 0
+    }
+    /// Warm
+    #[inline]
+    pub fn is_warm(&self) -> bool {
+        (self.0 & (1 << 4)) != 0
+    }
+    /// Fatal
+    #[inline]
+    pub fn is_fatal(&self) -> bool {
+        (self.0 & (1 << 5)) != 0
+    }
+    /// Pin
+    #[inline]
+    pub fn is_pin(&self) -> bool {
+        (self.0 & (1 << 8)) != 0
+    }
+    /// DAP
+    #[inline]
+    pub fn is_dap(&self) -> bool {
+        (self.0 & (1 << 9)) != 0
+    }
+    /// Reset ack timeout
+    #[inline]
+    pub fn is_reset_ack_timeout(&self) -> bool {
+        (self.0 & (1 << 10)) != 0
+    }
+    /// Low power ack timeout
+    #[inline]
+    pub fn is_low_power_ack_timeout(&self) -> bool {
+        (self.0 & (1 << 11)) != 0
+    }
+    /// System clock generation
+    #[inline]
+    pub fn is_system_clock_generation(&self) -> bool {
+        (self.0 & (1 << 12)) != 0
+    }
+    /// Watchdog 0
+    #[inline]
+    pub fn is_watchdog0(&self) -> bool {
+        (self.0 & (1 << 13)) != 0
+    }
+    /// Software
+    pub fn is_software(&self) -> bool {
+        (self.0 & (1 << 14)) != 0
+    }
+    /// Lockup
+    pub fn is_lockup(&self) -> bool {
+        (self.0 & (1 << 15)) != 0
+    }
+    /// Code watchdog 0
+    pub fn is_code_watchdog0(&self) -> bool {
+        (self.0 & (1 << 26)) != 0
+    }
+    /// Code watchdog 1
+    pub fn is_code_watchdog1(&self) -> bool {
+        (self.0 & (1 << 27)) != 0
+    }
+    /// JTAG
+    pub fn is_jtag(&self) -> bool {
+        (self.0 & (1 << 28)) != 0
+    }
+}
-    let srs = regs.srs().read();
+impl Iterator for ResetReasonRawIter {
+    type Item = ResetReason;
-    if srs.wakeup().is_enabled() {
-        ResetReason::WakeUp
+    fn next(&mut self) -> Option<Self::Item> {
-    } else if srs.por().bit_is_set() {
+        if self.0 == 0 {
-        ResetReason::Por
+            return None;
-    } else if srs.vd().bit_is_set() {
+        }
-        ResetReason::VoltageDetect
-    } else if srs.warm().bit_is_set() {
+        for (mask, var) in ResetReasonRaw::MAP {
-        ResetReason::Warm
+            // If the bit is set...
-    } else if srs.fatal().bit_is_set() {
+            if self.0 & mask != 0 {
-        ResetReason::Fatal
+                // clear the bit
-    } else if srs.pin().bit_is_set() {
+                self.0 &= !mask;
-        ResetReason::Pin
+                // and return the answer
-    } else if srs.dap().bit_is_set() {
+                return Some(*var);
-        ResetReason::Dap
+            }
-    } else if srs.rstack().bit_is_set() {
+        }
-        ResetReason::ResetAckTimeout
-    } else if srs.lpack().bit_is_set() {
+        // Shouldn't happen, but oh well.
-        ResetReason::LowPowerAckTimeout
+        None
-    } else if srs.scg().bit_is_set() {
-        ResetReason::SystemClockGeneration
-    } else if srs.wwdt0().bit_is_set() {
-        ResetReason::Wwdt0
-    } else if srs.sw().bit_is_set() {
-        ResetReason::Software
-    } else if srs.lockup().bit_is_set() {
-        ResetReason::Lockup
-    } else if srs.cdog0().bit_is_set() {
-        ResetReason::Cdog0
-    } else if srs.cdog1().bit_is_set() {
-        ResetReason::Cdog1
-    } else if srs.jtag().bit_is_set() {
-        ResetReason::Jtag
-    } else {
-        ResetReason::Tamper
    }
 }
diff --git a/embassy-mspm0/CHANGELOG.md b/embassy-mspm0/CHANGELOG.md
index 6972a8472..19275f35a 100644
--- a/embassy-mspm0/CHANGELOG.md
+++ b/embassy-mspm0/CHANGELOG.md
@@ -19,4 +19,5 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - feat: Add i2c target implementation (#4605)
 - fix: group irq handlers must check for NO_INTR (#4785)
 - feat: Add read_reset_cause function
- feat: Add module Mathacl & example for mspm0g3507 (#4897)
-\ No newline at end of file
+- feat: Add module Mathacl & example for mspm0g3507 (#4897)
+- feat: Add MSPM0G5187 supportt
diff --git a/embassy-mspm0/Cargo.toml b/embassy-mspm0/Cargo.toml
index 254e0209b..c7f5de6a1 100644
--- a/embassy-mspm0/Cargo.toml
+++ b/embassy-mspm0/Cargo.toml
@@ -61,8 +61,8 @@ embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["un
 embedded-hal = { version = "1.0" }
 embedded-hal-nb = { version = "1.0" }
 embedded-hal-async = { version = "1.0" }
-embedded-io = "0.6.1"
+embedded-io = { version = "0.7.1" }
-embedded-io-async = "0.6.1"
+embedded-io-async = { version = "0.7.0" }
 defmt = { version = "1.0.1", optional = true }
 fixed = "1.29"
@@ -73,7 +73,7 @@ critical-section = "1.2.0"
 micromath = "2.0.0"
 # mspm0-metapac = { version = "" }
-mspm0-metapac = { git = "https://github.com/mspm0-rs/mspm0-data-generated/", tag = "mspm0-data-f21b04e9de074af4965bf67ec3646cb9fe1b9852" }
+mspm0-metapac = { git = "https://github.com/mspm0-rs/mspm0-data-generated/", tag = "mspm0-data-e91edd86813aa94cbb6737d34e4f1d22b8487cb6" }
 [build-dependencies]
 proc-macro2 = "1.0.94"
@@ -81,7 +81,7 @@ quote = "1.0.40"
 cfg_aliases = "0.2.1"
 # mspm0-metapac = { version = "", default-features = false, features = ["metadata"] }
-mspm0-metapac = { git = "https://github.com/mspm0-rs/mspm0-data-generated/", tag = "mspm0-data-f21b04e9de074af4965bf67ec3646cb9fe1b9852", default-features = false, features = ["metadata"] }
+mspm0-metapac = { git = "https://github.com/mspm0-rs/mspm0-data-generated/", tag = "mspm0-data-e91edd86813aa94cbb6737d34e4f1d22b8487cb6", default-features = false, features = ["metadata"] }
 [features]
 default = ["rt"]
@@ -153,15 +153,14 @@ time-driver-tima1 = ["_time-driver"]
 #!
 #! **Important:** Do not forget to adapt the target chip in your toolchain,
 #! e.g. in `.cargo/config.toml`.
 mspm0c1103dgs20 = ["mspm0-metapac/mspm0c1103dgs20"]
-mspm0c1103dsg = ["mspm0-metapac/mspm0c1103dsg"]
-mspm0c1103dyy = ["mspm0-metapac/mspm0c1103dyy"]
 mspm0c1103ruk = ["mspm0-metapac/mspm0c1103ruk"]
+mspm0c1103dyy = ["mspm0-metapac/mspm0c1103dyy"]
+mspm0c1103dsg = ["mspm0-metapac/mspm0c1103dsg"]
 mspm0c1104dgs20 = ["mspm0-metapac/mspm0c1104dgs20"]
-mspm0c1104dsg = ["mspm0-metapac/mspm0c1104dsg"]
-mspm0c1104dyy = ["mspm0-metapac/mspm0c1104dyy"]
 mspm0c1104ruk = ["mspm0-metapac/mspm0c1104ruk"]
+mspm0c1104dyy = ["mspm0-metapac/mspm0c1104dyy"]
+mspm0c1104dsg = ["mspm0-metapac/mspm0c1104dsg"]
 mspm0c1104ycj = ["mspm0-metapac/mspm0c1104ycj"]
 mspm0c1105pt = ["mspm0-metapac/mspm0c1105pt"]
 mspm0c1105rgz = ["mspm0-metapac/mspm0c1105rgz"]
@@ -181,43 +180,54 @@ mspm0c1106rge = ["mspm0-metapac/mspm0c1106rge"]
 mspm0c1106dgs20 = ["mspm0-metapac/mspm0c1106dgs20"]
 mspm0c1106ruk = ["mspm0-metapac/mspm0c1106ruk"]
 mspm0c1106zcm = ["mspm0-metapac/mspm0c1106zcm"]
-mspm0g1105dgs28 = ["mspm0-metapac/mspm0g1105dgs28"]
-mspm0g1105pm = ["mspm0-metapac/mspm0g1105pm"]
-mspm0g1105pt = ["mspm0-metapac/mspm0g1105pt"]
 mspm0g1105rge = ["mspm0-metapac/mspm0g1105rge"]
-mspm0g1105rgz = ["mspm0-metapac/mspm0g1105rgz"]
+mspm0g1105dgs28 = ["mspm0-metapac/mspm0g1105dgs28"]
 mspm0g1105rhb = ["mspm0-metapac/mspm0g1105rhb"]
-mspm0g1106dgs28 = ["mspm0-metapac/mspm0g1106dgs28"]
+mspm0g1105rgz = ["mspm0-metapac/mspm0g1105rgz"]
-mspm0g1106pm = ["mspm0-metapac/mspm0g1106pm"]
+mspm0g1105pt = ["mspm0-metapac/mspm0g1105pt"]
-mspm0g1106pt = ["mspm0-metapac/mspm0g1106pt"]
+mspm0g1105pm = ["mspm0-metapac/mspm0g1105pm"]
 mspm0g1106rge = ["mspm0-metapac/mspm0g1106rge"]
-mspm0g1106rgz = ["mspm0-metapac/mspm0g1106rgz"]
+mspm0g1106dgs28 = ["mspm0-metapac/mspm0g1106dgs28"]
 mspm0g1106rhb = ["mspm0-metapac/mspm0g1106rhb"]
-mspm0g1107dgs28 = ["mspm0-metapac/mspm0g1107dgs28"]
+mspm0g1106rgz = ["mspm0-metapac/mspm0g1106rgz"]
-mspm0g1107pm = ["mspm0-metapac/mspm0g1107pm"]
+mspm0g1106pt = ["mspm0-metapac/mspm0g1106pt"]
-mspm0g1107pt = ["mspm0-metapac/mspm0g1107pt"]
+mspm0g1106pm = ["mspm0-metapac/mspm0g1106pm"]
 mspm0g1107rge = ["mspm0-metapac/mspm0g1107rge"]
-mspm0g1107rgz = ["mspm0-metapac/mspm0g1107rgz"]
+mspm0g1107dgs28 = ["mspm0-metapac/mspm0g1107dgs28"]
 mspm0g1107rhb = ["mspm0-metapac/mspm0g1107rhb"]
+mspm0g1107rgz = ["mspm0-metapac/mspm0g1107rgz"]
+mspm0g1107pt = ["mspm0-metapac/mspm0g1107pt"]
+mspm0g1107pm = ["mspm0-metapac/mspm0g1107pm"]
 mspm0g1107ycj = ["mspm0-metapac/mspm0g1107ycj"]
-mspm0g1505pm = ["mspm0-metapac/mspm0g1505pm"]
-mspm0g1505pt = ["mspm0-metapac/mspm0g1505pt"]
 mspm0g1505rge = ["mspm0-metapac/mspm0g1505rge"]
-mspm0g1505rgz = ["mspm0-metapac/mspm0g1505rgz"]
 mspm0g1505rhb = ["mspm0-metapac/mspm0g1505rhb"]
-mspm0g1506pm = ["mspm0-metapac/mspm0g1506pm"]
+mspm0g1505rgz = ["mspm0-metapac/mspm0g1505rgz"]
-mspm0g1506pt = ["mspm0-metapac/mspm0g1506pt"]
+mspm0g1505pt = ["mspm0-metapac/mspm0g1505pt"]
+mspm0g1505pm = ["mspm0-metapac/mspm0g1505pm"]
 mspm0g1506rge = ["mspm0-metapac/mspm0g1506rge"]
-mspm0g1506rgz = ["mspm0-metapac/mspm0g1506rgz"]
 mspm0g1506rhb = ["mspm0-metapac/mspm0g1506rhb"]
-mspm0g1507pm = ["mspm0-metapac/mspm0g1507pm"]
+mspm0g1506rgz = ["mspm0-metapac/mspm0g1506rgz"]
-mspm0g1507pt = ["mspm0-metapac/mspm0g1507pt"]
+mspm0g1506pt = ["mspm0-metapac/mspm0g1506pt"]
+mspm0g1506pm = ["mspm0-metapac/mspm0g1506pm"]
 mspm0g1507rge = ["mspm0-metapac/mspm0g1507rge"]
-mspm0g1507rgz = ["mspm0-metapac/mspm0g1507rgz"]
 mspm0g1507rhb = ["mspm0-metapac/mspm0g1507rhb"]
+mspm0g1507rgz = ["mspm0-metapac/mspm0g1507rgz"]
+mspm0g1507pt = ["mspm0-metapac/mspm0g1507pt"]
+mspm0g1507pm = ["mspm0-metapac/mspm0g1507pm"]
 mspm0g1507ycj = ["mspm0-metapac/mspm0g1507ycj"]
-mspm0g1519rgz = ["mspm0-metapac/mspm0g1519rgz"]
+mspm0g1518rhb = ["mspm0-metapac/mspm0g1518rhb"]
+mspm0g1518rgz = ["mspm0-metapac/mspm0g1518rgz"]
+mspm0g1518pt = ["mspm0-metapac/mspm0g1518pt"]
+mspm0g1518pm = ["mspm0-metapac/mspm0g1518pm"]
+mspm0g1518pz = ["mspm0-metapac/mspm0g1518pz"]
+mspm0g1518pn = ["mspm0-metapac/mspm0g1518pn"]
+mspm0g1518zaw = ["mspm0-metapac/mspm0g1518zaw"]
 mspm0g1519rhb = ["mspm0-metapac/mspm0g1519rhb"]
+mspm0g1519rgz = ["mspm0-metapac/mspm0g1519rgz"]
+mspm0g1519pt = ["mspm0-metapac/mspm0g1519pt"]
+mspm0g1519pm = ["mspm0-metapac/mspm0g1519pm"]
+mspm0g1519pz = ["mspm0-metapac/mspm0g1519pz"]
+mspm0g1519pn = ["mspm0-metapac/mspm0g1519pn"]
 mspm0g3105dgs20 = ["mspm0-metapac/mspm0g3105dgs20"]
 mspm0g3105dgs28 = ["mspm0-metapac/mspm0g3105dgs28"]
 mspm0g3105rhb = ["mspm0-metapac/mspm0g3105rhb"]
@@ -228,77 +238,92 @@ mspm0g3107dgs20 = ["mspm0-metapac/mspm0g3107dgs20"]
 mspm0g3107dgs28 = ["mspm0-metapac/mspm0g3107dgs28"]
 mspm0g3107rhb = ["mspm0-metapac/mspm0g3107rhb"]
 mspm0g3505dgs28 = ["mspm0-metapac/mspm0g3505dgs28"]
-mspm0g3505pm = ["mspm0-metapac/mspm0g3505pm"]
-mspm0g3505pt = ["mspm0-metapac/mspm0g3505pt"]
-mspm0g3505rgz = ["mspm0-metapac/mspm0g3505rgz"]
 mspm0g3505rhb = ["mspm0-metapac/mspm0g3505rhb"]
+mspm0g3505rgz = ["mspm0-metapac/mspm0g3505rgz"]
+mspm0g3505pt = ["mspm0-metapac/mspm0g3505pt"]
+mspm0g3505pm = ["mspm0-metapac/mspm0g3505pm"]
 mspm0g3506dgs28 = ["mspm0-metapac/mspm0g3506dgs28"]
-mspm0g3506pm = ["mspm0-metapac/mspm0g3506pm"]
-mspm0g3506pt = ["mspm0-metapac/mspm0g3506pt"]
-mspm0g3506rgz = ["mspm0-metapac/mspm0g3506rgz"]
 mspm0g3506rhb = ["mspm0-metapac/mspm0g3506rhb"]
+mspm0g3506rgz = ["mspm0-metapac/mspm0g3506rgz"]
+mspm0g3506pt = ["mspm0-metapac/mspm0g3506pt"]
+mspm0g3506pm = ["mspm0-metapac/mspm0g3506pm"]
 mspm0g3507dgs28 = ["mspm0-metapac/mspm0g3507dgs28"]
-mspm0g3507pm = ["mspm0-metapac/mspm0g3507pm"]
-mspm0g3507pt = ["mspm0-metapac/mspm0g3507pt"]
-mspm0g3507rgz = ["mspm0-metapac/mspm0g3507rgz"]
 mspm0g3507rhb = ["mspm0-metapac/mspm0g3507rhb"]
+mspm0g3507rgz = ["mspm0-metapac/mspm0g3507rgz"]
+mspm0g3507pt = ["mspm0-metapac/mspm0g3507pt"]
+mspm0g3507pm = ["mspm0-metapac/mspm0g3507pm"]
+mspm0g3518rhb = ["mspm0-metapac/mspm0g3518rhb"]
+mspm0g3518rgz = ["mspm0-metapac/mspm0g3518rgz"]
+mspm0g3518pt = ["mspm0-metapac/mspm0g3518pt"]
+mspm0g3518pm = ["mspm0-metapac/mspm0g3518pm"]
+mspm0g3518pz = ["mspm0-metapac/mspm0g3518pz"]
+mspm0g3518pn = ["mspm0-metapac/mspm0g3518pn"]
+mspm0g3519rhb = ["mspm0-metapac/mspm0g3519rhb"]
+mspm0g3519rgz = ["mspm0-metapac/mspm0g3519rgz"]
+mspm0g3519pt = ["mspm0-metapac/mspm0g3519pt"]
 mspm0g3519pm = ["mspm0-metapac/mspm0g3519pm"]
-mspm0g3519pn = ["mspm0-metapac/mspm0g3519pn"]
 mspm0g3519pz = ["mspm0-metapac/mspm0g3519pz"]
-mspm0g3519rgz = ["mspm0-metapac/mspm0g3519rgz"]
+mspm0g3519pn = ["mspm0-metapac/mspm0g3519pn"]
-mspm0g3519rhb = ["mspm0-metapac/mspm0g3519rhb"]
+mspm0g3519zaw = ["mspm0-metapac/mspm0g3519zaw"]
+mspm0g5187rhb = ["mspm0-metapac/mspm0g5187rhb"]
+mspm0g5187rgz = ["mspm0-metapac/mspm0g5187rgz"]
+mspm0g5187pt = ["mspm0-metapac/mspm0g5187pt"]
+mspm0g5187pm = ["mspm0-metapac/mspm0g5187pm"]
+mspm0g5187ruy = ["mspm0-metapac/mspm0g5187ruy"]
+mspm0g5187ycj = ["mspm0-metapac/mspm0g5187ycj"]
+mspm0g5187rge = ["mspm0-metapac/mspm0g5187rge"]
 mspm0h3216pt = ["mspm0-metapac/mspm0h3216pt"]
 mspm0l1105dgs20 = ["mspm0-metapac/mspm0l1105dgs20"]
 mspm0l1105dgs28 = ["mspm0-metapac/mspm0l1105dgs28"]
-mspm0l1105dyy = ["mspm0-metapac/mspm0l1105dyy"]
 mspm0l1105rge = ["mspm0-metapac/mspm0l1105rge"]
 mspm0l1105rtr = ["mspm0-metapac/mspm0l1105rtr"]
+mspm0l1105dyy = ["mspm0-metapac/mspm0l1105dyy"]
+mspm0l1106rhb = ["mspm0-metapac/mspm0l1106rhb"]
 mspm0l1106dgs20 = ["mspm0-metapac/mspm0l1106dgs20"]
 mspm0l1106dgs28 = ["mspm0-metapac/mspm0l1106dgs28"]
-mspm0l1106dyy = ["mspm0-metapac/mspm0l1106dyy"]
 mspm0l1106rge = ["mspm0-metapac/mspm0l1106rge"]
-mspm0l1106rhb = ["mspm0-metapac/mspm0l1106rhb"]
 mspm0l1106rtr = ["mspm0-metapac/mspm0l1106rtr"]
-mspm0l1227pm = ["mspm0-metapac/mspm0l1227pm"]
+mspm0l1106dyy = ["mspm0-metapac/mspm0l1106dyy"]
+mspm0l1227rhb = ["mspm0-metapac/mspm0l1227rhb"]
 mspm0l1227pn = ["mspm0-metapac/mspm0l1227pn"]
+mspm0l1227rgz = ["mspm0-metapac/mspm0l1227rgz"]
 mspm0l1227pt = ["mspm0-metapac/mspm0l1227pt"]
+mspm0l1227pm = ["mspm0-metapac/mspm0l1227pm"]
 mspm0l1227rge = ["mspm0-metapac/mspm0l1227rge"]
-mspm0l1227rgz = ["mspm0-metapac/mspm0l1227rgz"]
+mspm0l1228rhb = ["mspm0-metapac/mspm0l1228rhb"]
-mspm0l1227rhb = ["mspm0-metapac/mspm0l1227rhb"]
-mspm0l1228pm = ["mspm0-metapac/mspm0l1228pm"]
 mspm0l1228pn = ["mspm0-metapac/mspm0l1228pn"]
+mspm0l1228rgz = ["mspm0-metapac/mspm0l1228rgz"]
 mspm0l1228pt = ["mspm0-metapac/mspm0l1228pt"]
+mspm0l1228pm = ["mspm0-metapac/mspm0l1228pm"]
 mspm0l1228rge = ["mspm0-metapac/mspm0l1228rge"]
-mspm0l1228rgz = ["mspm0-metapac/mspm0l1228rgz"]
-mspm0l1228rhb = ["mspm0-metapac/mspm0l1228rhb"]
 mspm0l1303rge = ["mspm0-metapac/mspm0l1303rge"]
+mspm0l1304rhb = ["mspm0-metapac/mspm0l1304rhb"]
 mspm0l1304dgs20 = ["mspm0-metapac/mspm0l1304dgs20"]
 mspm0l1304dgs28 = ["mspm0-metapac/mspm0l1304dgs28"]
-mspm0l1304dyy = ["mspm0-metapac/mspm0l1304dyy"]
 mspm0l1304rge = ["mspm0-metapac/mspm0l1304rge"]
-mspm0l1304rhb = ["mspm0-metapac/mspm0l1304rhb"]
 mspm0l1304rtr = ["mspm0-metapac/mspm0l1304rtr"]
+mspm0l1304dyy = ["mspm0-metapac/mspm0l1304dyy"]
 mspm0l1305dgs20 = ["mspm0-metapac/mspm0l1305dgs20"]
 mspm0l1305dgs28 = ["mspm0-metapac/mspm0l1305dgs28"]
-mspm0l1305dyy = ["mspm0-metapac/mspm0l1305dyy"]
 mspm0l1305rge = ["mspm0-metapac/mspm0l1305rge"]
 mspm0l1305rtr = ["mspm0-metapac/mspm0l1305rtr"]
+mspm0l1305dyy = ["mspm0-metapac/mspm0l1305dyy"]
+mspm0l1306rhb = ["mspm0-metapac/mspm0l1306rhb"]
 mspm0l1306dgs20 = ["mspm0-metapac/mspm0l1306dgs20"]
 mspm0l1306dgs28 = ["mspm0-metapac/mspm0l1306dgs28"]
-mspm0l1306dyy = ["mspm0-metapac/mspm0l1306dyy"]
 mspm0l1306rge = ["mspm0-metapac/mspm0l1306rge"]
-mspm0l1306rhb = ["mspm0-metapac/mspm0l1306rhb"]
+mspm0l1306dyy = ["mspm0-metapac/mspm0l1306dyy"]
 mspm0l1343dgs20 = ["mspm0-metapac/mspm0l1343dgs20"]
 mspm0l1344dgs20 = ["mspm0-metapac/mspm0l1344dgs20"]
 mspm0l1345dgs28 = ["mspm0-metapac/mspm0l1345dgs28"]
 mspm0l1346dgs28 = ["mspm0-metapac/mspm0l1346dgs28"]
+mspm0l2227rgz = ["mspm0-metapac/mspm0l2227rgz"]
+mspm0l2227pt = ["mspm0-metapac/mspm0l2227pt"]
 mspm0l2227pm = ["mspm0-metapac/mspm0l2227pm"]
 mspm0l2227pn = ["mspm0-metapac/mspm0l2227pn"]
-mspm0l2227pt = ["mspm0-metapac/mspm0l2227pt"]
+mspm0l2228rgz = ["mspm0-metapac/mspm0l2228rgz"]
-mspm0l2227rgz = ["mspm0-metapac/mspm0l2227rgz"]
+mspm0l2228pt = ["mspm0-metapac/mspm0l2228pt"]
 mspm0l2228pm = ["mspm0-metapac/mspm0l2228pm"]
 mspm0l2228pn = ["mspm0-metapac/mspm0l2228pn"]
-mspm0l2228pt = ["mspm0-metapac/mspm0l2228pt"]
-mspm0l2228rgz = ["mspm0-metapac/mspm0l2228rgz"]
 msps003f3pw20 = ["mspm0-metapac/msps003f3pw20"]
-msps003f4pw20 = ["mspm0-metapac/msps003f4pw20"]
+msps003f4pw20 = ["mspm0-metapac/msps003f4pw20"]
+\ No newline at end of file
diff --git a/embassy-mspm0/build.rs b/embassy-mspm0/build.rs
index 0fe056c4e..ac40adbdf 100644
--- a/embassy-mspm0/build.rs
+++ b/embassy-mspm0/build.rs
@@ -31,7 +31,7 @@ fn generate_code(cfgs: &mut CfgSet) {
        PathBuf::from(env::var_os("OUT_DIR").unwrap()).display(),
    );
-    cfgs.declare_all(&["gpio_pb", "gpio_pc", "int_group1"]);
+    cfgs.declare_all(&["gpio_pb", "gpio_pc", "int_group1", "unicomm"]);
    let chip_name = match env::vars()
        .map(|(a, _)| a)
@@ -116,6 +116,10 @@ fn get_chip_cfgs(chip_name: &str) -> Vec<String> {
        cfgs.push("mspm0g351x".to_string());
    }
+    if chip_name.starts_with("mspm0g518") {
+        cfgs.push("mspm0g518x".to_string());
+    }
    if chip_name.starts_with("mspm0h321") {
        cfgs.push("mspm0h321x".to_string());
    }
@@ -300,6 +304,15 @@ fn get_singletons(cfgs: &mut common::CfgSet) -> Vec<Singleton> {
            // by the HAL.
            "iomux" | "cpuss" => true,
+            // Unicomm instances get their own singletons, but we need to enable a cfg for unicomm drivers.
+            "unicomm" => {
+                cfgs.enable("unicomm");
+                false
+            }
+            // TODO: Remove after TIMB is fixed
+            "tim" if peripheral.name.starts_with("TIMB") => true,
            _ => false,
        };
@@ -423,6 +436,8 @@ fn time_driver(singletons: &mut Vec<Singleton>, cfgs: &mut CfgSet) {
    // Verify the selected timer is available
    let selected_timer = match time_driver.as_ref().map(|x| x.as_ref()) {
        None => "",
+        // TODO: Fix TIMB0
+        // Some("timb0") => "TIMB0",
        Some("timg0") => "TIMG0",
        Some("timg1") => "TIMG1",
        Some("timg2") => "TIMG2",
@@ -440,16 +455,17 @@ fn time_driver(singletons: &mut Vec<Singleton>, cfgs: &mut CfgSet) {
        Some("tima1") => "TIMA1",
        Some("any") => {
            // Order of timer candidates:
-            // 1. 16-bit, 2 channel
+            // 1. Basic timers
-            // 2. 16-bit, 2 channel with shadow registers
+            // 2. 16-bit, 2 channel
-            // 3. 16-bit, 4 channel
+            // 3. 16-bit, 2 channel with shadow registers
-            // 4. 16-bit with QEI
+            // 4. 16-bit, 4 channel
-            // 5. Advanced timers
+            // 5. 16-bit with QEI
+            // 6. Advanced timers
            //
-            // TODO: Select RTC first if available
            // TODO: 32-bit timers are not considered yet
            [
-                // 16-bit, 2 channel
+                // basic timers. No PWM pins
+                // "TIMB0", // 16-bit, 2 channel
                "TIMG0", "TIMG1", "TIMG2", "TIMG3", // 16-bit, 2 channel with shadow registers
                "TIMG4", "TIMG5", "TIMG6", "TIMG7",  // 16-bit, 4 channel
                "TIMG14", // 16-bit with QEI
@@ -519,6 +535,8 @@ fn generate_timers() -> TokenStream {
        .peripherals
        .iter()
        .filter(|p| p.name.starts_with("TIM"))
+        // TODO: Fix TIMB when used at time driver.
+        .filter(|p| !p.name.starts_with("TIMB"))
        .map(|peripheral| {
            let name = Ident::new(&peripheral.name, Span::call_site());
            let timers = &*TIMERS;
@@ -730,6 +748,24 @@ struct TimerDesc {
 const TIMERS: LazyLock<HashMap<String, TimerDesc>> = LazyLock::new(|| {
    let mut map = HashMap::new();
    map.insert(
+        "TIMB0".into(),
+        TimerDesc {
+            bits: 16,
+            prescaler: true,
+            repeat_counter: false,
+            ccp_channels_internal: 2,
+            ccp_channels_external: 2,
+            external_pwm_channels: 0,
+            phase_load: false,
+            shadow_load: false,
+            shadow_ccs: false,
+            deadband: false,
+            fault_handler: false,
+            qei_hall: false,
+        },
+    );
+    map.insert(
        "TIMG0".into(),
        TimerDesc {
            bits: 16,
diff --git a/embassy-mspm0/src/gpio.rs b/embassy-mspm0/src/gpio.rs
index d8eb42dc2..709102c59 100644
--- a/embassy-mspm0/src/gpio.rs
+++ b/embassy-mspm0/src/gpio.rs
@@ -841,6 +841,7 @@ impl<'d> embedded_hal_async::digital::Wait for OutputOpenDrain<'d> {
    }
 }
+#[cfg_attr(mspm0g518x, allow(dead_code))]
 #[derive(Copy, Clone)]
 pub struct PfType {
    pull: Pull,
@@ -948,6 +949,7 @@ pub(crate) trait SealedPin {
        });
    }
+    #[cfg_attr(mspm0g518x, allow(dead_code))]
    fn update_pf(&self, ty: PfType) {
        let pincm = pac::IOMUX.pincm(self._pin_cm() as usize);
        let pf = pincm.read().pf();
@@ -955,6 +957,7 @@ pub(crate) trait SealedPin {
        set_pf(self._pin_cm() as usize, pf, ty);
    }
+    #[cfg_attr(mspm0g518x, allow(dead_code))]
    fn set_as_pf(&self, pf: u8, ty: PfType) {
        set_pf(self._pin_cm() as usize, pf, ty)
    }
@@ -967,6 +970,7 @@ pub(crate) trait SealedPin {
    ///
    /// Note that this also disables the internal weak pull-up and pull-down resistors.
    #[inline]
+    #[cfg_attr(mspm0g518x, allow(dead_code))]
    fn set_as_disconnected(&self) {
        self.set_as_analog();
    }
diff --git a/embassy-mspm0/src/i2c_target.rs b/embassy-mspm0/src/i2c_target.rs
index 86be91415..e371fa903 100644
--- a/embassy-mspm0/src/i2c_target.rs
+++ b/embassy-mspm0/src/i2c_target.rs
@@ -12,12 +12,13 @@ use embassy_embedded_hal::SetConfig;
 use mspm0_metapac::i2c::vals::CpuIntIidxStat;
 use crate::gpio::{AnyPin, SealedPin};
-use crate::interrupt::InterruptExt;
-use crate::mode::{Async, Blocking, Mode};
-use crate::pac::{self, i2c::vals};
-use crate::{i2c, i2c_target, interrupt, Peri};
 // Re-use I2c controller types
 use crate::i2c::{ClockSel, ConfigError, Info, Instance, InterruptHandler, SclPin, SdaPin, State};
+use crate::interrupt::InterruptExt;
+use crate::mode::{Async, Blocking, Mode};
+use crate::pac::i2c::vals;
+use crate::pac::{self};
+use crate::{Peri, i2c, i2c_target, interrupt};
 #[non_exhaustive]
 #[derive(Clone, Copy, PartialEq, Eq, Debug)]
diff --git a/embassy-mspm0/src/lib.rs b/embassy-mspm0/src/lib.rs
index c43c81853..548fb33ca 100644
--- a/embassy-mspm0/src/lib.rs
+++ b/embassy-mspm0/src/lib.rs
@@ -8,20 +8,23 @@
 )]
 #![doc = include_str!("../README.md")]
-// This mod MUST go first, so that the others see its macros.
+// These mods MUST go first, so that the others see the macros.
 pub(crate) mod fmt;
-// This must be declared early as well for
 mod macros;
 pub mod adc;
 pub mod dma;
 pub mod gpio;
+// TODO: I2C unicomm
+#[cfg(not(unicomm))]
 pub mod i2c;
+#[cfg(not(unicomm))]
 pub mod i2c_target;
 #[cfg(any(mspm0g150x, mspm0g151x, mspm0g350x, mspm0g351x))]
 pub mod mathacl;
 pub mod timer;
+// TODO: UART unicomm
+#[cfg(not(unicomm))]
 pub mod uart;
 pub mod wwdt;
@@ -276,7 +279,7 @@ pub enum ResetCause {
    /// WWDT0 violation
    BootrstWwdt0Violation,
    /// WWDT1 violation (G-series only)
-    #[cfg(any(mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x))]
+    #[cfg(any(mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x, mspm0g518x))]
    SysrstWwdt1Violation,
    /// BSL exit (if present)
    SysrstBslExit,
@@ -326,7 +329,8 @@ pub fn read_reset_cause() -> Result<ResetCause, u8> {
            mspm0g151x,
            mspm0g310x,
            mspm0g350x,
-            mspm0g351x
+            mspm0g351x,
+            mspm0g518x,
        )))]
        Id::BOOTNONPMUPARITY => Ok(BootrstNonPmuParityFault),
        Id::BOOTCLKFAIL => Ok(BootrstClockFault),
@@ -335,7 +339,7 @@ pub fn read_reset_cause() -> Result<ResetCause, u8> {
        Id::BOOTWWDT0 => Ok(BootrstWwdt0Violation),
        Id::SYSBSLEXIT => Ok(SysrstBslExit),
        Id::SYSBSLENTRY => Ok(SysrstBslEntry),
-        #[cfg(any(mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x))]
+        #[cfg(any(mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x, mspm0g518x))]
        Id::SYSWWDT1 => Ok(SysrstWwdt1Violation),
        #[cfg(not(any(mspm0c110x, mspm0c1105_c1106, mspm0g351x, mspm0g151x)))]
        Id::SYSFLASHECC => Ok(SysrstFlashEccError),
diff --git a/embassy-mspm0/src/macros.rs b/embassy-mspm0/src/macros.rs
index 5355e7d59..3a12a528a 100644
--- a/embassy-mspm0/src/macros.rs
+++ b/embassy-mspm0/src/macros.rs
@@ -1,5 +1,6 @@
 #![macro_use]
+#[allow(unused)]
 macro_rules! new_pin {
    ($name: ident, $pf_type: expr) => {{
        let pin = $name;
diff --git a/embassy-mspm0/src/time_driver.rs b/embassy-mspm0/src/time_driver.rs
index 0743c667b..b42ff61c2 100644
--- a/embassy-mspm0/src/time_driver.rs
+++ b/embassy-mspm0/src/time_driver.rs
@@ -16,6 +16,8 @@ use crate::timer::SealedTimer;
 compile_error!("TIMG12 and TIMG13 are not supported by the time driver yet");
 // Currently TIMG12 and TIMG13 are excluded because those are 32-bit timers.
+#[cfg(time_driver_timb0)]
+type T = peripherals::TIMB0;
 #[cfg(time_driver_timg0)]
 type T = peripherals::TIMG0;
 #[cfg(time_driver_timg1)]
@@ -333,6 +335,8 @@ pub(crate) fn init(cs: CriticalSection) {
    DRIVER.init(cs);
 }
+// TODO: TIMB0
 #[cfg(time_driver_timg0)]
 #[interrupt]
 fn TIMG0() {
diff --git a/embassy-mspm0/src/uart/buffered.rs b/embassy-mspm0/src/uart/buffered.rs
index 89e6bcc7b..d1b75b177 100644
--- a/embassy-mspm0/src/uart/buffered.rs
+++ b/embassy-mspm0/src/uart/buffered.rs
@@ -436,6 +436,10 @@ impl embedded_io_async::Write for BufferedUart<'_> {
    async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
        self.tx.write_inner(buf).await
    }
+    async fn flush(&mut self) -> Result<(), Self::Error> {
+        self.tx.flush_inner().await
+    }
 }
 impl embedded_io_async::Write for BufferedUartTx<'_> {
diff --git a/embassy-net-nrf91/CHANGELOG.md b/embassy-net-nrf91/CHANGELOG.md
index 11974ac04..66a576b72 100644
--- a/embassy-net-nrf91/CHANGELOG.md
+++ b/embassy-net-nrf91/CHANGELOG.md
@@ -8,8 +8,6 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 <!-- next-header -->
 ## Unreleased - ReleaseDate
- changed: updated to nrf-pac with nrf52/nrf53/nrf91 register layout more similar to nrf54
+## 0.1.0 - 2025-12-15
-## 0.1.1 - 2025-08-14
+- Initial release
- First release with changelog.
diff --git a/embassy-net-nrf91/Cargo.toml b/embassy-net-nrf91/Cargo.toml
index cd9bf2987..c5c582fc3 100644
--- a/embassy-net-nrf91/Cargo.toml
+++ b/embassy-net-nrf91/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "embassy-net-nrf91"
-version = "0.1.1"
+version = "0.1.0"
 edition = "2024"
 description = "embassy-net driver for Nordic nRF91-series cellular modems"
 keywords = ["embedded", "nrf91", "embassy-net", "cellular"]
@@ -8,7 +8,7 @@ categories = ["embedded", "hardware-support", "no-std", "network-programming", "
 license = "MIT OR Apache-2.0"
 repository = "https://github.com/embassy-rs/embassy"
 documentation = "https://docs.embassy.dev/embassy-net-nrf91"
-publish = false
+publish = true
 [features]
 defmt = ["dep:defmt", "heapless/defmt-03"]
@@ -18,7 +18,7 @@ log = ["dep:log"]
 defmt = { version = "1.0.1", optional = true }
 log = { version = "0.4.14", optional = true }
-nrf-pac = { version = "0.1.0", git = "https://github.com/embassy-rs/nrf-pac.git", rev = "52fd51ce762a3d3a81660dea62947e6d2d1e9d91" }
+nrf-pac = { version = "0.2.0", git = "https://github.com/embassy-rs/nrf-pac.git", rev = "7f450696f95591ce42f4da6e7d0402750ab1e50a" }
 cortex-m = "0.7.7"
 embassy-time = { version = "0.5.0", path = "../embassy-time" }
@@ -27,7 +27,7 @@ embassy-futures = { version = "0.1.2", path = "../embassy-futures" }
 embassy-net-driver-channel = { version = "0.3.2", path = "../embassy-net-driver-channel" }
 heapless = "0.8"
-embedded-io = "0.6.1"
+embedded-io = { version = "0.7.1" }
 at-commands = "0.5.4"
 [package.metadata.embassy]
diff --git a/embassy-net-nrf91/src/lib.rs b/embassy-net-nrf91/src/lib.rs
index dd4812aae..2ffa2890f 100644
--- a/embassy-net-nrf91/src/lib.rs
+++ b/embassy-net-nrf91/src/lib.rs
@@ -311,7 +311,7 @@ struct PendingRequest {
    waker: Waker,
 }
-#[derive(Copy, Clone, PartialEq, Eq)]
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 struct NoFreeBufs;
@@ -1061,7 +1061,8 @@ struct ListItem {
 }
 #[repr(C)]
-#[derive(defmt::Format, Clone, Copy)]
+#[derive(Clone, Copy)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 struct Message {
    id: u32,
diff --git a/embassy-net-ppp/Cargo.toml b/embassy-net-ppp/Cargo.toml
index 45ee2f6b5..1dda5017f 100644
--- a/embassy-net-ppp/Cargo.toml
+++ b/embassy-net-ppp/Cargo.toml
@@ -17,7 +17,7 @@ log = ["dep:log", "ppproto/log"]
 defmt = { version = "1.0.1", optional = true }
 log = { version = "0.4.14", optional = true }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 embassy-net-driver-channel = { version = "0.3.2", path = "../embassy-net-driver-channel" }
 embassy-futures = { version = "0.1.2", path = "../embassy-futures" }
 ppproto = { version = "0.2.1"}
diff --git a/embassy-net-tuntap/Cargo.toml b/embassy-net-tuntap/Cargo.toml
index 77668b445..95dc1e1f0 100644
--- a/embassy-net-tuntap/Cargo.toml
+++ b/embassy-net-tuntap/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "embassy-net-tuntap"
-version = "0.1.0"
+version = "0.1.1"
 description = "embassy-net driver for Linux TUN/TAP interfaces."
 keywords = ["embedded", "tuntap", "embassy-net", "ethernet", "async"]
 categories = ["embedded", "hardware-support", "network-programming", "asynchronous"]
@@ -11,7 +11,7 @@ documentation = "https://docs.embassy.dev/embassy-net-tuntap"
 [dependencies]
 embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" }
-async-io = "1.6.0"
+async-io = "2.6.0"
 log = "0.4.14"
 libc = "0.2.101"
diff --git a/embassy-net-tuntap/src/lib.rs b/embassy-net-tuntap/src/lib.rs
index 2ff23f462..33a251248 100644
--- a/embassy-net-tuntap/src/lib.rs
+++ b/embassy-net-tuntap/src/lib.rs
@@ -2,7 +2,9 @@
 #![doc = include_str!("../README.md")]
 use std::io;
 use std::io::{Read, Write};
+use std::os::fd::AsFd;
 use std::os::unix::io::{AsRawFd, RawFd};
+use std::os::unix::prelude::BorrowedFd;
 use std::task::Context;
 use async_io::Async;
@@ -69,6 +71,12 @@ impl AsRawFd for TunTap {
    }
 }
+impl AsFd for TunTap {
+    fn as_fd(&self) -> BorrowedFd<'_> {
+        unsafe { BorrowedFd::borrow_raw(self.fd) }
+    }
+}
 impl TunTap {
    /// Create a new TUN/TAP device.
    pub fn new(name: &str) -> io::Result<TunTap> {
@@ -164,7 +172,7 @@ impl Driver for TunTapDevice {
    fn receive(&mut self, cx: &mut Context) -> Option<(Self::RxToken<'_>, Self::TxToken<'_>)> {
        let mut buf = vec![0; self.device.get_ref().mtu];
        loop {
-            match self.device.get_mut().read(&mut buf) {
+            match unsafe { self.device.get_mut() }.read(&mut buf) {
                Ok(n) => {
                    buf.truncate(n);
                    return Some((
@@ -233,7 +241,7 @@ impl<'a> embassy_net_driver::TxToken for TxToken<'a> {
        let result = f(&mut buffer);
        // todo handle WouldBlock with async
-        match self.device.get_mut().write(&buffer) {
+        match unsafe { self.device.get_mut() }.write(&buffer) {
            Ok(_) => {}
            Err(e) if e.kind() == io::ErrorKind::WouldBlock => info!("transmit WouldBlock"),
            Err(e) => panic!("transmit error: {:?}", e),
diff --git a/embassy-net/Cargo.toml b/embassy-net/Cargo.toml
index 4c8075c43..d66ba1133 100644
--- a/embassy-net/Cargo.toml
+++ b/embassy-net/Cargo.toml
@@ -109,9 +109,9 @@ smoltcp = { version = "0.12.0", default-features = false, features = [
 embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" }
 embassy-time = { version = "0.5.0", path = "../embassy-time" }
 embassy-sync = { version = "0.7.2", path = "../embassy-sync" }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 managed = { version = "0.8.0", default-features = false, features = [ "map" ] }
 heapless = { version = "0.8", default-features = false }
-embedded-nal-async = "0.8.0"
+embedded-nal-async = "0.9.0"
 document-features = "0.2.7"
diff --git a/embassy-net/src/tcp.rs b/embassy-net/src/tcp.rs
index b4db7b88c..74672df1c 100644
--- a/embassy-net/src/tcp.rs
+++ b/embassy-net/src/tcp.rs
@@ -670,6 +670,13 @@ impl<'d> TcpIo<'d> {
 mod embedded_io_impls {
    use super::*;
+    impl core::fmt::Display for ConnectError {
+        fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+            f.write_str("ConnectError")
+        }
+    }
+    impl core::error::Error for ConnectError {}
    impl embedded_io_async::Error for ConnectError {
        fn kind(&self) -> embedded_io_async::ErrorKind {
            match self {
@@ -681,6 +688,15 @@ mod embedded_io_impls {
        }
    }
+    impl core::fmt::Display for Error {
+        fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+            match self {
+                Self::ConnectionReset => f.write_str("ConnectionReset"),
+            }
+        }
+    }
+    impl core::error::Error for Error {}
    impl embedded_io_async::Error for Error {
        fn kind(&self) -> embedded_io_async::ErrorKind {
            match self {
diff --git a/embassy-nrf/CHANGELOG.md b/embassy-nrf/CHANGELOG.md
index 56bb15f42..921835417 100644
--- a/embassy-nrf/CHANGELOG.md
+++ b/embassy-nrf/CHANGELOG.md
@@ -8,6 +8,10 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 <!-- next-header -->
 ## Unreleased - ReleaseDate
+- bugfix: avoid hang if calling now() before syscounter is enabled on nrf54
+## 0.9.0 - 2025-12-15
 - changed: apply trimming values from FICR.TRIMCNF on nrf53/54l
 - changed: do not panic on BufferedUarte overrun
 - added: allow direct access to the input pin of `gpiote::InputChannel`
diff --git a/embassy-nrf/Cargo.toml b/embassy-nrf/Cargo.toml
index ee070f0c0..a8070aa45 100644
--- a/embassy-nrf/Cargo.toml
+++ b/embassy-nrf/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "embassy-nrf"
-version = "0.8.0"
+version = "0.9.0"
 edition = "2024"
 license = "MIT OR Apache-2.0"
 description = "Embassy Hardware Abstraction Layer (HAL) for nRF series microcontrollers"
@@ -217,16 +217,16 @@ embassy-futures = { version = "0.1.2", path = "../embassy-futures", optional = t
 embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
 embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
 embedded-hal-async = { version = "1.0" }
-embedded-io = { version = "0.6.0" }
+embedded-io = { version = "0.7.1" }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 rand-core-06 = { package = "rand_core", version = "0.6" }
 rand-core-09 = { package = "rand_core", version = "0.9" }
-nrf-pac = { version = "0.1.0", git = "https://github.com/embassy-rs/nrf-pac.git", rev = "52fd51ce762a3d3a81660dea62947e6d2d1e9d91" }
+nrf-pac = { version = "0.2.0", git = "https://github.com/embassy-rs/nrf-pac.git", rev = "7f450696f95591ce42f4da6e7d0402750ab1e50a" }
 defmt = { version = "1.0.1", optional = true }
-bitflags = "2.4.2"
+bitflags = "2.10.0"
 log = { version = "0.4.14", optional = true }
 cortex-m-rt = ">=0.6.15,<0.8"
 cortex-m = "0.7.6"
diff --git a/embassy-nrf/src/buffered_uarte/v1.rs b/embassy-nrf/src/buffered_uarte/v1.rs
index ec360f7d0..c14cdfadb 100644
--- a/embassy-nrf/src/buffered_uarte/v1.rs
+++ b/embassy-nrf/src/buffered_uarte/v1.rs
@@ -874,6 +874,15 @@ impl<'a> Drop for BufferedUarteRx<'a> {
    }
 }
+impl core::fmt::Display for Error {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        match *self {
+            Error::Overrun => write!(f, "Buffer Overrun"),
+        }
+    }
+}
+impl core::error::Error for Error {}
 mod _embedded_io {
    use super::*;
diff --git a/embassy-nrf/src/buffered_uarte/v2.rs b/embassy-nrf/src/buffered_uarte/v2.rs
index d0d2d97d1..4a6360b69 100644
--- a/embassy-nrf/src/buffered_uarte/v2.rs
+++ b/embassy-nrf/src/buffered_uarte/v2.rs
@@ -50,6 +50,14 @@ pub enum Error {
    // No errors for now
 }
+impl core::fmt::Display for Error {
+    fn fmt(&self, _f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        match *self {}
+    }
+}
+impl core::error::Error for Error {}
 impl State {
    pub(crate) const fn new() -> Self {
        Self {
diff --git a/embassy-nrf/src/gpiote.rs b/embassy-nrf/src/gpiote.rs
index 1f6000b13..6b9d2d1da 100644
--- a/embassy-nrf/src/gpiote.rs
+++ b/embassy-nrf/src/gpiote.rs
@@ -29,17 +29,14 @@ const CHANNEL_COUNT: usize = 12;
 /// Max channels per port
 const CHANNELS_PER_PORT: usize = 8;
-#[cfg(any(
+#[cfg(any(feature = "nrf52833", feature = "nrf52840", feature = "_nrf5340"))]
-    feature = "nrf52833",
-    feature = "nrf52840",
-    feature = "_nrf5340",
-    feature = "_nrf54l15",
-    feature = "_nrf54l10",
-    feature = "_nrf54l05"
-))]
 const PIN_COUNT: usize = 48;
+#[cfg(any(feature = "_nrf54l15", feature = "_nrf54l10", feature = "_nrf54l05"))]
+// Highest pin index is P2.10 => (2 * 32 + 10) = 74
+const PIN_COUNT: usize = 75;
 #[cfg(feature = "_nrf54lm20")]
-const PIN_COUNT: usize = 66;
+// Highest pin index is P3.12 => (3 * 32 + 12) = 108
+const PIN_COUNT: usize = 109;
 #[cfg(not(any(
    feature = "nrf52833",
    feature = "nrf52840",
diff --git a/embassy-nrf/src/time_driver.rs b/embassy-nrf/src/time_driver.rs
index 35f65bd64..21d94cc30 100644
--- a/embassy-nrf/src/time_driver.rs
+++ b/embassy-nrf/src/time_driver.rs
@@ -79,6 +79,10 @@ fn calc_now(period: u32, counter: u32) -> u64 {
 #[cfg(feature = "_grtc")]
 fn syscounter() -> u64 {
    let r = rtc();
+    if !r.mode().read().syscounteren() {
+        return 0;
+    }
    r.syscounter(0).active().write(|w| w.set_active(true));
    loop {
        let countl: u32 = r.syscounter(0).syscounterl().read();
diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs
index 049830aed..ef5d6c6d1 100644
--- a/embassy-nrf/src/uarte.rs
+++ b/embassy-nrf/src/uarte.rs
@@ -1092,6 +1092,20 @@ mod eh02 {
    }
 }
+impl core::fmt::Display for Error {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        match *self {
+            Self::BufferTooLong => f.write_str("BufferTooLong"),
+            Self::BufferNotInRAM => f.write_str("BufferNotInRAM"),
+            Self::Framing => f.write_str("Framing"),
+            Self::Parity => f.write_str("Parity"),
+            Self::Overrun => f.write_str("Overrun"),
+            Self::Break => f.write_str("Break"),
+        }
+    }
+}
+impl core::error::Error for Error {}
 mod _embedded_io {
    use super::*;
@@ -1121,6 +1135,9 @@ mod _embedded_io {
            self.write(buf).await?;
            Ok(buf.len())
        }
+        async fn flush(&mut self) -> Result<(), Self::Error> {
+            Ok(())
+        }
    }
    impl<'d> embedded_io_async::Write for UarteTx<'d> {
@@ -1128,5 +1145,8 @@ mod _embedded_io {
            self.write(buf).await?;
            Ok(buf.len())
        }
+        async fn flush(&mut self) -> Result<(), Self::Error> {
+            Ok(())
+        }
    }
 }
diff --git a/embassy-nxp/Cargo.toml b/embassy-nxp/Cargo.toml
index b78c26c77..d5ef38531 100644
--- a/embassy-nxp/Cargo.toml
+++ b/embassy-nxp/Cargo.toml
@@ -35,7 +35,7 @@ log = { version = "0.4.27", optional = true }
 embassy-time = { version = "0.5.0", path = "../embassy-time", optional = true }
 embassy-time-driver = { version = "0.2.1", path = "../embassy-time-driver", optional = true }
 embassy-time-queue-utils = { version = "0.3.0", path = "../embassy-time-queue-utils", optional = true }
-embedded-io = "0.6.1"
+embedded-io = { version = "0.7.1" }
 embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
 ## Chip dependencies
 nxp-pac = { version = "0.1.0", optional = true, git = "https://github.com/i509VCB/nxp-pac", rev = "af5122e1cbe1483833c5d2e5af96b26a34ed5d62"}
diff --git a/embassy-nxp/src/usart/lpc55.rs b/embassy-nxp/src/usart/lpc55.rs
index d77f08fd8..319e29054 100644
--- a/embassy-nxp/src/usart/lpc55.rs
+++ b/embassy-nxp/src/usart/lpc55.rs
@@ -51,6 +51,15 @@ impl embedded_io::Error for Error {
        }
    }
 }
+impl core::fmt::Display for Error {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        core::fmt::Debug::fmt(self, f)
+    }
+}
+impl core::error::Error for Error {}
 /// Word length.
 #[derive(Clone, Copy, PartialEq, Eq, Debug)]
 pub enum DataBits {
diff --git a/embassy-rp/Cargo.toml b/embassy-rp/Cargo.toml
index 8e4bb927f..585acc064 100644
--- a/embassy-rp/Cargo.toml
+++ b/embassy-rp/Cargo.toml
@@ -167,8 +167,8 @@ cortex-m-rt = ">=0.6.15,<0.8"
 cortex-m = "0.7.6"
 critical-section = "1.2.0"
 chrono = { version = "0.4", default-features = false, optional = true }
-embedded-io = { version = "0.6.1" }
+embedded-io = { version = "0.7.1" }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 embedded-storage = { version = "0.3" }
 embedded-storage-async = { version = "0.4.1" }
 fixed = "1.28.0"
diff --git a/embassy-rp/src/pio_programs/uart.rs b/embassy-rp/src/pio_programs/uart.rs
index d59596dd1..a16d89a75 100644
--- a/embassy-rp/src/pio_programs/uart.rs
+++ b/embassy-rp/src/pio_programs/uart.rs
@@ -90,6 +90,10 @@ impl<PIO: Instance, const SM: usize> Write for PioUartTx<'_, PIO, SM> {
        }
        Ok(buf.len())
    }
+    async fn flush(&mut self) -> Result<(), Infallible> {
+        Ok(())
+    }
 }
 /// This struct represents a Uart Rx program loaded into pio instruction memory.
diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs
index b7b569dd5..f53b2f88e 100644
--- a/embassy-rp/src/uart/mod.rs
+++ b/embassy-rp/src/uart/mod.rs
@@ -118,6 +118,14 @@ pub enum Error {
    Framing,
 }
+impl core::fmt::Display for Error {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        core::fmt::Debug::fmt(self, f)
+    }
+}
+impl core::error::Error for Error {}
 /// Read To Break error
 #[derive(Debug, Eq, PartialEq, Copy, Clone)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
diff --git a/embassy-stm32-wpan/Cargo.toml b/embassy-stm32-wpan/Cargo.toml
index 9624c7932..acf977ed5 100644
--- a/embassy-stm32-wpan/Cargo.toml
+++ b/embassy-stm32-wpan/Cargo.toml
@@ -46,7 +46,7 @@ critical-section = "1.2"
 bit_field = "0.10.2"
 stm32-device-signature = { version = "0.3.3", features = ["stm32wb5x"] }
-stm32wb-hci = { version = "0.17.0", optional = true }
+stm32wb-hci = { version = "0.17.3", optional = true }
 futures-util = { version = "0.3.30", default-features = false }
 bitflags = { version = "2.3.3", optional = true }
@@ -57,7 +57,7 @@ wb55 = []
 wb55_ble = ["dep:stm32wb-hci"]
 wb55_mac = ["dep:bitflags", "dep:embassy-net-driver", "dep:smoltcp", "smoltcp/medium-ieee802154"]
-wba = [ "dep:stm32-bindings" ]
+wba = [ "dep:stm32-bindings", "dep:embassy-time" ]
 wba_ble = [ "stm32-bindings/wba_wpan_mac" , "stm32-bindings/wba_wpan" ]
 wba_mac = [ "stm32-bindings/wba_wpan_mac", "stm32-bindings/wba_wpan_ble" , "stm32-bindings/lib_wba5_linklayer15_4", "stm32-bindings/lib_wba_mac_lib" , "stm32-bindings/wba_wpan" ]
diff --git a/embassy-stm32-wpan/src/wb55/mod.rs b/embassy-stm32-wpan/src/wb55/mod.rs
index 95cfe09f1..814303a05 100644
--- a/embassy-stm32-wpan/src/wb55/mod.rs
+++ b/embassy-stm32-wpan/src/wb55/mod.rs
@@ -176,7 +176,7 @@ impl<'d> TlMbox<'d> {
        let mm = sub::mm::MemoryManager::new(ipcc_mm_release_buffer_channel);
        let mut sys = sub::sys::Sys::new(ipcc_system_cmd_rsp_channel, ipcc_system_event_channel);
-        debug!("sys event: {}", sys.read().await.payload());
+        debug!("sys event: {}", sys.read_ready().await);
        Self {
            sys_subsystem: sys,
diff --git a/embassy-stm32-wpan/src/wb55/shci.rs b/embassy-stm32-wpan/src/wb55/shci.rs
index 3faa79209..3eb9525d3 100644
--- a/embassy-stm32-wpan/src/wb55/shci.rs
+++ b/embassy-stm32-wpan/src/wb55/shci.rs
@@ -12,6 +12,28 @@ const fn opcode(ogf: u16, ocf: u16) -> isize {
    ((ogf << 10) + ocf) as isize
 }
+pub(crate) trait SealedSchiFromPacket: Sized {
+    unsafe fn from_packet(cmd_buf: *const CmdPacket) -> Result<Self, ()>;
+}
+#[allow(private_bounds)]
+pub trait SchiFromPacket: SealedSchiFromPacket {}
+impl<T: SealedSchiFromPacket> SchiFromPacket for T {}
+trait ShciFromEventSerial: TryFrom<u8, Error = ()> {}
+impl<T: ShciFromEventSerial> SealedSchiFromPacket for T {
+    unsafe fn from_packet(cmd_buf: *const CmdPacket) -> Result<Self, ()> {
+        let p_cmd_serial = (cmd_buf as *mut u8).add(size_of::<PacketHeader>());
+        let p_evt_payload = p_cmd_serial.add(size_of::<EvtStub>());
+        compiler_fence(Ordering::Acquire);
+        let cc_evt = ptr::read_unaligned(p_evt_payload as *const CcEvt);
+        cc_evt.payload[0].try_into()
+    }
+}
 #[allow(dead_code)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum SchiCommandStatus {
@@ -25,37 +47,20 @@ pub enum SchiCommandStatus {
    ShciFusCmdNotSupported = 0xFF,
 }
-impl SchiCommandStatus {
+impl ShciFromEventSerial for SchiCommandStatus {}
-    pub unsafe fn from_packet(cmd_buf: *const CmdPacket) -> Result<Self, ()> {
-        let p_cmd_serial = (cmd_buf as *mut u8).add(size_of::<PacketHeader>());
-        let p_evt_payload = p_cmd_serial.add(size_of::<EvtStub>());
-        compiler_fence(Ordering::Acquire);
-        let cc_evt = ptr::read_unaligned(p_evt_payload as *const CcEvt);
-        cc_evt.payload[0].try_into()
-    }
-}
 impl TryFrom<u8> for SchiCommandStatus {
    type Error = ();
    fn try_from(v: u8) -> Result<Self, Self::Error> {
        match v {
-            x if x == SchiCommandStatus::ShciSuccess as u8 => Ok(SchiCommandStatus::ShciSuccess),
+            0x00 => Ok(Self::ShciSuccess),
-            x if x == SchiCommandStatus::ShciUnknownCmd as u8 => Ok(SchiCommandStatus::ShciUnknownCmd),
+            0x01 => Ok(Self::ShciUnknownCmd),
-            x if x == SchiCommandStatus::ShciMemoryCapacityExceededErrCode as u8 => {
+            0x07 => Ok(Self::ShciMemoryCapacityExceededErrCode),
-                Ok(SchiCommandStatus::ShciMemoryCapacityExceededErrCode)
+            0x11 => Ok(Self::ShciErrUnsupportedFeature),
-            }
+            0x12 => Ok(Self::ShciErrInvalidHciCmdParams),
-            x if x == SchiCommandStatus::ShciErrUnsupportedFeature as u8 => {
+            0x42 => Ok(Self::ShciErrInvalidParams), /* only used for release < v1.13.0 */
-                Ok(SchiCommandStatus::ShciErrUnsupportedFeature)
+            0x92 => Ok(Self::ShciErrInvalidParamsV2), /* available for release >= v1.13.0 */
-            }
+            0xFF => Ok(Self::ShciFusCmdNotSupported),
-            x if x == SchiCommandStatus::ShciErrInvalidHciCmdParams as u8 => {
-                Ok(SchiCommandStatus::ShciErrInvalidHciCmdParams)
-            }
-            x if x == SchiCommandStatus::ShciErrInvalidParams as u8 => Ok(SchiCommandStatus::ShciErrInvalidParams), /* only used for release < v1.13.0 */
-            x if x == SchiCommandStatus::ShciErrInvalidParamsV2 as u8 => Ok(SchiCommandStatus::ShciErrInvalidParamsV2), /* available for release >= v1.13.0 */
-            x if x == SchiCommandStatus::ShciFusCmdNotSupported as u8 => Ok(SchiCommandStatus::ShciFusCmdNotSupported),
            _ => Err(()),
        }
    }
@@ -107,6 +112,71 @@ pub enum ShciOpcode {
    Mac802_15_4DeInit = opcode(SHCI_OGF, 0x78),
 }
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+pub enum ShciFusGetStateErrorCode {
+    FusStateErrorNoError = 0x00,
+    FusStateErrorImgNotFound = 0x01,
+    FusStateErrorImgCorrupt = 0x02,
+    FusStateErrorImgNotAuthentic = 0x03,
+    FusStateErrorImgNotEnoughSpace = 0x04,
+    FusStateErrorImageUsrAbort = 0x05,
+    FusStateErrorImageErsError = 0x06,
+    FusStateErrorImageWrtError = 0x07,
+    FusStateErrorAuthTagStNotFound = 0x08,
+    FusStateErrorAuthTagCustNotFound = 0x09,
+    FusStateErrorAuthKeyLocked = 0x0A,
+    FusStateErrorFwRollbackError = 0x11,
+    FusStateErrorStateNotRunning = 0xFE,
+    FusStateErrorErrUnknown = 0xFF,
+}
+impl ShciFromEventSerial for ShciFusGetStateErrorCode {}
+impl TryFrom<u8> for ShciFusGetStateErrorCode {
+    type Error = ();
+    fn try_from(v: u8) -> Result<Self, Self::Error> {
+        match v {
+            0x00 => Ok(Self::FusStateErrorNoError),
+            0x01 => Ok(Self::FusStateErrorImgNotFound),
+            0x02 => Ok(Self::FusStateErrorImgCorrupt),
+            0x03 => Ok(Self::FusStateErrorImgNotAuthentic),
+            0x04 => Ok(Self::FusStateErrorImgNotEnoughSpace),
+            0x05 => Ok(Self::FusStateErrorImageUsrAbort),
+            0x06 => Ok(Self::FusStateErrorImageErsError),
+            0x07 => Ok(Self::FusStateErrorImageWrtError),
+            0x08 => Ok(Self::FusStateErrorAuthTagStNotFound),
+            0x09 => Ok(Self::FusStateErrorAuthTagCustNotFound),
+            0x0A => Ok(Self::FusStateErrorAuthKeyLocked),
+            0x11 => Ok(Self::FusStateErrorFwRollbackError),
+            0xFE => Ok(Self::FusStateErrorStateNotRunning),
+            0xFF => Ok(Self::FusStateErrorErrUnknown),
+            _ => Err(()),
+        }
+    }
+}
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+pub enum SchiSysEventReady {
+    WirelessFwRunning = 0x00,
+    FusFwRunning = 0x01,
+    NvmBackupRunning = 0x10,
+    NvmRestoreRunning = 0x11,
+}
+impl TryFrom<u8> for SchiSysEventReady {
+    type Error = ();
+    fn try_from(v: u8) -> Result<Self, Self::Error> {
+        match v {
+            0x00 => Ok(Self::WirelessFwRunning),
+            0x01 => Ok(Self::FusFwRunning),
+            0x10 => Ok(Self::NvmBackupRunning),
+            0x11 => Ok(Self::NvmRestoreRunning),
+            _ => Err(()),
+        }
+    }
+}
 pub const SHCI_C2_CONFIG_EVTMASK1_BIT0_ERROR_NOTIF_ENABLE: u8 = 1 << 0;
 pub const SHCI_C2_CONFIG_EVTMASK1_BIT1_BLE_NVM_RAM_UPDATE_ENABLE: u8 = 1 << 1;
 pub const SHCI_C2_CONFIG_EVTMASK1_BIT2_THREAD_NVM_RAM_UPDATE_ENABLE: u8 = 1 << 2;
diff --git a/embassy-stm32-wpan/src/wb55/sub/ble.rs b/embassy-stm32-wpan/src/wb55/sub/ble.rs
index a2558d735..a822d6530 100644
--- a/embassy-stm32-wpan/src/wb55/sub/ble.rs
+++ b/embassy-stm32-wpan/src/wb55/sub/ble.rs
@@ -130,12 +130,8 @@ impl<'a> hci::Controller for Ble<'a> {
        self.tl_write(opcode.0, payload).await;
    }
-    #[allow(invalid_reference_casting)]
+    async fn controller_read_into(&mut self, buf: &mut [u8]) {
-    async fn controller_read_into(&self, buf: &mut [u8]) {
+        let evt_box = self.tl_read().await;
-        // A complete hack since I cannot update the trait
-        let s = unsafe { &mut *(self as *const _ as *mut Ble) };
-        let evt_box = s.tl_read().await;
        let evt_serial = evt_box.serial();
        buf[..evt_serial.len()].copy_from_slice(evt_serial);
diff --git a/embassy-stm32-wpan/src/wb55/sub/sys.rs b/embassy-stm32-wpan/src/wb55/sub/sys.rs
index 2e625a677..3d774eeb7 100644
--- a/embassy-stm32-wpan/src/wb55/sub/sys.rs
+++ b/embassy-stm32-wpan/src/wb55/sub/sys.rs
@@ -1,3 +1,5 @@
+use core::slice;
 use embassy_stm32::ipcc::{IpccRxChannel, IpccTxChannel};
 use crate::cmd::CmdPacket;
@@ -5,12 +7,17 @@ use crate::consts::TlPacketType;
 use crate::evt::EvtBox;
 #[cfg(feature = "wb55_ble")]
 use crate::shci::ShciBleInitCmdParam;
-use crate::shci::{SchiCommandStatus, ShciOpcode};
+use crate::shci::{SchiCommandStatus, SchiFromPacket, SchiSysEventReady, ShciFusGetStateErrorCode, ShciOpcode};
 use crate::sub::mm;
 use crate::tables::{SysTable, WirelessFwInfoTable};
 use crate::unsafe_linked_list::LinkedListNode;
 use crate::wb55::{SYS_CMD_BUF, SYSTEM_EVT_QUEUE, TL_DEVICE_INFO_TABLE, TL_SYS_TABLE};
+const fn slice8_ref(x: &[u32]) -> &[u8] {
+    let len = x.len() * 4;
+    unsafe { slice::from_raw_parts(x.as_ptr() as *const u8, len) }
+}
 /// A guard that, once constructed, allows for sys commands to be sent to CPU2.
 pub struct Sys<'a> {
    ipcc_system_cmd_rsp_channel: IpccTxChannel<'a>,
@@ -55,15 +62,15 @@ impl<'a> Sys<'a> {
    }
    /// `HW_IPCC_SYS_CmdEvtNot`
-    pub async fn write_and_get_response(
+    pub async fn write_and_get_response<T: SchiFromPacket>(
        &mut self,
        opcode: ShciOpcode,
        payload: &[u8],
-    ) -> Result<SchiCommandStatus, ()> {
+    ) -> Result<T, ()> {
        self.write(opcode, payload).await;
        self.ipcc_system_cmd_rsp_channel.flush().await;
-        unsafe { SchiCommandStatus::from_packet(SYS_CMD_BUF.as_ptr()) }
+        unsafe { T::from_packet(SYS_CMD_BUF.as_ptr()) }
    }
    #[cfg(feature = "wb55_mac")]
@@ -82,6 +89,36 @@ impl<'a> Sys<'a> {
        self.write_and_get_response(ShciOpcode::BleInit, param.payload()).await
    }
+    pub async fn shci_c2_fus_getstate(&mut self) -> Result<ShciFusGetStateErrorCode, ()> {
+        self.write_and_get_response(ShciOpcode::FusStartWirelessStack, &[])
+            .await
+    }
+    /// Send a request to CPU2 to start the wireless stack
+    pub async fn shci_c2_fus_startws(&mut self) -> Result<SchiCommandStatus, ()> {
+        self.write_and_get_response(ShciOpcode::FusStartWirelessStack, &[])
+            .await
+    }
+    /// Send a request to CPU2 to upgrade the firmware
+    pub async fn shci_c2_fus_fwupgrade(&mut self, fw_src_add: u32, fw_dst_add: u32) -> Result<SchiCommandStatus, ()> {
+        let buf = [fw_src_add, fw_dst_add];
+        let len = if fw_dst_add != 0 {
+            2
+        } else if fw_src_add != 0 {
+            1
+        } else {
+            0
+        };
+        self.write_and_get_response(ShciOpcode::FusFirmwareUpgrade, slice8_ref(&buf[..len]))
+            .await
+    }
+    pub async fn read_ready(&mut self) -> Result<SchiSysEventReady, ()> {
+        self.read().await.payload()[0].try_into()
+    }
    /// `HW_IPCC_SYS_EvtNot`
    ///
    /// This method takes the place of the `HW_IPCC_SYS_EvtNot`/`SysUserEvtRx`/`APPE_SysUserEvtRx`,
diff --git a/embassy-stm32-wpan/src/wba/linklayer_plat.rs b/embassy-stm32-wpan/src/wba/linklayer_plat.rs
index c011b3bcb..e6a342b52 100644
--- a/embassy-stm32-wpan/src/wba/linklayer_plat.rs
+++ b/embassy-stm32-wpan/src/wba/linklayer_plat.rs
@@ -1,6 +1,3 @@
-#[allow(dead_code)]
-fn test_fn() {}
 // /* USER CODE BEGIN Header */
 // /**
 //   ******************************************************************************
@@ -72,131 +69,339 @@ fn test_fn() {}
 // uint8_t AHB5_SwitchedOff = 0;
 // uint32_t radio_sleep_timer_val = 0;
 //
+// /* USER CODE BEGIN LINKLAYER_PLAT 0 */
+//
+// /* USER CODE END LINKLAYER_PLAT 0 */
+#![cfg(feature = "wba")]
+#![allow(clippy::missing_safety_doc)]
+use core::hint::spin_loop;
+use core::ptr;
+use core::sync::atomic::{AtomicBool, AtomicI32, AtomicPtr, AtomicU32, Ordering};
+use cortex_m::asm::{dsb, isb};
+use cortex_m::interrupt::InterruptNumber;
+use cortex_m::peripheral::NVIC;
+use cortex_m::register::basepri;
+use critical_section;
+#[cfg(feature = "defmt")]
+use defmt::trace;
+use embassy_stm32::NVIC_PRIO_BITS;
+use embassy_time::{Duration, block_for};
+use super::bindings::{link_layer, mac};
+// Missing constant from stm32-bindings - RADIO_SW_LOW interrupt number
+// For STM32WBA, this is typically RADIO_IRQ_BUSY (interrupt 43)
+const RADIO_SW_LOW_INTR_NUM: u32 = 43;
+type Callback = unsafe extern "C" fn();
+#[derive(Clone, Copy, Debug, Eq, PartialEq)]
+#[repr(transparent)]
+struct RawInterrupt(u16);
+impl RawInterrupt {
+    fn new(irq: u32) -> Self {
+        debug_assert!(irq <= u16::MAX as u32);
+        Self(irq as u16)
+    }
+}
+impl From<u32> for RawInterrupt {
+    fn from(value: u32) -> Self {
+        Self::new(value)
+    }
+}
+unsafe impl InterruptNumber for RawInterrupt {
+    fn number(self) -> u16 {
+        self.0
+    }
+}
+static RADIO_CALLBACK: AtomicPtr<()> = AtomicPtr::new(ptr::null_mut());
+static LOW_ISR_CALLBACK: AtomicPtr<()> = AtomicPtr::new(ptr::null_mut());
+static IRQ_COUNTER: AtomicI32 = AtomicI32::new(0);
+static PRIO_HIGH_ISR_COUNTER: AtomicI32 = AtomicI32::new(0);
+static PRIO_LOW_ISR_COUNTER: AtomicI32 = AtomicI32::new(0);
+static PRIO_SYS_ISR_COUNTER: AtomicI32 = AtomicI32::new(0);
+static LOCAL_BASEPRI_VALUE: AtomicU32 = AtomicU32::new(0);
+static RADIO_SW_LOW_ISR_RUNNING_HIGH_PRIO: AtomicBool = AtomicBool::new(false);
+static AHB5_SWITCHED_OFF: AtomicBool = AtomicBool::new(false);
+static RADIO_SLEEP_TIMER_VAL: AtomicU32 = AtomicU32::new(0);
+static PRNG_STATE: AtomicU32 = AtomicU32::new(0);
+static PRNG_INIT: AtomicBool = AtomicBool::new(false);
+// Critical-section restore token for IRQ enable/disable pairing.
+// Only written when the IRQ disable counter transitions 0->1, and consumed when it transitions 1->0.
+static mut CS_RESTORE_STATE: Option<critical_section::RestoreState> = None;
+fn read_system_core_clock() -> u32 {
+    0
+}
+fn store_callback(slot: &AtomicPtr<()>, cb: Option<Callback>) {
+    let ptr = cb.map_or(ptr::null_mut(), |f| f as *mut ());
+    slot.store(ptr, Ordering::Release);
+}
+fn load_callback(slot: &AtomicPtr<()>) -> Option<Callback> {
+    let ptr = slot.load(Ordering::Acquire);
+    if ptr.is_null() {
+        None
+    } else {
+        Some(unsafe { core::mem::transmute::<*mut (), Callback>(ptr) })
+    }
+}
+fn priority_shift() -> u8 {
+    8 - NVIC_PRIO_BITS as u8
+}
+fn pack_priority(raw: u32) -> u8 {
+    let shift = priority_shift();
+    let priority_bits = NVIC_PRIO_BITS as u32;
+    let mask = if priority_bits >= 32 {
+        u32::MAX
+    } else {
+        (1u32 << priority_bits) - 1
+    };
+    let clamped = raw & mask;
+    (clamped << u32::from(shift)) as u8
+}
+fn counter_release(counter: &AtomicI32) -> bool {
+    counter.fetch_sub(1, Ordering::SeqCst) <= 1
+}
+fn counter_acquire(counter: &AtomicI32) -> bool {
+    counter.fetch_add(1, Ordering::SeqCst) == 0
+}
+unsafe fn nvic_enable(irq: u32) {
+    NVIC::unmask(RawInterrupt::new(irq));
+    dsb();
+    isb();
+}
+unsafe fn nvic_disable(irq: u32) {
+    NVIC::mask(RawInterrupt::new(irq));
+    dsb();
+    isb();
+}
+unsafe fn nvic_set_pending(irq: u32) {
+    NVIC::pend(RawInterrupt::new(irq));
+    dsb();
+    isb();
+}
+unsafe fn nvic_get_active(irq: u32) -> bool {
+    NVIC::is_active(RawInterrupt::new(irq))
+}
+unsafe fn nvic_set_priority(irq: u32, priority: u8) {
+    // STM32WBA is ARMv8-M, which uses byte-accessible IPR registers
+    let nvic = &*NVIC::PTR;
+    nvic.ipr[irq as usize].write(priority);
+    dsb();
+    isb();
+}
+fn set_basepri_max(value: u8) {
+    unsafe {
+        if basepri::read() < value {
+            basepri::write(value);
+        }
+    }
+}
+fn prng_next() -> u32 {
+    #[inline]
+    fn xorshift(mut x: u32) -> u32 {
+        x ^= x << 13;
+        x ^= x >> 17;
+        x ^= x << 5;
+        x
+    }
+    if !PRNG_INIT.load(Ordering::Acquire) {
+        let seed = unsafe {
+            let timer = link_layer::ll_intf_cmn_get_slptmr_value();
+            let core_clock = read_system_core_clock();
+            timer ^ core_clock ^ 0x6C8E_9CF5
+        };
+        PRNG_STATE.store(seed, Ordering::Relaxed);
+        PRNG_INIT.store(true, Ordering::Release);
+    }
+    let mut current = PRNG_STATE.load(Ordering::Relaxed);
+    loop {
+        let next = xorshift(current);
+        match PRNG_STATE.compare_exchange_weak(current, next, Ordering::AcqRel, Ordering::Relaxed) {
+            Ok(_) => return next,
+            Err(v) => current = v,
+        }
+    }
+}
+pub unsafe fn run_radio_high_isr() {
+    if let Some(cb) = load_callback(&RADIO_CALLBACK) {
+        cb();
+    }
+}
+pub unsafe fn run_radio_sw_low_isr() {
+    if let Some(cb) = load_callback(&LOW_ISR_CALLBACK) {
+        cb();
+    }
+    if RADIO_SW_LOW_ISR_RUNNING_HIGH_PRIO.swap(false, Ordering::AcqRel) {
+        nvic_set_priority(RADIO_SW_LOW_INTR_NUM, pack_priority(mac::RADIO_SW_LOW_INTR_PRIO));
+    }
+}
 // /**
 //   * @brief  Configure the necessary clock sources for the radio.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_ClockInit()
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_ClockInit() {
-//   uint32_t linklayer_slp_clk_src = LL_RCC_RADIOSLEEPSOURCE_NONE;
+    //   uint32_t linklayer_slp_clk_src = LL_RCC_RADIOSLEEPSOURCE_NONE;
-//
+    //
-//   /* Get the Link Layer sleep timer clock source */
+    //   /* Get the Link Layer sleep timer clock source */
-//   linklayer_slp_clk_src = LL_RCC_RADIO_GetSleepTimerClockSource();
+    //   linklayer_slp_clk_src = LL_RCC_RADIO_GetSleepTimerClockSource();
-//   if(linklayer_slp_clk_src == LL_RCC_RADIOSLEEPSOURCE_NONE)
+    //   if(linklayer_slp_clk_src == LL_RCC_RADIOSLEEPSOURCE_NONE)
-//   {
+    //   {
-//     /* If there is no clock source defined, should be selected before */
+    //     /* If there is no clock source defined, should be selected before */
-//     assert_param(0);
+    //     assert_param(0);
-//   }
+    //   }
-//
+    //
-//   /* Enable AHB5ENR peripheral clock (bus CLK) */
+    //   /* Enable AHB5ENR peripheral clock (bus CLK) */
-//   __HAL_RCC_RADIO_CLK_ENABLE();
+    //   __HAL_RCC_RADIO_CLK_ENABLE();
-// }
+    trace!("LINKLAYER_PLAT_ClockInit: get_slptmr_value");
-//
+    let _ = link_layer::ll_intf_cmn_get_slptmr_value();
+}
 // /**
 //   * @brief  Link Layer active waiting loop.
 //   * @param  delay: delay in us
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_DelayUs(uint32_t delay)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_DelayUs(delay: u32) {
-//   static uint8_t lock = 0;
+    //   static uint8_t lock = 0;
-//   uint32_t t0;
+    //   uint32_t t0;
-//   uint32_t primask_bit;
+    //   uint32_t primask_bit;
-//
+    //
-//   /* Enter critical section */
+    //   /* Enter critical section */
-//   primask_bit= __get_PRIMASK();
+    //   primask_bit= __get_PRIMASK();
-//   __disable_irq();
+    //   __disable_irq();
-//
+    //
-//   if (lock == 0U)
+    //   if (lock == 0U)
-//   {
+    //   {
-//     /* Initialize counter */
+    //     /* Initialize counter */
-//     /* Reset cycle counter to prevent overflow
+    //     /* Reset cycle counter to prevent overflow
-//        As a us counter, it is assumed than even with re-entrancy,
+    //        As a us counter, it is assumed than even with re-entrancy,
-//        overflow will never happen before re-initializing this counter */
+    //        overflow will never happen before re-initializing this counter */
-//     DWT->CYCCNT = 0U;
+    //     DWT->CYCCNT = 0U;
-//     /* Enable DWT by safety but should be useless (as already set) */
+    //     /* Enable DWT by safety but should be useless (as already set) */
-//     SET_BIT(DCB->DEMCR, DCB_DEMCR_TRCENA_Msk);
+    //     SET_BIT(DCB->DEMCR, DCB_DEMCR_TRCENA_Msk);
-//     /* Enable counter */
+    //     /* Enable counter */
-//     SET_BIT(DWT->CTRL, DWT_CTRL_CYCCNTENA_Msk);
+    //     SET_BIT(DWT->CTRL, DWT_CTRL_CYCCNTENA_Msk);
-//   }
+    //   }
-//   /* Increment 're-entrance' counter */
+    //   /* Increment 're-entrance' counter */
-//   lock++;
+    //   lock++;
-//   /* Get starting time stamp */
+    //   /* Get starting time stamp */
-//   t0 = DWT->CYCCNT;
+    //   t0 = DWT->CYCCNT;
-//   /* Exit critical section */
+    //   /* Exit critical section */
-//  __set_PRIMASK(primask_bit);
+    //  __set_PRIMASK(primask_bit);
-//
+    //
-//   /* Turn us into cycles */
+    //   /* Turn us into cycles */
-//   delay = delay * (SystemCoreClock / 1000000U);
+    //   delay = delay * (SystemCoreClock / 1000000U);
-//   delay += t0;
+    //   delay += t0;
-//
+    //
-//   /* Busy waiting loop */
+    //   /* Busy waiting loop */
-//   while (DWT->CYCCNT < delay)
+    //   while (DWT->CYCCNT < delay)
-//   {
+    //   {
-//   };
+    //   };
-//
+    //
-//   /* Enter critical section */
+    //   /* Enter critical section */
-//   primask_bit= __get_PRIMASK();
+    //   primask_bit= __get_PRIMASK();
-//   __disable_irq();
+    //   __disable_irq();
-//   if (lock == 1U)
+    //   if (lock == 1U)
-//   {
+    //   {
-//     /* Disable counter */
+    //     /* Disable counter */
-//     CLEAR_BIT(DWT->CTRL, DWT_CTRL_CYCCNTENA_Msk);
+    //     CLEAR_BIT(DWT->CTRL, DWT_CTRL_CYCCNTENA_Msk);
-//   }
+    //   }
-//   /* Decrement 're-entrance' counter */
+    //   /* Decrement 're-entrance' counter */
-//   lock--;
+    //   lock--;
-//   /* Exit critical section */
+    //   /* Exit critical section */
-//  __set_PRIMASK(primask_bit);
+    //  __set_PRIMASK(primask_bit);
-//
+    //
-// }
+    trace!("LINKLAYER_PLAT_DelayUs: delay={}", delay);
-//
+    block_for(Duration::from_micros(u64::from(delay)));
+}
 // /**
 //   * @brief  Link Layer assertion API
 //   * @param  condition: conditional statement to be checked.
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_Assert(uint8_t condition)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_Assert(condition: u8) {
-//   assert_param(condition);
+    if condition == 0 {
-// }
+        panic!("LINKLAYER_PLAT assertion failed");
-//
+    }
+}
 // /**
 //   * @brief  Enable/disable the Link Layer active clock (baseband clock).
 //   * @param  enable: boolean value to enable (1) or disable (0) the clock.
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_WaitHclkRdy(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_WaitHclkRdy() {
-//   /* Wait on radio bus clock readiness if it has been turned of */
+    trace!("LINKLAYER_PLAT_WaitHclkRdy");
-//   if (AHB5_SwitchedOff == 1)
+    if AHB5_SWITCHED_OFF.swap(false, Ordering::AcqRel) {
-//   {
+        let reference = RADIO_SLEEP_TIMER_VAL.load(Ordering::Acquire);
-//     AHB5_SwitchedOff = 0;
+        trace!("LINKLAYER_PLAT_WaitHclkRdy: reference={}", reference);
-//     while (radio_sleep_timer_val == ll_intf_cmn_get_slptmr_value());
+        while reference == link_layer::ll_intf_cmn_get_slptmr_value() {
-//   }
+            spin_loop();
-// }
+        }
-//
+    }
+}
 // /**
 //   * @brief  Notify the Link Layer platform layer the system will enter in WFI
 //   *         and AHB5 clock may be turned of regarding the 2.4Ghz radio state.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_NotifyWFIEnter(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_NotifyWFIEnter() {
-//   /* Check if Radio state will allow the AHB5 clock to be cut */
+    //   /* Check if Radio state will allow the AHB5 clock to be cut */
-//
+    //
-//   /* AHB5 clock will be cut in the following cases:
+    //   /* AHB5 clock will be cut in the following cases:
-//    * - 2.4GHz radio is not in ACTIVE mode (in SLEEP or DEEPSLEEP mode).
+    //    * - 2.4GHz radio is not in ACTIVE mode (in SLEEP or DEEPSLEEP mode).
-//    * - RADIOSMEN and STRADIOCLKON bits are at 0.
+    //    * - RADIOSMEN and STRADIOCLKON bits are at 0.
-//    */
+    //    */
-//   if((LL_PWR_GetRadioMode() != LL_PWR_RADIO_ACTIVE_MODE) ||
+    //   if((LL_PWR_GetRadioMode() != LL_PWR_RADIO_ACTIVE_MODE) ||
-//      ((__HAL_RCC_RADIO_IS_CLK_SLEEP_ENABLED() == 0) && (LL_RCC_RADIO_IsEnabledSleepTimerClock() == 0)))
+    //      ((__HAL_RCC_RADIO_IS_CLK_SLEEP_ENABLED() == 0) && (LL_RCC_RADIO_IsEnabledSleepTimerClock() == 0)))
-//   {
+    //   {
-//     AHB5_SwitchedOff = 1;
+    //     AHB5_SwitchedOff = 1;
-//   }
+    //   }
-// }
+    trace!("LINKLAYER_PLAT_NotifyWFIEnter");
-//
+    AHB5_SWITCHED_OFF.store(true, Ordering::Release);
+}
 // /**
 //   * @brief  Notify the Link Layer platform layer the system exited WFI and AHB5
 //   *         clock may be resynchronized as is may have been turned of during
@@ -204,172 +409,202 @@ fn test_fn() {}
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_NotifyWFIExit(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_NotifyWFIExit() {
-//   /* Check if AHB5 clock has been turned of and needs resynchronisation */
+    trace!("LINKLAYER_PLAT_NotifyWFIExit");
-//   if (AHB5_SwitchedOff)
+    //   /* Check if AHB5 clock has been turned of and needs resynchronisation */
-//   {
+    if AHB5_SWITCHED_OFF.load(Ordering::Acquire) {
-//     /* Read sleep register as earlier as possible */
+        //     /* Read sleep register as earlier as possible */
-//     radio_sleep_timer_val = ll_intf_cmn_get_slptmr_value();
+        let value = link_layer::ll_intf_cmn_get_slptmr_value();
-//   }
+        RADIO_SLEEP_TIMER_VAL.store(value, Ordering::Release);
-// }
+    }
-//
+}
 // /**
 //   * @brief  Active wait on bus clock readiness.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_AclkCtrl(uint8_t enable)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_AclkCtrl(_enable: u8) {
-//   if(enable != 0u)
+    trace!("LINKLAYER_PLAT_AclkCtrl: enable={}", _enable);
-//   {
+    if _enable != 0 {
-// #if (CFG_SCM_SUPPORTED == 1)
+        // #if (CFG_SCM_SUPPORTED == 1)
-//     /* SCM HSE BEGIN */
+        //     /* SCM HSE BEGIN */
-//     /* Polling on HSE32 activation */
+        //     /* Polling on HSE32 activation */
-//     SCM_HSE_WaitUntilReady();
+        //     SCM_HSE_WaitUntilReady();
-//     /* Enable RADIO baseband clock (active CLK) */
+        //     /* Enable RADIO baseband clock (active CLK) */
-//     HAL_RCCEx_EnableRadioBBClock();
+        //     HAL_RCCEx_EnableRadioBBClock();
-//     /* SCM HSE END */
+        //     /* SCM HSE END */
-// #else
+        // #else
-//     /* Enable RADIO baseband clock (active CLK) */
+        //     /* Enable RADIO baseband clock (active CLK) */
-//     HAL_RCCEx_EnableRadioBBClock();
+        //     HAL_RCCEx_EnableRadioBBClock();
-//     /* Polling on HSE32 activation */
+        //     /* Polling on HSE32 activation */
-//     while ( LL_RCC_HSE_IsReady() == 0);
+        //     while ( LL_RCC_HSE_IsReady() == 0);
-// #endif /* CFG_SCM_SUPPORTED */
+        // #endif /* CFG_SCM_SUPPORTED */
-//   }
+        // NOTE: Add a proper assertion once a typed `Radio` peripheral exists in embassy-stm32
-//   else
+        // that exposes the baseband clock enable status via RCC.
-//   {
+    } else {
-//     /* Disable RADIO baseband clock (active CLK) */
+        //     /* Disable RADIO baseband clock (active CLK) */
-//     HAL_RCCEx_DisableRadioBBClock();
+        //     HAL_RCCEx_DisableRadioBBClock();
-//   }
+    }
-// }
+}
-//
 // /**
 //   * @brief  Link Layer RNG request.
 //   * @param  ptr_rnd: pointer to the variable that hosts the number.
 //   * @param  len: number of byte of anthropy to get.
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_GetRNG(uint8_t *ptr_rnd, uint32_t len)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_GetRNG(ptr_rnd: *mut u8, len: u32) {
-//   uint32_t nb_remaining_rng = len;
+    //   uint32_t nb_remaining_rng = len;
-//   uint32_t generated_rng;
+    //   uint32_t generated_rng;
-//
+    //
-//   /* Get the requested RNGs (4 bytes by 4bytes) */
+    //   /* Get the requested RNGs (4 bytes by 4bytes) */
-//   while(nb_remaining_rng >= 4)
+    //   while(nb_remaining_rng >= 4)
-//   {
+    //   {
-//     generated_rng = 0;
+    //     generated_rng = 0;
-//     HW_RNG_Get(1, &generated_rng);
+    //     HW_RNG_Get(1, &generated_rng);
-//     memcpy((ptr_rnd+(len-nb_remaining_rng)), &generated_rng, 4);
+    //     memcpy((ptr_rnd+(len-nb_remaining_rng)), &generated_rng, 4);
-//     nb_remaining_rng -=4;
+    //     nb_remaining_rng -=4;
-//   }
+    //   }
-//
+    //
-//   /* Get the remaining number of RNGs */
+    //   /* Get the remaining number of RNGs */
-//   if(nb_remaining_rng>0){
+    //   if(nb_remaining_rng>0){
-//     generated_rng = 0;
+    //     generated_rng = 0;
-//     HW_RNG_Get(1, &generated_rng);
+    //     HW_RNG_Get(1, &generated_rng);
-//     memcpy((ptr_rnd+(len-nb_remaining_rng)), &generated_rng, nb_remaining_rng);
+    //     memcpy((ptr_rnd+(len-nb_remaining_rng)), &generated_rng, nb_remaining_rng);
-//   }
+    //   }
-// }
+    trace!("LINKLAYER_PLAT_GetRNG: ptr_rnd={:?}, len={}", ptr_rnd, len);
-//
+    if ptr_rnd.is_null() || len == 0 {
+        return;
+    }
+    for i in 0..len {
+        let byte = (prng_next() >> ((i & 3) * 8)) as u8;
+        ptr::write_volatile(ptr_rnd.add(i as usize), byte);
+    }
+}
 // /**
 //   * @brief  Initialize Link Layer radio high priority interrupt.
 //   * @param  intr_cb: function pointer to assign for the radio high priority ISR routine.
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_SetupRadioIT(void (*intr_cb)())
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_SetupRadioIT(intr_cb: Option<Callback>) {
-//   radio_callback = intr_cb;
+    trace!("LINKLAYER_PLAT_SetupRadioIT: intr_cb={:?}", intr_cb);
-//   HAL_NVIC_SetPriority((IRQn_Type) RADIO_INTR_NUM, RADIO_INTR_PRIO_HIGH, 0);
+    store_callback(&RADIO_CALLBACK, intr_cb);
-//   HAL_NVIC_EnableIRQ((IRQn_Type) RADIO_INTR_NUM);
-// }
+    if intr_cb.is_some() {
-//
+        nvic_set_priority(mac::RADIO_INTR_NUM, pack_priority(mac::RADIO_INTR_PRIO_HIGH));
+        nvic_enable(mac::RADIO_INTR_NUM);
+    } else {
+        nvic_disable(mac::RADIO_INTR_NUM);
+    }
+}
 // /**
 //   * @brief  Initialize Link Layer SW low priority interrupt.
 //   * @param  intr_cb: function pointer to assign for the SW low priority ISR routine.
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_SetupSwLowIT(void (*intr_cb)())
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_SetupSwLowIT(intr_cb: Option<Callback>) {
-//   low_isr_callback = intr_cb;
+    trace!("LINKLAYER_PLAT_SetupSwLowIT: intr_cb={:?}", intr_cb);
-//
+    store_callback(&LOW_ISR_CALLBACK, intr_cb);
-//   HAL_NVIC_SetPriority((IRQn_Type) RADIO_SW_LOW_INTR_NUM, RADIO_SW_LOW_INTR_PRIO, 0);
-//   HAL_NVIC_EnableIRQ((IRQn_Type) RADIO_SW_LOW_INTR_NUM);
+    if intr_cb.is_some() {
-// }
+        nvic_set_priority(RADIO_SW_LOW_INTR_NUM, pack_priority(mac::RADIO_SW_LOW_INTR_PRIO));
-//
+        nvic_enable(RADIO_SW_LOW_INTR_NUM);
+    } else {
+        nvic_disable(RADIO_SW_LOW_INTR_NUM);
+    }
+}
 // /**
 //   * @brief  Trigger the link layer SW low interrupt.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_TriggerSwLowIT(uint8_t priority)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_TriggerSwLowIT(priority: u8) {
-//   uint8_t low_isr_priority = RADIO_INTR_PRIO_LOW;
+    trace!("LINKLAYER_PLAT_TriggerSwLowIT: priority={}", priority);
-//
+    let active = nvic_get_active(RADIO_SW_LOW_INTR_NUM);
-//   /* Check if a SW low interrupt as already been raised.
-//    * Nested call far radio low isr are not supported
+    //   /* Check if a SW low interrupt as already been raised.
-//    **/
+    //    * Nested call far radio low isr are not supported
-//
+    //    **/
-//   if(NVIC_GetActive(RADIO_SW_LOW_INTR_NUM) == 0)
+    if !active {
-//   {
+        let prio = if priority == 0 {
-//     /* No nested SW low ISR, default behavior */
+            //     /* No nested SW low ISR, default behavior */
-//
+            pack_priority(mac::RADIO_SW_LOW_INTR_PRIO)
-//     if(priority == 0)
+        } else {
-//     {
+            pack_priority(mac::RADIO_INTR_PRIO_LOW)
-//       low_isr_priority = RADIO_SW_LOW_INTR_PRIO;
+        };
-//     }
+        nvic_set_priority(RADIO_SW_LOW_INTR_NUM, prio);
-//
+    } else if priority != 0 {
-//     HAL_NVIC_SetPriority((IRQn_Type) RADIO_SW_LOW_INTR_NUM, low_isr_priority, 0);
+        //     /* Nested call detected */
-//   }
+        //     /* No change for SW radio low interrupt priority for the moment */
-//   else
+        //
-//   {
+        //     if(priority != 0)
-//     /* Nested call detected */
+        //     {
-//     /* No change for SW radio low interrupt priority for the moment */
+        //       /* At the end of current SW radio low ISR, this pending SW low interrupt
-//
+        //        * will run with RADIO_INTR_PRIO_LOW priority
-//     if(priority != 0)
+        //        **/
-//     {
+        //       radio_sw_low_isr_is_running_high_prio = 1;
-//       /* At the end of current SW radio low ISR, this pending SW low interrupt
+        //     }
-//        * will run with RADIO_INTR_PRIO_LOW priority
+        RADIO_SW_LOW_ISR_RUNNING_HIGH_PRIO.store(true, Ordering::Release);
-//        **/
+    }
-//       radio_sw_low_isr_is_running_high_prio = 1;
-//     }
+    nvic_set_pending(RADIO_SW_LOW_INTR_NUM);
-//   }
+}
-//
-//   HAL_NVIC_SetPendingIRQ((IRQn_Type) RADIO_SW_LOW_INTR_NUM);
-// }
-//
 // /**
 //   * @brief  Enable interrupts.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_EnableIRQ(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_EnableIRQ() {
-//   irq_counter = max(0,irq_counter-1);
+    trace!("LINKLAYER_PLAT_EnableIRQ");
-//
+    //   irq_counter = max(0,irq_counter-1);
-//   if(irq_counter == 0)
+    //
-//   {
+    //   if(irq_counter == 0)
-//     /* When irq_counter reaches 0, restore primask bit */
+    //   {
-//     __set_PRIMASK(primask_bit);
+    //     /* When irq_counter reaches 0, restore primask bit */
-//   }
+    //     __set_PRIMASK(primask_bit);
-// }
+    //   }
-//
+    if counter_release(&IRQ_COUNTER) {
+        // When the counter reaches zero, restore prior interrupt state using the captured token.
+        if let Some(token) = CS_RESTORE_STATE.take() {
+            critical_section::release(token);
+        }
+    }
+}
 // /**
 //   * @brief  Disable interrupts.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_DisableIRQ(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_DisableIRQ() {
-//   if(irq_counter == 0)
+    trace!("LINKLAYER_PLAT_DisableIRQ");
-//   {
+    //   if(irq_counter == 0)
-//     /* Save primask bit at first interrupt disablement */
+    //   {
-//     primask_bit= __get_PRIMASK();
+    //     /* Save primask bit at first interrupt disablement */
-//   }
+    //     primask_bit= __get_PRIMASK();
-//   __disable_irq();
+    //   }
-//   irq_counter ++;
+    //   __disable_irq();
-// }
+    //   irq_counter ++;
-//
+    if counter_acquire(&IRQ_COUNTER) {
+        // Capture and disable using critical-section API on first disable.
+        CS_RESTORE_STATE = Some(critical_section::acquire());
+    }
+}
 // /**
 //   * @brief  Enable specific interrupt group.
 //   * @param  isr_type: mask for interrupt group to enable.
@@ -380,43 +615,62 @@ fn test_fn() {}
 //   *              lower priority that link layer SW low interrupt.
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_EnableSpecificIRQ(uint8_t isr_type)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_EnableSpecificIRQ(isr_type: u8) {
-//   if( (isr_type & LL_HIGH_ISR_ONLY) != 0 )
+    trace!("LINKLAYER_PLAT_EnableSpecificIRQ: isr_type={}", isr_type);
-//   {
+    //   if( (isr_type & LL_HIGH_ISR_ONLY) != 0 )
-//     prio_high_isr_counter--;
+    //   {
-//     if(prio_high_isr_counter == 0)
+    //     prio_high_isr_counter--;
-//     {
+    //     if(prio_high_isr_counter == 0)
-//       /* When specific counter for link layer high ISR reaches 0, interrupt is enabled */
+    //     {
-//       HAL_NVIC_EnableIRQ(RADIO_INTR_NUM);
+    //       /* When specific counter for link layer high ISR reaches 0, interrupt is enabled */
-//       /* USER CODE BEGIN LINKLAYER_PLAT_EnableSpecificIRQ_1 */
+    //       HAL_NVIC_EnableIRQ(RADIO_INTR_NUM);
-//
+    //       /* USER CODE BEGIN LINKLAYER_PLAT_EnableSpecificIRQ_1 */
-//       /* USER CODE END LINKLAYER_PLAT_EnableSpecificIRQ_1 */
+    //
-//     }
+    //       /* USER CODE END LINKLAYER_PLAT_EnableSpecificIRQ_1 */
-//   }
+    //     }
-//
+    //   }
-//   if( (isr_type & LL_LOW_ISR_ONLY) != 0 )
+    //
-//   {
+    //   if( (isr_type & LL_LOW_ISR_ONLY) != 0 )
-//     prio_low_isr_counter--;
+    //   {
-//     if(prio_low_isr_counter == 0)
+    //     prio_low_isr_counter--;
-//     {
+    //     if(prio_low_isr_counter == 0)
-//       /* When specific counter for link layer SW low ISR reaches 0, interrupt is enabled */
+    //     {
-//       HAL_NVIC_EnableIRQ(RADIO_SW_LOW_INTR_NUM);
+    //       /* When specific counter for link layer SW low ISR reaches 0, interrupt is enabled */
-//     }
+    //       HAL_NVIC_EnableIRQ(RADIO_SW_LOW_INTR_NUM);
-//
+    //     }
-//   }
+    //
-//
+    //   }
-//   if( (isr_type & SYS_LOW_ISR) != 0 )
+    //
-//   {
+    //   if( (isr_type & SYS_LOW_ISR) != 0 )
-//     prio_sys_isr_counter--;
+    //   {
-//     if(prio_sys_isr_counter == 0)
+    //     prio_sys_isr_counter--;
-//     {
+    //     if(prio_sys_isr_counter == 0)
-//       /* Restore basepri value */
+    //     {
-//       __set_BASEPRI(local_basepri_value);
+    //       /* Restore basepri value */
-//     }
+    //       __set_BASEPRI(local_basepri_value);
-//   }
+    //     }
-// }
+    //   }
-//
+    if (isr_type & link_layer::LL_HIGH_ISR_ONLY as u8) != 0 {
+        if counter_release(&PRIO_HIGH_ISR_COUNTER) {
+            nvic_enable(mac::RADIO_INTR_NUM);
+        }
+    }
+    if (isr_type & link_layer::LL_LOW_ISR_ONLY as u8) != 0 {
+        if counter_release(&PRIO_LOW_ISR_COUNTER) {
+            nvic_enable(RADIO_SW_LOW_INTR_NUM);
+        }
+    }
+    if (isr_type & link_layer::SYS_LOW_ISR as u8) != 0 {
+        if counter_release(&PRIO_SYS_ISR_COUNTER) {
+            let stored = LOCAL_BASEPRI_VALUE.load(Ordering::Relaxed) as u8;
+            basepri::write(stored);
+        }
+    }
+}
 // /**
 //   * @brief  Disable specific interrupt group.
 //   * @param  isr_type: mask for interrupt group to disable.
@@ -427,219 +681,240 @@ fn test_fn() {}
 //   *              lower priority that link layer SW low interrupt.
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_DisableSpecificIRQ(uint8_t isr_type)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_DisableSpecificIRQ(isr_type: u8) {
-//   if( (isr_type & LL_HIGH_ISR_ONLY) != 0 )
+    //   if( (isr_type & LL_HIGH_ISR_ONLY) != 0 )
-//   {
+    //   {
-//     prio_high_isr_counter++;
+    //     prio_high_isr_counter++;
-//     if(prio_high_isr_counter == 1)
+    //     if(prio_high_isr_counter == 1)
-//     {
+    //     {
-//       /* USER CODE BEGIN LINKLAYER_PLAT_DisableSpecificIRQ_1 */
+    //       /* USER CODE BEGIN LINKLAYER_PLAT_DisableSpecificIRQ_1 */
-//
+    //
-//       /* USER CODE END LINKLAYER_PLAT_DisableSpecificIRQ_1 */
+    //       /* USER CODE END LINKLAYER_PLAT_DisableSpecificIRQ_1 */
-//       /* When specific counter for link layer high ISR value is 1, interrupt is disabled */
+    //       /* When specific counter for link layer high ISR value is 1, interrupt is disabled */
-//       HAL_NVIC_DisableIRQ(RADIO_INTR_NUM);
+    //       HAL_NVIC_DisableIRQ(RADIO_INTR_NUM);
-//     }
+    //     }
-//   }
+    //   }
-//
+    //
-//   if( (isr_type & LL_LOW_ISR_ONLY) != 0 )
+    //   if( (isr_type & LL_LOW_ISR_ONLY) != 0 )
-//   {
+    //   {
-//     prio_low_isr_counter++;
+    //     prio_low_isr_counter++;
-//     if(prio_low_isr_counter == 1)
+    //     if(prio_low_isr_counter == 1)
-//     {
+    //     {
-//       /* When specific counter for link layer SW low ISR value is 1, interrupt is disabled */
+    //       /* When specific counter for link layer SW low ISR value is 1, interrupt is disabled */
-//       HAL_NVIC_DisableIRQ(RADIO_SW_LOW_INTR_NUM);
+    //       HAL_NVIC_DisableIRQ(RADIO_SW_LOW_INTR_NUM);
-//     }
+    //     }
-//   }
+    //   }
-//
+    //
-//   if( (isr_type & SYS_LOW_ISR) != 0 )
+    //   if( (isr_type & SYS_LOW_ISR) != 0 )
-//   {
+    //   {
-//     prio_sys_isr_counter++;
+    //     prio_sys_isr_counter++;
-//     if(prio_sys_isr_counter == 1)
+    //     if(prio_sys_isr_counter == 1)
-//     {
+    //     {
-//       /* Save basepri register value */
+    //       /* Save basepri register value */
-//       local_basepri_value = __get_BASEPRI();
+    //       local_basepri_value = __get_BASEPRI();
-//
+    //
-//       /* Mask all other interrupts with lower priority that link layer SW low ISR */
+    //       /* Mask all other interrupts with lower priority that link layer SW low ISR */
-//       __set_BASEPRI_MAX(RADIO_INTR_PRIO_LOW<<4);
+    //       __set_BASEPRI_MAX(RADIO_INTR_PRIO_LOW<<4);
-//     }
+    //     }
-//   }
+    //   }
-// }
+    trace!("LINKLAYER_PLAT_DisableSpecificIRQ: isr_type={}", isr_type);
-//
+    if (isr_type & link_layer::LL_HIGH_ISR_ONLY as u8) != 0 {
+        if counter_acquire(&PRIO_HIGH_ISR_COUNTER) {
+            nvic_disable(mac::RADIO_INTR_NUM);
+        }
+    }
+    if (isr_type & link_layer::LL_LOW_ISR_ONLY as u8) != 0 {
+        if counter_acquire(&PRIO_LOW_ISR_COUNTER) {
+            nvic_disable(RADIO_SW_LOW_INTR_NUM);
+        }
+    }
+    if (isr_type & link_layer::SYS_LOW_ISR as u8) != 0 {
+        if counter_acquire(&PRIO_SYS_ISR_COUNTER) {
+            let current = basepri::read();
+            LOCAL_BASEPRI_VALUE.store(current.into(), Ordering::Relaxed);
+            set_basepri_max(pack_priority(mac::RADIO_INTR_PRIO_LOW));
+        }
+    }
+}
 // /**
 //   * @brief  Enable link layer high priority ISR only.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_EnableRadioIT(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_EnableRadioIT() {
-//   /* USER CODE BEGIN LINKLAYER_PLAT_EnableRadioIT_1 */
+    trace!("LINKLAYER_PLAT_EnableRadioIT");
-//
+    nvic_enable(mac::RADIO_INTR_NUM);
-//   /* USER CODE END LINKLAYER_PLAT_EnableRadioIT_1 */
+}
-//
-//   HAL_NVIC_EnableIRQ((IRQn_Type) RADIO_INTR_NUM);
-//
-//   /* USER CODE BEGIN LINKLAYER_PLAT_EnableRadioIT_2 */
-//
-//   /* USER CODE END LINKLAYER_PLAT_EnableRadioIT_2 */
-// }
-//
 // /**
 //   * @brief  Disable link layer high priority ISR only.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_DisableRadioIT(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_DisableRadioIT() {
-//   /* USER CODE BEGIN LINKLAYER_PLAT_DisableRadioIT_1 */
+    trace!("LINKLAYER_PLAT_DisableRadioIT");
-//
+    nvic_disable(mac::RADIO_INTR_NUM);
-//   /* USER CODE END LINKLAYER_PLAT_DisableRadioIT_1 */
+}
-//
-//   HAL_NVIC_DisableIRQ((IRQn_Type) RADIO_INTR_NUM);
-//
-//   /* USER CODE BEGIN LINKLAYER_PLAT_DisableRadioIT_2 */
-//
-//   /* USER CODE END LINKLAYER_PLAT_DisableRadioIT_2 */
-// }
-//
 // /**
 //   * @brief  Link Layer notification for radio activity start.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_StartRadioEvt(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_StartRadioEvt() {
-//   __HAL_RCC_RADIO_CLK_SLEEP_ENABLE();
+    trace!("LINKLAYER_PLAT_StartRadioEvt");
-//   NVIC_SetPriority(RADIO_INTR_NUM, RADIO_INTR_PRIO_HIGH);
+    //   __HAL_RCC_RADIO_CLK_SLEEP_ENABLE();
-// #if (CFG_SCM_SUPPORTED == 1)
+    //   NVIC_SetPriority(RADIO_INTR_NUM, RADIO_INTR_PRIO_HIGH);
-//   scm_notifyradiostate(SCM_RADIO_ACTIVE);
+    // #if (CFG_SCM_SUPPORTED == 1)
-// #endif /* CFG_SCM_SUPPORTED */
+    //   scm_notifyradiostate(SCM_RADIO_ACTIVE);
-// }
+    // #endif /* CFG_SCM_SUPPORTED */
-//
+    nvic_set_priority(mac::RADIO_INTR_NUM, pack_priority(mac::RADIO_INTR_PRIO_HIGH));
+    nvic_enable(mac::RADIO_INTR_NUM);
+}
 // /**
 //   * @brief  Link Layer notification for radio activity end.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_StopRadioEvt(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_StopRadioEvt() {
-//   __HAL_RCC_RADIO_CLK_SLEEP_DISABLE();
+    trace!("LINKLAYER_PLAT_StopRadioEvt");
-//   NVIC_SetPriority(RADIO_INTR_NUM, RADIO_INTR_PRIO_LOW);
+    // {
-// #if (CFG_SCM_SUPPORTED == 1)
+    //   __HAL_RCC_RADIO_CLK_SLEEP_DISABLE();
-//   scm_notifyradiostate(SCM_RADIO_NOT_ACTIVE);
+    //   NVIC_SetPriority(RADIO_INTR_NUM, RADIO_INTR_PRIO_LOW);
-// #endif /* CFG_SCM_SUPPORTED */
+    // #if (CFG_SCM_SUPPORTED == 1)
-// }
+    //   scm_notifyradiostate(SCM_RADIO_NOT_ACTIVE);
-//
+    // #endif /* CFG_SCM_SUPPORTED */
+    nvic_set_priority(mac::RADIO_INTR_NUM, pack_priority(mac::RADIO_INTR_PRIO_LOW));
+}
 // /**
 //   * @brief  Link Layer notification for RCO calibration start.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_RCOStartClbr(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_RCOStartClbr() {
-// #if (CFG_LPM_LEVEL != 0)
+    trace!("LINKLAYER_PLAT_RCOStartClbr");
-//   PWR_DisableSleepMode();
+    // #if (CFG_LPM_LEVEL != 0)
-//   /* Disabling stop mode prevents also from entering in standby */
+    //   PWR_DisableSleepMode();
-//   UTIL_LPM_SetStopMode(1U << CFG_LPM_LL_HW_RCO_CLBR, UTIL_LPM_DISABLE);
+    //   /* Disabling stop mode prevents also from entering in standby */
-// #endif /* (CFG_LPM_LEVEL != 0) */
+    //   UTIL_LPM_SetStopMode(1U << CFG_LPM_LL_HW_RCO_CLBR, UTIL_LPM_DISABLE);
-// #if (CFG_SCM_SUPPORTED == 1)
+    // #endif /* (CFG_LPM_LEVEL != 0) */
-//   scm_setsystemclock(SCM_USER_LL_HW_RCO_CLBR, HSE_32MHZ);
+    // #if (CFG_SCM_SUPPORTED == 1)
-//   while (LL_PWR_IsActiveFlag_VOS() == 0);
+    //   scm_setsystemclock(SCM_USER_LL_HW_RCO_CLBR, HSE_32MHZ);
-// #endif /* (CFG_SCM_SUPPORTED == 1) */
+    //   while (LL_PWR_IsActiveFlag_VOS() == 0);
-// }
+    // #endif /* (CFG_SCM_SUPPORTED == 1) */
-//
+}
 // /**
 //   * @brief  Link Layer notification for RCO calibration end.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_RCOStopClbr(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_RCOStopClbr() {
-// #if (CFG_LPM_LEVEL != 0)
+    trace!("LINKLAYER_PLAT_RCOStopClbr");
-//   PWR_EnableSleepMode();
+    // #if (CFG_LPM_LEVEL != 0)
-//   UTIL_LPM_SetStopMode(1U << CFG_LPM_LL_HW_RCO_CLBR, UTIL_LPM_ENABLE);
+    //   PWR_EnableSleepMode();
-// #endif /* (CFG_LPM_LEVEL != 0) */
+    //   UTIL_LPM_SetStopMode(1U << CFG_LPM_LL_HW_RCO_CLBR, UTIL_LPM_ENABLE);
-// #if (CFG_SCM_SUPPORTED == 1)
+    // #endif /* (CFG_LPM_LEVEL != 0) */
-//   scm_setsystemclock(SCM_USER_LL_HW_RCO_CLBR, HSE_16MHZ);
+    // #if (CFG_SCM_SUPPORTED == 1)
-// #endif /* (CFG_SCM_SUPPORTED == 1) */
+    //   scm_setsystemclock(SCM_USER_LL_HW_RCO_CLBR, HSE_16MHZ);
-// }
+    // #endif /* (CFG_SCM_SUPPORTED == 1) */
-//
+}
 // /**
 //   * @brief  Link Layer requests temperature.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_RequestTemperature(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_RequestTemperature() {
-// #if (USE_TEMPERATURE_BASED_RADIO_CALIBRATION == 1)
+    trace!("LINKLAYER_PLAT_RequestTemperature");
-//   ll_sys_bg_temperature_measurement();
+    // #if (USE_TEMPERATURE_BASED_RADIO_CALIBRATION == 1)
-// #endif /* USE_TEMPERATURE_BASED_RADIO_CALIBRATION */
+    //   ll_sys_bg_temperature_measurement();
-// }
+    // #endif /* USE_TEMPERATURE_BASED_RADIO_CALIBRATION */
-//
+}
 // /**
 //   * @brief  PHY Start calibration.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_PhyStartClbr(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_PhyStartClbr() {
-//   /* USER CODE BEGIN LINKLAYER_PLAT_PhyStartClbr_0 */
+    trace!("LINKLAYER_PLAT_PhyStartClbr");
-//
+}
-//   /* USER CODE END LINKLAYER_PLAT_PhyStartClbr_0 */
-//
-//   /* USER CODE BEGIN LINKLAYER_PLAT_PhyStartClbr_1 */
-//
-//   /* USER CODE END LINKLAYER_PLAT_PhyStartClbr_1 */
-// }
-//
 // /**
 //   * @brief  PHY Stop calibration.
 //   * @param  None
 //   * @retval None
 //   */
-// void LINKLAYER_PLAT_PhyStopClbr(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_PhyStopClbr() {
-//   /* USER CODE BEGIN LINKLAYER_PLAT_PhyStopClbr_0 */
+    trace!("LINKLAYER_PLAT_PhyStopClbr");
-//
+}
-//   /* USER CODE END LINKLAYER_PLAT_PhyStopClbr_0 */
-//
-//   /* USER CODE BEGIN LINKLAYER_PLAT_PhyStopClbr_1 */
-//
-//   /* USER CODE END LINKLAYER_PLAT_PhyStopClbr_1 */
-// }
-//
 // /**
 //  * @brief Notify the upper layer that new Link Layer timings have been applied.
 //  * @param evnt_timing[in]: Evnt_timing_t pointer to structure contains drift time , execution time and scheduling time
 //  * @retval None.
 //  */
-// void LINKLAYER_PLAT_SCHLDR_TIMING_UPDATE_NOT(Evnt_timing_t * p_evnt_timing)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_SCHLDR_TIMING_UPDATE_NOT(_timings: *const link_layer::Evnt_timing_t) {
-//   /* USER CODE BEGIN LINKLAYER_PLAT_SCHLDR_TIMING_UPDATE_NOT_0 */
+    trace!("LINKLAYER_PLAT_SCHLDR_TIMING_UPDATE_NOT: timings={:?}", _timings);
-//
+}
-//   /* USER CODE END LINKLAYER_PLAT_SCHLDR_TIMING_UPDATE_NOT_0 */
-// }
-//
 // /**
 //   * @brief  Get the ST company ID.
 //   * @param  None
 //   * @retval Company ID
 //   */
-// uint32_t LINKLAYER_PLAT_GetSTCompanyID(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_GetSTCompanyID() -> u32 {
-//   return LL_FLASH_GetSTCompanyID();
+    trace!("LINKLAYER_PLAT_GetSTCompanyID");
-// }
+    // STMicroelectronics Bluetooth SIG Company Identifier
-//
+    // TODO: Pull in update from latest stm32-generated-data
+    0x0030
+}
 // /**
 //   * @brief  Get the Unique Device Number (UDN).
 //   * @param  None
 //   * @retval UDN
 //   */
-// uint32_t LINKLAYER_PLAT_GetUDN(void)
+#[unsafe(no_mangle)]
-// {
+pub unsafe extern "C" fn LINKLAYER_PLAT_GetUDN() -> u32 {
-//   return LL_FLASH_GetUDN();
+    trace!("LINKLAYER_PLAT_GetUDN");
-// }
+    // Read the first 32 bits of the STM32 unique 96-bit ID
-//
+    let uid = embassy_stm32::uid::uid();
-// /* USER CODE BEGIN LINKLAYER_PLAT 0 */
+    u32::from_le_bytes([uid[0], uid[1], uid[2], uid[3]])
-//
+}
-// /* USER CODE END LINKLAYER_PLAT 0 */
+#[unsafe(no_mangle)]
+pub unsafe extern "C" fn LINKLAYER_DEBUG_SIGNAL_SET() {
+    trace!("LINKLAYER_DEBUG_SIGNAL_SET");
+    todo!()
+}
+#[unsafe(no_mangle)]
+pub unsafe extern "C" fn LINKLAYER_DEBUG_SIGNAL_RESET() {
+    trace!("LINKLAYER_DEBUG_SIGNAL_RESET");
+    todo!()
+}
+#[unsafe(no_mangle)]
+pub unsafe extern "C" fn LINKLAYER_DEBUG_SIGNAL_TOGGLE() {
+    trace!("LINKLAYER_DEBUG_SIGNAL_TOGGLE");
+    todo!()
+}
diff --git a/embassy-stm32/CHANGELOG.md b/embassy-stm32/CHANGELOG.md
index 38f22b1c3..ae2c0168b 100644
--- a/embassy-stm32/CHANGELOG.md
+++ b/embassy-stm32/CHANGELOG.md
@@ -6,6 +6,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
 and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
 ## Unreleased - ReleaseDate
+- Add `receive_waveform` method in `InputCapture`, allowing asynchronous input capture with DMA.
 - fix: stm32: GPDMA driver reset ignored during channel configuration
 - fix: stm32: SPI driver SSOE and SSM manegment, add `nss_output_disable` to SPI Config
@@ -72,6 +73,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - low-power: update rtc api to allow reconfig
 - adc: consolidate ringbuffer
 - feat: Added RTC low-power support for STM32WLEx ([#4716](https://github.com/embassy-rs/embassy/pull/4716))
+- feat: Added low-power support for STM32WL5x ([#5108](https://github.com/embassy-rs/embassy/pull/5108))
 - fix: Correct STM32WBA VREFBUFTRIM values
 - low_power: remove stop_with rtc and initialize in init if low-power feature enabled.
 - feat: stm32/dsi support zero parameter commands in `write_cmd` ([#4847](https://github.com/embassy-rs/embassy/pull/4847))
@@ -93,6 +95,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - stm32: Add blocking_listen for blocking I2C driver
 - fix: stm32l47*/stm32l48* adc analog pin setup
 - fix: keep stm32/sai: make NODIV independent of MCKDIV
+- fix: Source system clock from MSIS before (de)configuring PLLs on STM32U5
+- feat: adc: allow DMA reads to loop through enabled channels
 ## 0.4.0 - 2025-08-26
diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml
index 7989fc5d7..55eba2695 100644
--- a/embassy-stm32/Cargo.toml
+++ b/embassy-stm32/Cargo.toml
@@ -184,8 +184,8 @@ vcell = "0.1.3"
 nb = "1.0.0"
 stm32-fmc = "0.4.0"
 cfg-if = "1.0.0"
-embedded-io = { version = "0.6.0" }
+embedded-io = { version = "0.7.1" }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 chrono = { version = "^0.4", default-features = false, optional = true }
 bit_field = "0.10.2"
 trait-set = "0.3.0"
@@ -193,18 +193,20 @@ document-features = "0.2.7"
 static_assertions = { version = "1.1" }
 volatile-register = { version = "0.2.1" }
-bitflags = "2.4.2"
+bitflags = "2.10.0"
 block-device-driver = { version = "0.2" }
 aligned = "0.4.1"
 heapless = "0.9.1"
 #stm32-metapac = { version = "18" }
-stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-497fb3042b49b765d8974aac87b8ab4fa3566d74" }
+stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-c0123f4251e21282c3f26114d2f6f9360c1191f1" }
+#stm32-metapac = { path = "../../stm32-data/build/stm32-metapac" }
 [build-dependencies]
 #stm32-metapac = { version = "18", default-features = false, features = ["metadata"]}
-stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-497fb3042b49b765d8974aac87b8ab4fa3566d74", default-features = false, features = ["metadata"] }
+stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-c0123f4251e21282c3f26114d2f6f9360c1191f1", default-features = false, features = ["metadata"] }
+#stm32-metapac = { path = "../../stm32-data/build/stm32-metapac", default-features = false, features = ["metadata"] }
 proc-macro2 = "1.0.36"
 quote = "1.0.15"
@@ -228,7 +230,7 @@ defmt = [
    "embassy-sync/defmt",
    "embassy-embedded-hal/defmt",
    "embassy-hal-internal/defmt",
-    "embedded-io-async/defmt-03",
+    "embedded-io-async/defmt",
    "embassy-usb-driver/defmt",
    "embassy-net-driver/defmt",
    "embassy-time?/defmt",
@@ -241,8 +243,9 @@ log = ["dep:log"]
 chrono = ["dep:chrono"]
 exti = []
-low-power = [ "dep:embassy-executor", "embassy-executor?/arch-cortex-m", "time" ]
+low-power = [ "dep:embassy-executor", "time", "chrono" ]
-low-power-debug-with-sleep = []
+low-power-pender = [ "low-power" ]
+low-power-debug-with-sleep = [ "low-power" ]
 ## Automatically generate `memory.x` file based on the memory map from [`stm32-metapac`](https://docs.rs/stm32-metapac/)
 memory-x = []
diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs
index 46d6290e7..a3b863340 100644
--- a/embassy-stm32/build.rs
+++ b/embassy-stm32/build.rs
@@ -950,6 +950,60 @@ fn main() {
            }
        }
+        if kind == "gpio" {
+            for p in METADATA.peripherals {
+                // set all GPIOs to analog mode except for PA13 and PA14 which are SWDIO and SWDCLK
+                if p.registers.is_some()
+                    && p.registers.as_ref().unwrap().kind == "gpio"
+                    && p.registers.as_ref().unwrap().version != "v1"
+                {
+                    let port = format_ident!("{}", p.name);
+                    if p.name == "GPIOA" {
+                        gg.extend(quote! {
+                            // leave PA13 and PA14 as unchanged
+                            crate::pac::#port.moder().modify(|w| {
+                                w.set_moder(0, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(1, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(2, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(3, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(4, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(5, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(6, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(7, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(8, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(9, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(10, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(11, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(12, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(15, crate::pac::gpio::vals::Moder::ANALOG);
+                            });
+                        });
+                    } else {
+                        gg.extend(quote! {
+                            crate::pac::#port.moder().modify(|w| {
+                                w.set_moder(0, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(1, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(2, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(3, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(4, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(5, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(6, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(7, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(8, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(9, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(10, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(11, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(12, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(13, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(14, crate::pac::gpio::vals::Moder::ANALOG);
+                                w.set_moder(15, crate::pac::gpio::vals::Moder::ANALOG);
+                            });
+                        });
+                    }
+                }
+            }
+        }
        let fname = format_ident!("init_{}", kind);
        g.extend(quote! {
            pub unsafe fn #fname(){
diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs
index da432f6ce..17b1dae77 100644
--- a/embassy-stm32/src/adc/mod.rs
+++ b/embassy-stm32/src/adc/mod.rs
@@ -214,7 +214,7 @@ impl<'d, T: Instance> Adc<'d, T> {
    #[cfg(any(adc_g4, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_c0))]
    /// Read one or multiple ADC regular channels using DMA.
    ///
-    /// `sequence` iterator and `readings` must have the same length.
+    /// `readings` must have a length that is a multiple of the length of the `sequence` iterator.
    ///
    /// Example
    /// ```rust,ignore
@@ -253,8 +253,8 @@ impl<'d, T: Instance> Adc<'d, T> {
    ) {
        assert!(sequence.len() != 0, "Asynchronous read sequence cannot be empty");
        assert!(
-            sequence.len() == readings.len(),
+            readings.len() % sequence.len() == 0,
-            "Sequence length must be equal to readings length"
+            "Readings length must be a multiple of sequence length"
        );
        assert!(
            sequence.len() <= 16,
diff --git a/embassy-stm32/src/hsem/mod.rs b/embassy-stm32/src/hsem/mod.rs
index b5fa3c897..e5c68acbd 100644
--- a/embassy-stm32/src/hsem/mod.rs
+++ b/embassy-stm32/src/hsem/mod.rs
@@ -94,17 +94,14 @@ pub struct HardwareSemaphoreInterruptHandler<T: Instance> {
 impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for HardwareSemaphoreInterruptHandler<T> {
    unsafe fn on_interrupt() {
        let core_id = CoreId::current();
+        let isr = T::regs().isr(core_id.to_index()).read();
        for number in 0..5 {
-            if T::regs().isr(core_id.to_index()).read().isf(number as usize) {
+            if isr.isf(number as usize) {
                T::regs()
                    .icr(core_id.to_index())
                    .write(|w| w.set_isc(number as usize, true));
-                T::regs()
-                    .ier(core_id.to_index())
-                    .modify(|w| w.set_ise(number as usize, false));
                T::state().waker_for(number).wake();
            }
        }
@@ -120,6 +117,18 @@ pub struct HardwareSemaphoreMutex<'a, T: Instance> {
 impl<'a, T: Instance> Drop for HardwareSemaphoreMutex<'a, T> {
    fn drop(&mut self) {
+        let core_id = CoreId::current();
+        T::regs()
+            .icr(core_id.to_index())
+            .write(|w| w.set_isc(self.index as usize, true));
+        critical_section::with(|_| {
+            T::regs()
+                .ier(core_id.to_index())
+                .modify(|w| w.set_ise(self.index as usize, false));
+        });
        HardwareSemaphoreChannel::<'a, T> {
            index: self.index,
            _lifetime: PhantomData,
@@ -156,9 +165,11 @@ impl<'a, T: Instance> HardwareSemaphoreChannel<'a, T> {
            compiler_fence(Ordering::SeqCst);
-            T::regs()
+            critical_section::with(|_| {
-                .ier(core_id.to_index())
+                T::regs()
-                .modify(|w| w.set_ise(self.index as usize, true));
+                    .ier(core_id.to_index())
+                    .modify(|w| w.set_ise(self.index as usize, true));
+            });
            match self.try_lock(process_id) {
                Some(mutex) => Poll::Ready(mutex),
diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs
index 0bf430ffc..0aa2d1da9 100644
--- a/embassy-stm32/src/i2c/mod.rs
+++ b/embassy-stm32/src/i2c/mod.rs
@@ -129,7 +129,7 @@ impl<'d> Drop for I2CDropGuard<'d> {
            x.set_as_disconnected()
        }
-        self.info.rcc.disable();
+        self.info.rcc.disable_without_stop();
    }
 }
diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs
index 2f783bf64..a0b2f045c 100644
--- a/embassy-stm32/src/lib.rs
+++ b/embassy-stm32/src/lib.rs
@@ -138,6 +138,9 @@ pub mod wdg;
 #[cfg(xspi)]
 pub mod xspi;
+#[cfg(feature = "low-power")]
+pub use low_power::Executor;
 // This must go last, so that it sees all the impl_foo! macros defined earlier.
 pub(crate) mod _generated {
    #![allow(dead_code)]
diff --git a/embassy-stm32/src/low_power.rs b/embassy-stm32/src/low_power.rs
index 2388abe3c..71befcf34 100644
--- a/embassy-stm32/src/low_power.rs
+++ b/embassy-stm32/src/low_power.rs
@@ -3,31 +3,31 @@
 //! The STM32 line of microcontrollers support various deep-sleep modes which exploit clock-gating
 //! to reduce power consumption. `embassy-stm32` provides a low-power executor, [`Executor`] which
 //! can use knowledge of which peripherals are currently blocked upon to transparently and safely
-//! enter such low-power modes (currently, only `STOP2`) when idle.
+//! enter such low-power modes including `STOP1` and `STOP2` when idle.
 //!
 //! The executor determines which peripherals are active by their RCC state; consequently,
-//! low-power states can only be entered if all peripherals have been `drop`'d. There are a few
+//! low-power states can only be entered if peripherals which block stop have been `drop`'d and if
-//! exceptions to this rule:
+//! peripherals that do not block stop are busy. Peripherals which never block stop include:
 //!
 //!  * `GPIO`
 //!  * `RTC`
 //!
+//! Other peripherals which block stop when busy include (this list may be stale):
+//!
+//!  * `I2C`
+//!  * `USART`
+//!
 //! Since entering and leaving low-power modes typically incurs a significant latency, the
 //! low-power executor will only attempt to enter when the next timer event is at least
-//! [`time_driver::min_stop_pause`] in the future.
+//! [`config.min_stop_pause`] in the future.
 //!
-//! Currently there is no macro analogous to `embassy_executor::main` for this executor;
-//! consequently one must define their entrypoint manually. Moreover, you must relinquish control
-//! of the `RTC` peripheral to the executor. This will typically look like
 //!
 //! ```rust,no_run
 //! use embassy_executor::Spawner;
-//! use embassy_stm32::low_power;
-//! use embassy_stm32::rtc::{Rtc, RtcConfig};
 //! use embassy_time::Duration;
 //!
-//! #[embassy_executor::main(executor = "low_power::Executor")]
+//! #[embassy_executor::main(executor = "embassy_stm32::Executor", entry = "cortex_m_rt::entry")]
-//! async fn async_main(spawner: Spawner) {
+//! async fn main(spawner: Spawner) {
 //!     // initialize the platform...
 //!     let mut config = embassy_stm32::Config::default();
 //!     // the default value, but can be adjusted
@@ -43,7 +43,7 @@
 use core::arch::asm;
 use core::marker::PhantomData;
 use core::mem;
-use core::sync::atomic::{Ordering, compiler_fence};
+use core::sync::atomic::{AtomicBool, Ordering, compiler_fence};
 use cortex_m::peripheral::SCB;
 use critical_section::CriticalSection;
@@ -56,7 +56,27 @@ use crate::time_driver::get_driver;
 const THREAD_PENDER: usize = usize::MAX;
-static mut EXECUTOR_TAKEN: bool = false;
+static EXECUTOR_TAKEN: AtomicBool = AtomicBool::new(false);
+#[cfg(feature = "low-power-pender")]
+static TASKS_PENDING: AtomicBool = AtomicBool::new(false);
+#[cfg(feature = "low-power-pender")]
+#[unsafe(export_name = "__pender")]
+fn __pender(context: *mut ()) {
+    unsafe {
+        // Safety: `context` is either `usize::MAX` created by `Executor::run`, or a valid interrupt
+        // request number given to `InterruptExecutor::start`.
+        let context = context as usize;
+        // Try to make Rust optimize the branching away if we only use thread mode.
+        if context == THREAD_PENDER {
+            TASKS_PENDING.store(true, Ordering::Release);
+            core::arch::asm!("sev");
+            return;
+        }
+    }
+}
 /// Prevent the device from going into the stop mode if held
 pub struct DeviceBusy {
@@ -116,17 +136,17 @@ pub fn stop_ready(stop_mode: StopMode) -> bool {
    })
 }
-#[cfg(any(stm32l4, stm32l5, stm32u5, stm32wba, stm32wb, stm32wlex, stm32u0))]
+#[cfg(any(stm32l4, stm32l5, stm32u5, stm32wba, stm32wb, stm32wl, stm32u0))]
 use crate::pac::pwr::vals::Lpms;
-#[cfg(any(stm32l4, stm32l5, stm32u5, stm32wba, stm32wb, stm32wlex, stm32u0))]
+#[cfg(any(stm32l4, stm32l5, stm32u5, stm32wba, stm32wb, stm32wl, stm32u0))]
 impl Into<Lpms> for StopMode {
    fn into(self) -> Lpms {
        match self {
            StopMode::Stop1 => Lpms::STOP1,
-            #[cfg(not(any(stm32wb, stm32wba)))]
+            #[cfg(not(stm32wba))]
            StopMode::Standby | StopMode::Stop2 => Lpms::STOP2,
-            #[cfg(any(stm32wb, stm32wba))]
+            #[cfg(stm32wba)]
            StopMode::Standby | StopMode::Stop2 => Lpms::STOP1, // TODO: WBA has no STOP2?
        }
    }
@@ -150,12 +170,10 @@ pub struct Executor {
 impl Executor {
    /// Create a new Executor.
    pub fn new() -> Self {
-        unsafe {
+        if EXECUTOR_TAKEN.load(Ordering::Acquire) {
-            if EXECUTOR_TAKEN {
+            panic!("Low power executor can only be taken once.");
-                panic!("Low power executor can only be taken once.");
+        } else {
-            } else {
+            EXECUTOR_TAKEN.store(true, Ordering::Release);
-                EXECUTOR_TAKEN = true;
-            }
        }
        Self {
@@ -166,28 +184,61 @@ impl Executor {
    pub(crate) unsafe fn on_wakeup_irq_or_event() {
        if !get_driver().is_stopped() {
+            trace!("low power: time driver not stopped!");
            return;
        }
        critical_section::with(|cs| {
-            #[cfg(stm32wlex)]
+            #[cfg(any(stm32wl, stm32wb))]
            {
                let es = crate::pac::PWR.extscr().read();
+                #[cfg(stm32wl)]
                match (es.c1stopf(), es.c1stop2f()) {
-                    (true, false) => debug!("low power: wake from STOP1"),
+                    (true, false) => debug!("low power: cpu1 wake from STOP1"),
-                    (false, true) => debug!("low power: wake from STOP2"),
+                    (false, true) => debug!("low power: cpu1 wake from STOP2"),
-                    (true, true) => debug!("low power: wake from STOP1 and STOP2 ???"),
+                    (true, true) => debug!("low power: cpu1 wake from STOP1 and STOP2 ???"),
+                    (false, false) => trace!("low power: cpu1 stop mode not entered"),
+                };
+                #[cfg(stm32wl5x)]
+                // TODO: only for the current cpu
+                match (es.c2stopf(), es.c2stop2f()) {
+                    (true, false) => debug!("low power: cpu2 wake from STOP1"),
+                    (false, true) => debug!("low power: cpu2 wake from STOP2"),
+                    (true, true) => debug!("low power: cpu2 wake from STOP1 and STOP2 ???"),
+                    (false, false) => trace!("low power: cpu2 stop mode not entered"),
+                };
+                #[cfg(stm32wb)]
+                match (es.c1stopf(), es.c2stopf()) {
+                    (true, false) => debug!("low power: cpu1 wake from STOP"),
+                    (false, true) => debug!("low power: cpu2 wake from STOP"),
+                    (true, true) => debug!("low power: cpu1 and cpu2 wake from STOP"),
                    (false, false) => trace!("low power: stop mode not entered"),
                };
-                crate::pac::PWR.extscr().modify(|w| {
-                    w.set_c1cssf(false);
-                });
-                if es.c1stop2f() || es.c1stopf() {
+                let _has_stopped2 = {
+                    #[cfg(stm32wb)]
+                    {
+                        es.c2stopf()
+                    }
+                    #[cfg(stm32wlex)]
+                    {
+                        es.c1stop2f()
+                    }
+                    #[cfg(stm32wl5x)]
+                    {
+                        // TODO: I think we could just use c1stop2f() here as it won't enter a stop mode unless BOTH cpus will enter it.
+                        es.c1stop2f() | es.c2stop2f()
+                    }
+                };
+                #[cfg(not(stm32wb))]
+                if es.c1stopf() || _has_stopped2 {
                    // when we wake from any stop mode we need to re-initialize the rcc
                    crate::rcc::init(RCC_CONFIG.unwrap());
+                    if _has_stopped2 {
-                    if es.c1stop2f() {
                        // when we wake from STOP2, we need to re-initialize the time driver
                        get_driver().init_timer(cs);
                        // reset the refcounts for STOP2 and STOP1 (initializing the time driver will increment one of them for the timer)
@@ -196,6 +247,13 @@ impl Executor {
                        REFCOUNT_STOP1 = 0;
                    }
                }
+                // Clear all stop flags
+                #[cfg(stm32wl)]
+                crate::pac::PWR.extscr().modify(|w| {
+                    w.set_c1cssf(true);
+                    #[cfg(stm32wl5x)]
+                    w.set_c2cssf(true);
+                });
            }
            get_driver().resume_time(cs);
@@ -276,6 +334,20 @@ impl Executor {
        drop(sem3_mutex);
+        // on PWR
+        RCC.apb1enr1().modify(|r| r.0 |= 1 << 28);
+        cortex_m::asm::dsb();
+        // off SMPS, on Bypass
+        PWR.cr5().modify(|r| {
+            let mut val = r.0;
+            val &= !(1 << 15); // sdeb = 0 (off SMPS)
+            val |= 1 << 14; // sdben = 1 (on Bypass)
+            r.0 = val
+        });
+        cortex_m::asm::delay(1000);
        Ok(())
    }
@@ -284,7 +356,7 @@ impl Executor {
        #[cfg(all(stm32wb, feature = "low-power"))]
        self.configure_stop_stm32wb(_cs)?;
-        #[cfg(any(stm32l4, stm32l5, stm32u5, stm32u0, stm32wb, stm32wba, stm32wlex))]
+        #[cfg(any(stm32l4, stm32l5, stm32u5, stm32u0, stm32wb, stm32wba, stm32wl))]
        crate::pac::PWR.cr1().modify(|m| m.set_lpms(stop_mode.into()));
        #[cfg(stm32h5)]
        crate::pac::PWR.pmcr().modify(|v| {
@@ -299,12 +371,21 @@ impl Executor {
    fn configure_pwr(&self) {
        Self::get_scb().clear_sleepdeep();
        // Clear any previous stop flags
-        #[cfg(stm32wlex)]
+        #[cfg(stm32wl)]
        crate::pac::PWR.extscr().modify(|w| {
            w.set_c1cssf(true);
+            #[cfg(stm32wl5x)]
+            w.set_c2cssf(true);
        });
-        compiler_fence(Ordering::SeqCst);
+        #[cfg(feature = "low-power-pender")]
+        if TASKS_PENDING.load(Ordering::Acquire) {
+            TASKS_PENDING.store(false, Ordering::Release);
+            return;
+        }
+        compiler_fence(Ordering::Acquire);
        critical_section::with(|cs| {
            let _ = unsafe { RCC_CONFIG }?;
diff --git a/embassy-stm32/src/rcc/c0.rs b/embassy-stm32/src/rcc/c0.rs
index 99f22273d..7801078c3 100644
--- a/embassy-stm32/src/rcc/c0.rs
+++ b/embassy-stm32/src/rcc/c0.rs
@@ -185,6 +185,12 @@ pub(crate) unsafe fn init(config: Config) {
        RCC.cr().modify(|w| w.set_hsion(false));
    }
+    // Disable the HSI48, if not used
+    #[cfg(crs)]
+    if config.hsi48.is_none() {
+        super::disable_hsi48();
+    }
    config.mux.init();
    set_clocks!(
diff --git a/embassy-stm32/src/rcc/f013.rs b/embassy-stm32/src/rcc/f013.rs
index 1155b6acd..92cf9fca7 100644
--- a/embassy-stm32/src/rcc/f013.rs
+++ b/embassy-stm32/src/rcc/f013.rs
@@ -480,6 +480,12 @@ pub(crate) unsafe fn init(config: Config) {
    };
     */
+    // Disable the HSI48, if not used
+    #[cfg(crs)]
+    if config.hsi48.is_none() {
+        super::disable_hsi48();
+    }
    config.mux.init();
    set_clocks!(
diff --git a/embassy-stm32/src/rcc/g0.rs b/embassy-stm32/src/rcc/g0.rs
index ce6398afd..2665c20f9 100644
--- a/embassy-stm32/src/rcc/g0.rs
+++ b/embassy-stm32/src/rcc/g0.rs
@@ -294,6 +294,12 @@ pub(crate) unsafe fn init(config: Config) {
        RCC.cr().modify(|w| w.set_hsion(false));
    }
+    // Disable the HSI48, if not used
+    #[cfg(crs)]
+    if config.hsi48.is_none() {
+        super::disable_hsi48();
+    }
    if config.low_power_run {
        assert!(sys <= Hertz(2_000_000));
        PWR.cr1().modify(|w| w.set_lpr(true));
diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs
index da13e16aa..0dd3713c8 100644
--- a/embassy-stm32/src/rcc/g4.rs
+++ b/embassy-stm32/src/rcc/g4.rs
@@ -300,6 +300,12 @@ pub(crate) unsafe fn init(config: Config) {
        RCC.cr().modify(|w| w.set_hsion(false));
    }
+    // Disable the HSI48, if not used
+    #[cfg(crs)]
+    if config.hsi48.is_none() {
+        super::disable_hsi48();
+    }
    if config.low_power_run {
        assert!(sys <= Hertz(2_000_000));
        PWR.cr1().modify(|w| w.set_lpr(true));
diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs
index 485edd390..2fe2a435c 100644
--- a/embassy-stm32/src/rcc/h.rs
+++ b/embassy-stm32/src/rcc/h.rs
@@ -671,6 +671,12 @@ pub(crate) unsafe fn init(config: Config) {
        RCC.cr().modify(|w| w.set_hsion(false));
    }
+    // Disable the HSI48, if not used
+    #[cfg(crs)]
+    if config.hsi48.is_none() {
+        super::disable_hsi48();
+    }
    // IO compensation cell - Requires CSI clock and SYSCFG
    #[cfg(any(stm32h7))] // TODO h5, h7rs
    if csi.is_some() {
diff --git a/embassy-stm32/src/rcc/hsi48.rs b/embassy-stm32/src/rcc/hsi48.rs
index 49be4af5e..50ac162a4 100644
--- a/embassy-stm32/src/rcc/hsi48.rs
+++ b/embassy-stm32/src/rcc/hsi48.rs
@@ -66,3 +66,24 @@ pub(crate) fn init_hsi48(config: Hsi48Config) -> Hertz {
    HSI48_FREQ
 }
+pub(crate) fn disable_hsi48() {
+    // disable CRS if it is enabled
+    rcc::disable::<crate::peripherals::CRS>();
+    // Disable HSI48
+    #[cfg(not(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba, stm32f0, stm32c071)))]
+    let r = RCC.crrcr();
+    #[cfg(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba, stm32c071))]
+    let r = RCC.cr();
+    #[cfg(any(stm32f0))]
+    let r = RCC.cr2();
+    r.modify(|w| w.set_hsi48on(false));
+    // Disable VREFINT reference for HSI48 oscillator
+    #[cfg(stm32l0)]
+    crate::pac::SYSCFG.cfgr3().modify(|w| {
+        w.set_enref_hsi48(false);
+    });
+}
diff --git a/embassy-stm32/src/rcc/l.rs b/embassy-stm32/src/rcc/l.rs
index 0d668103c..55f383374 100644
--- a/embassy-stm32/src/rcc/l.rs
+++ b/embassy-stm32/src/rcc/l.rs
@@ -385,6 +385,17 @@ pub(crate) unsafe fn init(config: Config) {
        while !RCC.extcfgr().read().c2hpref() {}
    }
+    // Disable HSI if not used
+    if !config.hsi {
+        RCC.cr().modify(|w| w.set_hsion(false));
+    }
+    // Disable the HSI48, if not used
+    #[cfg(crs)]
+    if config.hsi48.is_none() {
+        super::disable_hsi48();
+    }
    config.mux.init();
    set_clocks!(
diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs
index 2a9a1595a..c0a50615e 100644
--- a/embassy-stm32/src/rcc/mod.rs
+++ b/embassy-stm32/src/rcc/mod.rs
@@ -312,6 +312,15 @@ impl RccInfo {
    }
    #[allow(dead_code)]
+    fn increment_minimum_stop_refcount_with_cs(&self, _cs: CriticalSection) {
+        #[cfg(all(any(stm32wl, stm32wb), feature = "low-power"))]
+        match self.stop_mode {
+            StopMode::Stop1 | StopMode::Stop2 => increment_stop_refcount(_cs, StopMode::Stop2),
+            _ => {}
+        }
+    }
+    #[allow(dead_code)]
    pub(crate) fn increment_stop_refcount(&self) {
        #[cfg(feature = "low-power")]
        critical_section::with(|cs| self.increment_stop_refcount_with_cs(cs))
@@ -324,6 +333,15 @@ impl RccInfo {
    }
    #[allow(dead_code)]
+    fn decrement_minimum_stop_refcount_with_cs(&self, _cs: CriticalSection) {
+        #[cfg(all(any(stm32wl, stm32wb), feature = "low-power"))]
+        match self.stop_mode {
+            StopMode::Stop1 | StopMode::Stop2 => decrement_stop_refcount(_cs, StopMode::Stop2),
+            _ => {}
+        }
+    }
+    #[allow(dead_code)]
    pub(crate) fn decrement_stop_refcount(&self) {
        #[cfg(feature = "low-power")]
        critical_section::with(|cs| self.decrement_stop_refcount_with_cs(cs))
@@ -339,7 +357,10 @@ impl RccInfo {
    #[allow(dead_code)]
    pub(crate) fn enable_and_reset_without_stop(&self) {
-        critical_section::with(|cs| self.enable_and_reset_with_cs(cs))
+        critical_section::with(|cs| {
+            self.enable_and_reset_with_cs(cs);
+            self.increment_minimum_stop_refcount_with_cs(cs);
+        })
    }
    // TODO: should this be `unsafe`?
@@ -353,7 +374,10 @@ impl RccInfo {
    // TODO: should this be `unsafe`?
    #[allow(dead_code)]
    pub(crate) fn disable_without_stop(&self) {
-        critical_section::with(|cs| self.disable_with_cs(cs))
+        critical_section::with(|cs| {
+            self.disable_with_cs(cs);
+            self.decrement_minimum_stop_refcount_with_cs(cs);
+        })
    }
    #[allow(dead_code)]
diff --git a/embassy-stm32/src/rcc/u5.rs b/embassy-stm32/src/rcc/u5.rs
index 7b0dcb63f..9f37107a3 100644
--- a/embassy-stm32/src/rcc/u5.rs
+++ b/embassy-stm32/src/rcc/u5.rs
@@ -343,6 +343,16 @@ pub(crate) unsafe fn init(config: Config) {
    let hsi48 = config.hsi48.map(super::init_hsi48);
+    // There's a possibility that a bootloader that ran before us has configured the system clock
+    // source to be PLL1_R. In that case we'd get forever stuck on (de)configuring PLL1 as the chip
+    // prohibits disabling PLL1 when it's used as a source for system clock. Change the system
+    // clock source to MSIS which doesn't suffer from this conflict. The correct source per the
+    // provided config is then set further down.
+    // See https://github.com/embassy-rs/embassy/issues/5072
+    let default_system_clock_source = Config::default().sys;
+    RCC.cfgr1().modify(|w| w.set_sw(default_system_clock_source));
+    while RCC.cfgr1().read().sws() != default_system_clock_source {}
    let pll_input = PllInput { hse, hsi, msi: msis };
    let pll1 = init_pll(PllInstance::Pll1, config.pll1, &pll_input, config.voltage_range);
    let pll2 = init_pll(PllInstance::Pll2, config.pll2, &pll_input, config.voltage_range);
@@ -457,6 +467,17 @@ pub(crate) unsafe fn init(config: Config) {
    let lse = config.ls.lse.map(|l| l.frequency);
    let lsi = config.ls.lsi.then_some(LSI_FREQ);
+    // Disable HSI if not used
+    if !config.hsi {
+        RCC.cr().modify(|w| w.set_hsion(false));
+    }
+    // Disable the HSI48, if not used
+    #[cfg(crs)]
+    if config.hsi48.is_none() {
+        super::disable_hsi48();
+    }
    config.mux.init();
    set_clocks!(
diff --git a/embassy-stm32/src/rcc/wba.rs b/embassy-stm32/src/rcc/wba.rs
index 2528996d5..4ab3067bc 100644
--- a/embassy-stm32/src/rcc/wba.rs
+++ b/embassy-stm32/src/rcc/wba.rs
@@ -269,6 +269,11 @@ pub(crate) unsafe fn init(config: Config) {
    let lsi = config.ls.lsi.then_some(LSI_FREQ);
+    // Disable HSI if not used
+    if !config.hsi {
+        RCC.cr().modify(|w| w.set_hsion(false));
+    }
    config.mux.init();
    set_clocks!(
diff --git a/embassy-stm32/src/rng.rs b/embassy-stm32/src/rng.rs
index dada9bda1..b8dfc7ecf 100644
--- a/embassy-stm32/src/rng.rs
+++ b/embassy-stm32/src/rng.rs
@@ -13,6 +13,23 @@ use crate::{Peri, interrupt, pac, peripherals, rcc};
 static RNG_WAKER: AtomicWaker = AtomicWaker::new();
+/// WBA-specific health test configuration values for RNG
+#[derive(Clone, Copy)]
+#[allow(dead_code)]
+enum Htcfg {
+    /// WBA-specific health test configuration (0x0000AAC7)
+    /// Corresponds to configuration A, B, and C thresholds as recommended in the reference manual
+    WbaRecommended = 0x0000_AAC7,
+}
+impl Htcfg {
+    /// Convert to the raw u32 value for register access
+    #[allow(dead_code)]
+    fn value(self) -> u32 {
+        self as u32
+    }
+}
 /// RNG error
 #[derive(Debug, PartialEq, Eq, Clone, Copy)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
@@ -100,7 +117,7 @@ impl<'d, T: Instance> Rng<'d, T> {
        // wait for CONDRST to be set
        while !T::regs().cr().read().condrst() {}
-        // TODO for WBA6, the HTCR reg is different
+        // Set health test configuration values
        #[cfg(not(rng_wba6))]
        {
            // magic number must be written immediately before every read or write access to HTCR
@@ -111,6 +128,12 @@ impl<'d, T: Instance> Rng<'d, T> {
                .htcr()
                .write(|w| w.set_htcfg(pac::rng::vals::Htcfg::RECOMMENDED));
        }
+        #[cfg(rng_wba6)]
+        {
+            // For WBA6, set RNG_HTCR0 to the recommended value for configurations A, B, and C
+            // This value corresponds to the health test thresholds specified in the reference manual
+            T::regs().htcr(0).write(|w| w.0 = Htcfg::WbaRecommended.value());
+        }
        // finish conditioning
        T::regs().cr().modify(|reg| {
diff --git a/embassy-stm32/src/rtc/low_power.rs b/embassy-stm32/src/rtc/low_power.rs
index f049d6b12..e15eddc22 100644
--- a/embassy-stm32/src/rtc/low_power.rs
+++ b/embassy-stm32/src/rtc/low_power.rs
@@ -1,64 +1,12 @@
-#[cfg(feature = "time")]
+use chrono::{DateTime, NaiveDateTime, TimeDelta, Utc};
-use embassy_time::{Duration, TICK_HZ};
+use embassy_time::{Duration, Instant, TICK_HZ};
-use super::{DateTimeError, Rtc, RtcError, bcd2_to_byte};
+use super::Rtc;
 use crate::interrupt::typelevel::Interrupt;
 use crate::pac::rtc::vals::Wucksel;
 use crate::peripherals::RTC;
 use crate::rtc::{RtcTimeProvider, SealedInstance};
-/// Represents an instant in time that can be substracted to compute a duration
-pub(super) struct RtcInstant {
-    /// 0..59
-    second: u8,
-    /// 0..256
-    subsecond: u16,
-}
-impl RtcInstant {
-    #[cfg(not(rtc_v2_f2))]
-    const fn from(second: u8, subsecond: u16) -> Result<Self, DateTimeError> {
-        if second > 59 {
-            Err(DateTimeError::InvalidSecond)
-        } else {
-            Ok(Self { second, subsecond })
-        }
-    }
-}
-#[cfg(feature = "defmt")]
-impl defmt::Format for RtcInstant {
-    fn format(&self, fmt: defmt::Formatter) {
-        defmt::write!(
-            fmt,
-            "{}:{}",
-            self.second,
-            RTC::regs().prer().read().prediv_s() - self.subsecond,
-        )
-    }
-}
-#[cfg(feature = "time")]
-impl core::ops::Sub for RtcInstant {
-    type Output = embassy_time::Duration;
-    fn sub(self, rhs: Self) -> Self::Output {
-        let second = if self.second < rhs.second {
-            self.second + 60
-        } else {
-            self.second
-        };
-        let psc = RTC::regs().prer().read().prediv_s() as u32;
-        let self_ticks = second as u32 * (psc + 1) + (psc - self.subsecond as u32);
-        let other_ticks = rhs.second as u32 * (psc + 1) + (psc - rhs.subsecond as u32);
-        let rtc_ticks = self_ticks - other_ticks;
-        Duration::from_ticks(((rtc_ticks * TICK_HZ as u32) / (psc + 1)) as u64)
-    }
-}
 fn wucksel_compute_min(val: u32) -> (Wucksel, u32) {
    *[
        (Wucksel::DIV2, 2),
@@ -72,22 +20,15 @@ fn wucksel_compute_min(val: u32) -> (Wucksel, u32) {
 }
 impl Rtc {
-    /// Return the current instant.
+    pub(super) fn calc_epoch(&self) -> DateTime<Utc> {
-    fn instant(&self) -> Result<RtcInstant, RtcError> {
+        let now: NaiveDateTime = RtcTimeProvider::new().now().unwrap().into();
-        RtcTimeProvider::new().read(|_, tr, ss| {
-            let second = bcd2_to_byte((tr.st(), tr.su()));
-            RtcInstant::from(second, ss).map_err(RtcError::InvalidDateTime)
+        now.and_utc() - TimeDelta::microseconds(Instant::now().as_micros().try_into().unwrap())
-        })
    }
    /// start the wakeup alarm and with a duration that is as close to but less than
    /// the requested duration, and record the instant the wakeup alarm was started
-    pub(crate) fn start_wakeup_alarm(
+    pub(crate) fn start_wakeup_alarm(&mut self, requested_duration: embassy_time::Duration) {
-        &mut self,
-        requested_duration: embassy_time::Duration,
-        cs: critical_section::CriticalSection,
-    ) {
        // Panic if the rcc mod knows we're not using low-power rtc
        #[cfg(any(rcc_wb, rcc_f4, rcc_f410))]
        unsafe { crate::rcc::get_freqs() }.rtc.to_hertz().unwrap();
@@ -122,27 +63,19 @@ impl Rtc {
            regs.cr().modify(|w| w.set_wutie(true));
        });
-        let instant = self.instant().unwrap();
        trace!(
-            "rtc: start wakeup alarm for {} ms (psc: {}, ticks: {}) at {}",
+            "rtc: start wakeup alarm for {} ms (psc: {}, ticks: {})",
            Duration::from_ticks(rtc_ticks as u64 * TICK_HZ * prescaler as u64 / rtc_hz).as_millis(),
            prescaler as u32,
            rtc_ticks,
-            instant,
        );
-        assert!(self.stop_time.borrow(cs).replace(Some(instant)).is_none())
    }
    /// stop the wakeup alarm and return the time elapsed since `start_wakeup_alarm`
    /// was called, otherwise none
-    pub(crate) fn stop_wakeup_alarm(
+    pub(crate) fn stop_wakeup_alarm(&mut self) -> embassy_time::Instant {
-        &mut self,
-        cs: critical_section::CriticalSection,
-    ) -> Option<embassy_time::Duration> {
-        let instant = self.instant().unwrap();
        if RTC::regs().cr().read().wute() {
-            trace!("rtc: stop wakeup alarm at {}", instant);
+            trace!("rtc: stop wakeup alarm");
            self.write(false, |regs| {
                regs.cr().modify(|w| w.set_wutie(false));
@@ -166,10 +99,13 @@ impl Rtc {
            });
        }
-        self.stop_time.borrow(cs).take().map(|stop_time| instant - stop_time)
+        let datetime: NaiveDateTime = RtcTimeProvider::new().now().expect("failed to read now").into();
+        let offset = datetime.and_utc() - self.epoch;
+        Instant::from_micros(offset.num_microseconds().unwrap().try_into().unwrap())
    }
-    pub(crate) fn enable_wakeup_line(&self) {
+    pub(super) fn enable_wakeup_line(&mut self) {
        <RTC as crate::rtc::SealedInstance>::WakeupInterrupt::unpend();
        unsafe { <RTC as crate::rtc::SealedInstance>::WakeupInterrupt::enable() };
@@ -178,11 +114,11 @@ impl Rtc {
            use crate::pac::EXTI;
            EXTI.rtsr(0).modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true));
-            #[cfg(not(stm32wb))]
+            #[cfg(not(any(stm32wb, stm32wl5x)))]
            {
                EXTI.imr(0).modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true));
            }
-            #[cfg(stm32wb)]
+            #[cfg(any(stm32wb, stm32wl5x))]
            {
                EXTI.cpu(0).imr(0).modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true));
            }
diff --git a/embassy-stm32/src/rtc/mod.rs b/embassy-stm32/src/rtc/mod.rs
index e88bd7ab2..94ba13ae1 100644
--- a/embassy-stm32/src/rtc/mod.rs
+++ b/embassy-stm32/src/rtc/mod.rs
@@ -5,7 +5,7 @@ mod datetime;
 mod low_power;
 #[cfg(feature = "low-power")]
-use core::cell::{Cell, RefCell, RefMut};
+use core::cell::{RefCell, RefMut};
 #[cfg(feature = "low-power")]
 use core::ops;
@@ -163,7 +163,7 @@ impl<'a> ops::DerefMut for RtcBorrow<'a> {
 /// RTC driver.
 pub struct Rtc {
    #[cfg(feature = "low-power")]
-    stop_time: Mutex<CriticalSectionRawMutex, Cell<Option<low_power::RtcInstant>>>,
+    epoch: chrono::DateTime<chrono::Utc>,
    _private: (),
 }
@@ -225,7 +225,7 @@ impl Rtc {
        let mut this = Self {
            #[cfg(feature = "low-power")]
-            stop_time: Mutex::const_new(CriticalSectionRawMutex::new(), Cell::new(None)),
+            epoch: chrono::DateTime::from_timestamp_secs(0).unwrap(),
            _private: (),
        };
@@ -243,7 +243,10 @@ impl Rtc {
        }
        #[cfg(feature = "low-power")]
-        this.enable_wakeup_line();
+        {
+            this.enable_wakeup_line();
+            this.epoch = this.calc_epoch();
+        }
        this
    }
@@ -293,6 +296,11 @@ impl Rtc {
            });
        });
+        #[cfg(feature = "low-power")]
+        {
+            self.epoch = self.calc_epoch();
+        }
        Ok(())
    }
diff --git a/embassy-stm32/src/rtc/v3.rs b/embassy-stm32/src/rtc/v3.rs
index f7ebea73e..49c9778df 100644
--- a/embassy-stm32/src/rtc/v3.rs
+++ b/embassy-stm32/src/rtc/v3.rs
@@ -131,7 +131,7 @@ impl SealedInstance for crate::peripherals::RTC {
    #[cfg(feature = "low-power")]
    cfg_if::cfg_if!(
-        if #[cfg(any(stm32g4, stm32wlex))] {
+        if #[cfg(any(stm32g4, stm32wl))] {
            const EXTI_WAKEUP_LINE: usize = 20;
        } else if #[cfg(stm32g0)] {
            const EXTI_WAKEUP_LINE: usize = 19;
@@ -142,7 +142,7 @@ impl SealedInstance for crate::peripherals::RTC {
    #[cfg(feature = "low-power")]
    cfg_if::cfg_if!(
-        if #[cfg(any(stm32g4, stm32wlex))] {
+        if #[cfg(any(stm32g4, stm32wl))] {
            type WakeupInterrupt = crate::interrupt::typelevel::RTC_WKUP;
        } else if #[cfg(any(stm32g0, stm32u0))] {
            type WakeupInterrupt = crate::interrupt::typelevel::RTC_TAMP;
diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs
index e716fc348..cfe18ef52 100644
--- a/embassy-stm32/src/sdmmc/mod.rs
+++ b/embassy-stm32/src/sdmmc/mod.rs
@@ -142,34 +142,34 @@ impl Default for Signalling {
 const fn aligned_mut(x: &mut [u32]) -> &mut Aligned<A4, [u8]> {
    let len = x.len() * 4;
-    unsafe { core::mem::transmute(slice::from_raw_parts_mut(x.as_mut_ptr() as _, len)) }
+    unsafe { core::mem::transmute(slice::from_raw_parts_mut(x.as_mut_ptr() as *mut u8, len)) }
 }
 const fn slice8_mut(x: &mut [u32]) -> &mut [u8] {
    let len = x.len() * 4;
-    unsafe { slice::from_raw_parts_mut(x.as_mut_ptr() as _, len) }
+    unsafe { slice::from_raw_parts_mut(x.as_mut_ptr() as *mut u8, len) }
 }
 #[allow(unused)]
 const fn slice32_mut(x: &mut Aligned<A4, [u8]>) -> &mut [u32] {
    let len = (size_of_val(x) + 4 - 1) / 4;
-    unsafe { slice::from_raw_parts_mut(x as *mut Aligned<A4, [u8]> as *mut _, len) }
+    unsafe { slice::from_raw_parts_mut(x as *mut Aligned<A4, [u8]> as *mut u32, len) }
 }
 const fn aligned_ref(x: &[u32]) -> &Aligned<A4, [u8]> {
    let len = x.len() * 4;
-    unsafe { core::mem::transmute(slice::from_raw_parts(x.as_ptr() as _, len)) }
+    unsafe { core::mem::transmute(slice::from_raw_parts(x.as_ptr() as *const u8, len)) }
 }
 const fn slice8_ref(x: &[u32]) -> &[u8] {
    let len = x.len() * 4;
-    unsafe { slice::from_raw_parts(x.as_ptr() as _, len) }
+    unsafe { slice::from_raw_parts(x.as_ptr() as *const u8, len) }
 }
 #[allow(unused)]
 const fn slice32_ref(x: &Aligned<A4, [u8]>) -> &[u32] {
    let len = (size_of_val(x) + 4 - 1) / 4;
-    unsafe { slice::from_raw_parts(x as *const Aligned<A4, [u8]> as *const _, len) }
+    unsafe { slice::from_raw_parts(x as *const Aligned<A4, [u8]> as *const u32, len) }
 }
 /// Errors
@@ -1179,6 +1179,7 @@ impl<'d> Drop for Sdmmc<'d> {
    fn drop(&mut self) {
        // T::Interrupt::disable();
        self.on_drop();
+        self.info.rcc.disable_without_stop();
        critical_section::with(|_| {
            self.clk.set_as_disconnected();
diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs
index af51b79b4..13ff31a34 100644
--- a/embassy-stm32/src/spi/mod.rs
+++ b/embassy-stm32/src/spi/mod.rs
@@ -1126,7 +1126,7 @@ impl<'d, M: PeriMode, CM: CommunicationMode> Drop for Spi<'d, M, CM> {
        self.miso.as_ref().map(|x| x.set_as_disconnected());
        self.nss.as_ref().map(|x| x.set_as_disconnected());
-        self.info.rcc.disable();
+        self.info.rcc.disable_without_stop();
    }
 }
diff --git a/embassy-stm32/src/time_driver.rs b/embassy-stm32/src/time_driver.rs
index ed5d902bd..59ec58575 100644
--- a/embassy-stm32/src/time_driver.rs
+++ b/embassy-stm32/src/time_driver.rs
@@ -251,8 +251,8 @@ impl RtcDriver {
    #[cfg(feature = "low-power")]
    /// Add the given offset to the current time
-    fn add_time(&self, offset: embassy_time::Duration, cs: CriticalSection) {
+    fn set_time(&self, instant: u64, cs: CriticalSection) {
-        let (period, counter) = calc_period_counter(self.now() + offset.as_ticks());
+        let (period, counter) = calc_period_counter(core::cmp::max(self.now(), instant));
        self.period.store(period, Ordering::SeqCst);
        regs_gp16().cnt().write(|w| w.set_cnt(counter));
@@ -269,10 +269,17 @@ impl RtcDriver {
    #[cfg(feature = "low-power")]
    /// Stop the wakeup alarm, if enabled, and add the appropriate offset
    fn stop_wakeup_alarm(&self, cs: CriticalSection) {
-        if !regs_gp16().cr1().read().cen()
+        if !regs_gp16().cr1().read().cen() {
-            && let Some(offset) = self.rtc.borrow(cs).borrow_mut().as_mut().unwrap().stop_wakeup_alarm(cs)
+            self.set_time(
-        {
+                self.rtc
-            self.add_time(offset, cs);
+                    .borrow(cs)
+                    .borrow_mut()
+                    .as_mut()
+                    .unwrap()
+                    .stop_wakeup_alarm()
+                    .as_ticks(),
+                cs,
+            );
        }
    }
@@ -287,7 +294,7 @@ impl RtcDriver {
    #[cfg(feature = "low-power")]
    /// Set the rtc but panic if it's already been set
    pub(crate) fn set_rtc(&self, cs: CriticalSection, mut rtc: Rtc) {
-        rtc.stop_wakeup_alarm(cs);
+        rtc.stop_wakeup_alarm();
        assert!(self.rtc.borrow(cs).replace(Some(rtc)).is_none());
    }
@@ -310,7 +317,7 @@ impl RtcDriver {
                .borrow_mut()
                .as_mut()
                .unwrap()
-                .start_wakeup_alarm(time_until_next_alarm, cs);
+                .start_wakeup_alarm(time_until_next_alarm);
            regs_gp16().cr1().modify(|w| w.set_cen(false));
            // save the count for the timer as its lost in STOP2 for stm32wlex
diff --git a/embassy-stm32/src/timer/input_capture.rs b/embassy-stm32/src/timer/input_capture.rs
index 3e1482b67..905f2de1a 100644
--- a/embassy-stm32/src/timer/input_capture.rs
+++ b/embassy-stm32/src/timer/input_capture.rs
@@ -156,6 +156,48 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> {
        self.new_future(channel, InputCaptureMode::BothEdges, InputTISelection::Alternate)
            .await
    }
+    /// Capture a sequence of timer input edges into a buffer using DMA
+    pub async fn receive_waveform<M>(&mut self, dma: Peri<'_, impl super::Dma<T, M>>, buf: &mut [u16])
+    where
+        M: TimerChannel,
+    {
+        #[allow(clippy::let_unit_value)] // eg. stm32f334
+        let req = dma.request();
+        let original_enable_state = self.is_enabled(M::CHANNEL);
+        let original_cc_dma_enable_state = self.inner.get_cc_dma_enable_state(M::CHANNEL);
+        self.inner.set_input_ti_selection(M::CHANNEL, InputTISelection::Normal);
+        self.inner
+            .set_input_capture_mode(M::CHANNEL, InputCaptureMode::BothEdges);
+        if !original_cc_dma_enable_state {
+            self.inner.set_cc_dma_enable_state(M::CHANNEL, true);
+        }
+        if !original_enable_state {
+            self.enable(M::CHANNEL);
+        }
+        unsafe {
+            use crate::dma::{Transfer, TransferOptions};
+            Transfer::new_read(
+                dma,
+                req,
+                self.inner.regs_gp16().ccr(M::CHANNEL.index()).as_ptr() as *mut u16,
+                buf,
+                TransferOptions::default(),
+            )
+            .await
+        };
+        // restore output compare state
+        if !original_enable_state {
+            self.disable(M::CHANNEL);
+        }
+    }
 }
 #[must_use = "futures do nothing unless you `.await` or poll them"]
diff --git a/embassy-sync/Cargo.toml b/embassy-sync/Cargo.toml
index 0c28cec7d..86c87b7b1 100644
--- a/embassy-sync/Cargo.toml
+++ b/embassy-sync/Cargo.toml
@@ -41,7 +41,7 @@ futures-core = { version = "0.3.31", default-features = false }
 critical-section = "1.1"
 heapless = "0.8"
 cfg-if = "1.0.0"
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 [dev-dependencies]
 futures-executor = { version = "0.3.17", features = [ "thread-pool" ] }
diff --git a/embassy-sync/src/pipe.rs b/embassy-sync/src/pipe.rs
index 215a556d9..d6c21299a 100644
--- a/embassy-sync/src/pipe.rs
+++ b/embassy-sync/src/pipe.rs
@@ -393,7 +393,7 @@ where
    /// Attempt to immediately write some bytes to the pipe.
    ///
    /// This method will either write a nonzero amount of bytes to the pipe immediately,
-    /// or return an error if the pipe is empty. See [`write`](Self::write) for a variant
+    /// or return an error if the pipe is full. See [`write`](Self::write) for a variant
    /// that waits instead of returning an error.
    pub fn try_write(&self, buf: &[u8]) -> Result<usize, TryWriteError> {
        self.try_write_with_context(None, buf)
diff --git a/embassy-usb-dfu/Cargo.toml b/embassy-usb-dfu/Cargo.toml
index 8b32582c0..4f952a047 100644
--- a/embassy-usb-dfu/Cargo.toml
+++ b/embassy-usb-dfu/Cargo.toml
@@ -35,7 +35,7 @@ features = ["defmt", "cortex-m", "dfu"]
 defmt = { version = "1.0.1", optional = true }
 log = { version = "0.4.17", optional = true }
-bitflags = "2.4.1"
+bitflags = "2.10.0"
 cortex-m = { version = "0.7.7", features = ["inline-asm"], optional = true }
 embassy-boot = { version = "0.6.1", path = "../embassy-boot" }
 embassy-futures = { version = "0.1.2", path = "../embassy-futures" }
diff --git a/embassy-usb-driver/Cargo.toml b/embassy-usb-driver/Cargo.toml
index 3f43f60a3..a11658213 100644
--- a/embassy-usb-driver/Cargo.toml
+++ b/embassy-usb-driver/Cargo.toml
@@ -19,6 +19,7 @@ target = "thumbv7em-none-eabi"
 features = ["defmt"]
 [dependencies]
+# TODO: remove before releasing embassy-usb-driver v0.3
 embedded-io-async = "0.6.1"
 defmt = { version = "1", optional = true }
diff --git a/embassy-usb-driver/src/lib.rs b/embassy-usb-driver/src/lib.rs
index f19e0a401..782f130f6 100644
--- a/embassy-usb-driver/src/lib.rs
+++ b/embassy-usb-driver/src/lib.rs
@@ -429,6 +429,7 @@ pub enum EndpointError {
    Disabled,
 }
+// TODO: remove before releasing embassy-usb-driver v0.3
 impl embedded_io_async::Error for EndpointError {
    fn kind(&self) -> embedded_io_async::ErrorKind {
        match self {
diff --git a/embassy-usb/Cargo.toml b/embassy-usb/Cargo.toml
index 3d1e005e4..6c3ddc1db 100644
--- a/embassy-usb/Cargo.toml
+++ b/embassy-usb/Cargo.toml
@@ -66,7 +66,7 @@ embassy-net-driver-channel = { version = "0.3.2", path = "../embassy-net-driver-
 defmt = { version = "1", optional = true }
 log = { version = "0.4.14", optional = true }
 heapless = "0.8"
-embedded-io-async = "0.6.1"
+embedded-io-async = { version = "0.7.0" }
 # for HID
 usbd-hid = { version = "0.9.0", optional = true }
diff --git a/embassy-usb/src/class/cdc_acm.rs b/embassy-usb/src/class/cdc_acm.rs
index ab2311f4e..56acdb2a6 100644
--- a/embassy-usb/src/class/cdc_acm.rs
+++ b/embassy-usb/src/class/cdc_acm.rs
@@ -33,6 +33,30 @@ const REQ_SET_LINE_CODING: u8 = 0x20;
 const REQ_GET_LINE_CODING: u8 = 0x21;
 const REQ_SET_CONTROL_LINE_STATE: u8 = 0x22;
+/// CDC ACM error.
+#[derive(Clone, Debug)]
+pub enum CdcAcmError {
+    /// USB is not connected.
+    NotConnected,
+}
+impl core::fmt::Display for CdcAcmError {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        match *self {
+            Self::NotConnected => f.write_str("NotConnected"),
+        }
+    }
+}
+impl core::error::Error for CdcAcmError {}
+impl embedded_io_async::Error for CdcAcmError {
+    fn kind(&self) -> embedded_io_async::ErrorKind {
+        match *self {
+            Self::NotConnected => embedded_io_async::ErrorKind::NotConnected,
+        }
+    }
+}
 /// Internal state for CDC-ACM
 pub struct State<'a> {
    control: MaybeUninit<Control<'a>>,
@@ -421,14 +445,21 @@ impl<'d, D: Driver<'d>> Sender<'d, D> {
 }
 impl<'d, D: Driver<'d>> embedded_io_async::ErrorType for Sender<'d, D> {
-    type Error = EndpointError;
+    type Error = CdcAcmError;
 }
 impl<'d, D: Driver<'d>> embedded_io_async::Write for Sender<'d, D> {
    async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
        let len = core::cmp::min(buf.len(), self.max_packet_size() as usize);
-        self.write_packet(&buf[..len]).await?;
+        match self.write_packet(&buf[..len]).await {
-        Ok(len)
+            Ok(()) => Ok(len),
+            Err(EndpointError::BufferOverflow) => unreachable!(),
+            Err(EndpointError::Disabled) => Err(CdcAcmError::NotConnected),
+        }
+    }
+    async fn flush(&mut self) -> Result<(), Self::Error> {
+        Ok(())
    }
 }
@@ -539,7 +570,7 @@ impl<'d, D: Driver<'d>> BufferedReceiver<'d, D> {
 }
 impl<'d, D: Driver<'d>> embedded_io_async::ErrorType for BufferedReceiver<'d, D> {
-    type Error = EndpointError;
+    type Error = CdcAcmError;
 }
 impl<'d, D: Driver<'d>> embedded_io_async::Read for BufferedReceiver<'d, D> {
@@ -552,14 +583,22 @@ impl<'d, D: Driver<'d>> embedded_io_async::Read for BufferedReceiver<'d, D> {
        // If the caller's buffer is large enough to contain an entire packet, read directly into
        // that instead of buffering the packet internally.
        if buf.len() > self.receiver.max_packet_size() as usize {
-            return self.receiver.read_packet(buf).await;
+            return match self.receiver.read_packet(buf).await {
+                Ok(n) => Ok(n),
+                Err(EndpointError::BufferOverflow) => unreachable!(),
+                Err(EndpointError::Disabled) => Err(CdcAcmError::NotConnected),
+            };
        }
        // Otherwise read a packet into the internal buffer, and return some of it to the caller.
        //
        // It's important that `start` and `end` be updated in this order so they're left in a
        // consistent state if the `read` future is dropped mid-execution, e.g. from a timeout.
-        self.end = self.receiver.read_packet(&mut self.buffer).await?;
+        match self.receiver.read_packet(&mut self.buffer).await {
+            Ok(n) => self.end = n,
+            Err(EndpointError::BufferOverflow) => unreachable!(),
+            Err(EndpointError::Disabled) => return Err(CdcAcmError::NotConnected),
+        }
        self.start = 0;
        return Ok(self.read_from_buffer(buf));
    }
diff --git a/embassy-usb/src/msos.rs b/embassy-usb/src/msos.rs
index 66689871e..6d7f87061 100644
--- a/embassy-usb/src/msos.rs
+++ b/embassy-usb/src/msos.rs
@@ -110,10 +110,6 @@ impl<'d> MsOsDescriptorWriter<'d> {
            !self.is_empty(),
            "device features may only be added after the header is written"
        );
-        assert!(
-            self.config_mark.is_none(),
-            "device features must be added before the first configuration subset"
-        );
        self.write(desc);
    }
diff --git a/examples/boot/application/nrf/Cargo.toml b/examples/boot/application/nrf/Cargo.toml
index 79286e295..ccaa24e3e 100644
--- a/examples/boot/application/nrf/Cargo.toml
+++ b/examples/boot/application/nrf/Cargo.toml
@@ -9,9 +9,9 @@ publish = false
 embassy-sync = { version = "0.7.2", path = "../../../../embassy-sync" }
 embassy-executor = { version = "0.9.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "arch-cortex-m", "executor-thread"] }
 embassy-time = { version = "0.5.0", path = "../../../../embassy-time", features = [] }
-embassy-nrf = { version = "0.8.0", path = "../../../../embassy-nrf", features = ["gpiote", ] }
+embassy-nrf = { version = "0.9.0", path = "../../../../embassy-nrf", features = ["gpiote", ] }
 embassy-boot = { version = "0.6.1", path = "../../../../embassy-boot", features = [] }
-embassy-boot-nrf = { version = "0.9.0", path = "../../../../embassy-boot-nrf", features = [] }
+embassy-boot-nrf = { version = "0.10.0", path = "../../../../embassy-boot-nrf", features = [] }
 embassy-embedded-hal = { version = "0.5.0", path = "../../../../embassy-embedded-hal" }
 defmt = { version = "1.0.1", optional = true }
diff --git a/examples/mcxa/Cargo.toml b/examples/mcxa/Cargo.toml
index 347659f5b..29d319375 100644
--- a/examples/mcxa/Cargo.toml
+++ b/examples/mcxa/Cargo.toml
@@ -18,7 +18,7 @@ embassy-mcxa = { path = "../../embassy-mcxa", features = ["defmt", "unstable-pac
 embassy-sync = "0.7.2"
 embassy-time = "0.5.0"
 embassy-time-driver = "0.2.1"
-embedded-io-async = "0.6.1"
+embedded-io-async = "0.7.0"
 heapless = "0.9.2"
 panic-probe = { version = "1.0", features = ["print-defmt"] }
 rand_core = "0.9"
diff --git a/examples/mcxa/src/bin/clkout.rs b/examples/mcxa/src/bin/clkout.rs
index 1e52912d3..c0e8c330d 100644
--- a/examples/mcxa/src/bin/clkout.rs
+++ b/examples/mcxa/src/bin/clkout.rs
@@ -4,6 +4,7 @@
 use embassy_executor::Spawner;
 use embassy_mcxa::clkout::{ClockOut, ClockOutSel, Config, Div4};
 use embassy_mcxa::clocks::PoweredClock;
+use embassy_mcxa::clocks::config::{SoscConfig, SoscMode, SpllConfig, SpllMode, SpllSource};
 use embassy_mcxa::gpio::{DriveStrength, Level, Output, SlewRate};
 use embassy_time::Timer;
 use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _};
@@ -11,58 +12,81 @@ use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _};
 /// Demonstrate CLKOUT, using Pin P4.2
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
-    let p = hal::init(hal::config::Config::default());
+    let mut cfg = hal::config::Config::default();
+    cfg.clock_cfg.sosc = Some(SoscConfig {
+        mode: SoscMode::CrystalOscillator,
+        frequency: 8_000_000,
+        power: PoweredClock::NormalEnabledDeepSleepDisabled,
+    });
+    cfg.clock_cfg.spll = Some(SpllConfig {
+        source: SpllSource::Sirc,
+        // 12MHz
+        // 12 x 32 => 384MHz
+        // 384 / (16 x 2) => 12.0MHz
+        mode: SpllMode::Mode1b {
+            m_mult: 32,
+            p_div: 16,
+            bypass_p2_div: false,
+        },
+        power: PoweredClock::NormalEnabledDeepSleepDisabled,
+        pll1_clk_div: None,
+    });
+    let p = hal::init(cfg);
    let mut pin = p.P4_2;
    let mut clkout = p.CLKOUT;
-    loop {
+    const K16_CONFIG: Config = Config {
-        defmt::info!("Set Low...");
+        sel: ClockOutSel::Clk16K,
-        let mut output = Output::new(pin.reborrow(), Level::Low, DriveStrength::Normal, SlewRate::Slow);
+        div: Div4::no_div(),
-        Timer::after_millis(500).await;
+        level: PoweredClock::NormalEnabledDeepSleepDisabled,
+    };
+    const M4_CONFIG: Config = Config {
+        sel: ClockOutSel::Fro12M,
+        div: const { Div4::from_divisor(3).unwrap() },
+        level: PoweredClock::NormalEnabledDeepSleepDisabled,
+    };
+    const K512_CONFIG: Config = Config {
+        sel: ClockOutSel::ClkIn,
+        div: const { Div4::from_divisor(16).unwrap() },
+        level: PoweredClock::NormalEnabledDeepSleepDisabled,
+    };
+    const M1_CONFIG: Config = Config {
+        sel: ClockOutSel::Pll1Clk,
+        div: const { Div4::from_divisor(12).unwrap() },
+        level: PoweredClock::NormalEnabledDeepSleepDisabled,
+    };
+    #[rustfmt::skip]
+    let configs = [
+        ("16K -> /1 = 16K",  K16_CONFIG),
+        ("12M -> /3 = 4M",   M4_CONFIG),
+        ("8M -> /16 = 512K", K512_CONFIG),
+        ("12M-> /12 = 1M",   M1_CONFIG),
+    ];
+    loop {
        defmt::info!("Set High...");
-        output.set_high();
+        let mut output = Output::new(pin.reborrow(), Level::High, DriveStrength::Normal, SlewRate::Slow);
-        Timer::after_millis(400).await;
+        Timer::after_millis(250).await;
        defmt::info!("Set Low...");
        output.set_low();
-        Timer::after_millis(500).await;
+        Timer::after_millis(750).await;
-        defmt::info!("16k...");
+        for (name, conf) in configs.iter() {
-        // Run Clock Out with the 16K clock
+            defmt::info!("Running {=str}", name);
-        let _clock_out = ClockOut::new(
-            clkout.reborrow(),
-            pin.reborrow(),
-            Config {
-                sel: ClockOutSel::Clk16K,
-                div: Div4::no_div(),
-                level: PoweredClock::NormalEnabledDeepSleepDisabled,
-            },
-        )
-        .unwrap();
-        Timer::after_millis(3000).await;
+            let _clock_out = ClockOut::new(clkout.reborrow(), pin.reborrow(), *conf).unwrap();
-        defmt::info!("Set Low...");
-        drop(_clock_out);
-        let _output = Output::new(pin.reborrow(), Level::Low, DriveStrength::Normal, SlewRate::Slow);
+            Timer::after_millis(3000).await;
-        Timer::after_millis(500).await;
-        // Run Clock Out with the 12M clock, divided by 3
+            defmt::info!("Set Low...");
-        defmt::info!("4M...");
+            drop(_clock_out);
-        let _clock_out = ClockOut::new(
-            clkout.reborrow(),
-            pin.reborrow(),
-            Config {
-                sel: ClockOutSel::Fro12M,
-                div: const { Div4::from_divisor(3).unwrap() },
-                level: PoweredClock::NormalEnabledDeepSleepDisabled,
-            },
-        )
-        .unwrap();
-        // Let it run for 3 seconds...
+            let _output = Output::new(pin.reborrow(), Level::Low, DriveStrength::Normal, SlewRate::Slow);
-        Timer::after_millis(3000).await;
+            Timer::after_millis(500).await;
+        }
    }
 }
diff --git a/examples/mcxa/src/bin/reset-reason.rs b/examples/mcxa/src/bin/reset-reason.rs
index c244fbe04..2d48a92b1 100644
--- a/examples/mcxa/src/bin/reset-reason.rs
+++ b/examples/mcxa/src/bin/reset-reason.rs
@@ -11,5 +11,7 @@ async fn main(_spawner: Spawner) {
    let config = Config::default();
    let _p = hal::init(config);
-    defmt::info!("Reset Reason: '{}'", reset_reason());
+    for reason in reset_reason().into_iter() {
+        defmt::info!("Reset Reason: '{}'", reason);
+    }
 }
diff --git a/examples/mspm0g3507/Cargo.toml b/examples/mspm0g3507/Cargo.toml
index 8c230f038..f4fc7e09f 100644
--- a/examples/mspm0g3507/Cargo.toml
+++ b/examples/mspm0g3507/Cargo.toml
@@ -18,7 +18,7 @@ defmt-rtt = "1.0.0"
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 panic-semihosting = "0.6.0"
-embedded-io-async = "0.6.1"
+embedded-io-async = { version = "0.7.0" }
 [profile.release]
 debug = 2
diff --git a/examples/mspm0g5187/.cargo/config.toml b/examples/mspm0g5187/.cargo/config.toml
new file mode 100644
index 000000000..ea407b411
--- /dev/null
+++ b/examples/mspm0g5187/.cargo/config.toml
@@ -0,0 +1,9 @@
+[target.'cfg(all(target_arch = "arm", target_os = "none"))']
+# replace MSPM0G5187 with your chip as listed in `probe-rs chip list`
+runner = "probe-rs run --restore-unwritten --verify --chip MSPM0G5187 --protocol=swd"
+[build]
+target = "thumbv6m-none-eabi"
+[env]
+DEFMT_LOG = "trace"
diff --git a/examples/mspm0g5187/Cargo.toml b/examples/mspm0g5187/Cargo.toml
new file mode 100644
index 000000000..3d64a127a
--- /dev/null
+++ b/examples/mspm0g5187/Cargo.toml
@@ -0,0 +1,27 @@
+[package]
+edition = "2024"
+name = "embassy-mspm0-g5187-examples"
+version = "0.1.0"
+license = "MIT OR Apache-2.0"
+publish = false
+[dependencies]
+embassy-mspm0 = { version = "0.1.0", path = "../../embassy-mspm0", features = ["mspm0g5187pm", "defmt", "rt", "time-driver-any"] }
+embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt"] }
+embassy-sync = { version = "0.7.2", path = "../../embassy-sync", features = ["defmt"] }
+embassy-time = { version = "0.5.0", path = "../../embassy-time", features = ["defmt"] }
+panic-halt = "1.0.0"
+cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] }
+cortex-m-rt = { version = "0.7.0"}
+defmt = "1.0.1"
+defmt-rtt = "1.0.0"
+panic-probe = { version = "1.0.0", features = ["print-defmt"] }
+panic-semihosting = "0.6.0"
+[profile.release]
+debug = 2
+[package.metadata.embassy]
+build = [
+  { target = "thumbv6m-none-eabi", artifact-dir = "out/examples/mspm0g5187" }
+]
diff --git a/examples/mspm0g5187/README.md b/examples/mspm0g5187/README.md
new file mode 100644
index 000000000..12e7846fb
--- /dev/null
+++ b/examples/mspm0g5187/README.md
@@ -0,0 +1,27 @@
+# Examples for MSPM0G5187
+Run individual examples with
+```
+cargo run --bin <module-name>
+```
+for example
+```
+cargo run --bin blinky
+```
+## Checklist before running examples
+A large number of the examples are written for the [LP-MSPM0G5187](https://www.ti.com/tool/LP-MSPM0G5187) board.
+You might need to adjust `.cargo/config.toml`, `Cargo.toml` and possibly update pin numbers or peripherals to match the specific MCU or board you are using.
+* [ ] Update .cargo/config.toml with the correct probe-rs command to use your specific MCU. For example for G5187 it should be `probe-rs run --chip MSPM0G5187`. (use `probe-rs chip list` to find your chip)
+* [ ] Update Cargo.toml to have the correct `embassy-mspm0` feature. For the LP-MSPM0G3519 it should be `mspm0g3519pz`. Look in the `Cargo.toml` file of the `embassy-mspm0` project to find the correct feature flag for your chip.
+* [ ] If your board has a special clock or power configuration, make sure that it is set up appropriately.
+* [ ] If your board has different pin mapping, update any pin numbers or peripherals in the given example code to match your schematic
+If you are unsure, please drop by the Embassy Matrix chat for support, and let us know:
+* Which example you are trying to run
+* Which chip and board you are using
+Embassy Chat: https://matrix.to/#/#embassy-rs:matrix.org
diff --git a/examples/mspm0g5187/build.rs b/examples/mspm0g5187/build.rs
new file mode 100644
index 000000000..2d777c2d3
--- /dev/null
+++ b/examples/mspm0g5187/build.rs
@@ -0,0 +1,37 @@
+//! This build script copies the `memory.x` file from the crate root into
+//! a directory where the linker can always find it at build time.
+//! For many projects this is optional, as the linker always searches the
+//! project root directory -- wherever `Cargo.toml` is. However, if you
+//! are using a workspace or have a more complicated build setup, this
+//! build script becomes required. Additionally, by requesting that
+//! Cargo re-run the build script whenever `memory.x` is changed,
+//! updating `memory.x` ensures a rebuild of the application with the
+//! new memory settings.
+use std::env;
+use std::fs::File;
+use std::io::Write;
+use std::path::PathBuf;
+fn main() {
+    // Put `memory.x` in our output directory and ensure it's
+    // on the linker search path.
+    let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
+    File::create(out.join("memory.x"))
+        .unwrap()
+        .write_all(include_bytes!("memory.x"))
+        .unwrap();
+    println!("cargo:rustc-link-search={}", out.display());
+    // By default, Cargo will re-run a build script whenever
+    // any file in the project changes. By specifying `memory.x`
+    // here, we ensure the build script is only re-run when
+    // `memory.x` is changed.
+    println!("cargo:rerun-if-changed=memory.x");
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
+    // You must tell cargo to link interrupt groups if the rt feature is enabled.
+    println!("cargo:rustc-link-arg-bins=-Tinterrupt_group.x");
+}
diff --git a/examples/mspm0g5187/memory.x b/examples/mspm0g5187/memory.x
new file mode 100644
index 000000000..37e381fbd
--- /dev/null
+++ b/examples/mspm0g5187/memory.x
@@ -0,0 +1,6 @@
+MEMORY
+{
+  FLASH : ORIGIN = 0x00000000, LENGTH = 128K
+  /* Select non-parity range of SRAM due to SRAM_ERR_01 errata in SLAZ758 */
+  RAM   : ORIGIN = 0x20200000, LENGTH = 32K
+}
diff --git a/examples/mspm0g5187/src/bin/blinky.rs b/examples/mspm0g5187/src/bin/blinky.rs
new file mode 100644
index 000000000..47eaf1535
--- /dev/null
+++ b/examples/mspm0g5187/src/bin/blinky.rs
@@ -0,0 +1,25 @@
+#![no_std]
+#![no_main]
+use defmt::*;
+use embassy_executor::Spawner;
+use embassy_mspm0::Config;
+use embassy_mspm0::gpio::{Level, Output};
+use embassy_time::Timer;
+use {defmt_rtt as _, panic_halt as _};
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) -> ! {
+    info!("Hello world!");
+    let p = embassy_mspm0::init(Config::default());
+    let mut led1 = Output::new(p.PA0, Level::Low);
+    led1.set_inversion(true);
+    loop {
+        Timer::after_millis(400).await;
+        info!("Toggle");
+        led1.toggle();
+    }
+}
diff --git a/examples/mspm0g5187/src/bin/button.rs b/examples/mspm0g5187/src/bin/button.rs
new file mode 100644
index 000000000..2ed15e354
--- /dev/null
+++ b/examples/mspm0g5187/src/bin/button.rs
@@ -0,0 +1,33 @@
+#![no_std]
+#![no_main]
+use defmt::*;
+use embassy_executor::Spawner;
+use embassy_mspm0::Config;
+use embassy_mspm0::gpio::{Input, Level, Output, Pull};
+use {defmt_rtt as _, panic_halt as _};
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) -> ! {
+    info!("Hello world!");
+    let p = embassy_mspm0::init(Config::default());
+    let led1 = p.PA0;
+    let s2 = p.PA7;
+    let mut led1 = Output::new(led1, Level::Low);
+    let mut s2 = Input::new(s2, Pull::Up);
+    // led1 is active low
+    led1.set_high();
+    loop {
+        s2.wait_for_falling_edge().await;
+        info!("Switch 2 was pressed");
+        led1.toggle();
+    }
+}
diff --git a/examples/mspm0g5187/src/bin/wwdt.rs b/examples/mspm0g5187/src/bin/wwdt.rs
new file mode 100644
index 000000000..a5de781f3
--- /dev/null
+++ b/examples/mspm0g5187/src/bin/wwdt.rs
@@ -0,0 +1,54 @@
+//! Example of using window watchdog timer in the MSPM0G5187 chip.
+//!
+//! It tests the use case when watchdog timer is expired and when watchdog is pet too early.
+#![no_std]
+#![no_main]
+use defmt::*;
+use embassy_executor::Spawner;
+use embassy_mspm0::gpio::{Level, Output};
+use embassy_mspm0::wwdt::{ClosedWindowPercentage, Config, Timeout, Watchdog};
+use embassy_time::Timer;
+use {defmt_rtt as _, panic_halt as _};
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) -> ! {
+    info!("Hello world!");
+    let p = embassy_mspm0::init(Default::default());
+    let mut conf = Config::default();
+    conf.timeout = Timeout::Sec1;
+    // watchdog also resets the system if the pet comes too early,
+    // less than 250 msec == 25% from 1 sec
+    conf.closed_window = ClosedWindowPercentage::TwentyFive;
+    let mut wdt = Watchdog::new(p.WWDT0, conf);
+    info!("Started the watchdog timer");
+    let mut led1 = Output::new(p.PA0, Level::High);
+    led1.set_inversion(true);
+    Timer::after_millis(900).await;
+    for _ in 1..=5 {
+        info!("pet watchdog");
+        led1.toggle();
+        wdt.pet();
+        Timer::after_millis(500).await;
+    }
+    // watchdog timeout test
+    info!("Stopped the pet command, device will reset in less than 1 second");
+    loop {
+        led1.toggle();
+        Timer::after_millis(500).await;
+    }
+    // watchdog "too early" test
+    // info!("Device will reset when the pet comes too early");
+    // loop {
+    //     led1.toggle();
+    //     wdt.pet();
+    //     Timer::after_millis(200).await;
+    // }
+}
diff --git a/examples/nrf-rtos-trace/Cargo.toml b/examples/nrf-rtos-trace/Cargo.toml
index 5caabf228..3d6b5e60a 100644
--- a/examples/nrf-rtos-trace/Cargo.toml
+++ b/examples/nrf-rtos-trace/Cargo.toml
@@ -19,7 +19,7 @@ log = [
 embassy-sync = { version = "0.7.2", path = "../../embassy-sync" }
 embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "rtos-trace"] }
 embassy-time = { version = "0.5.0", path = "../../embassy-time" }
-embassy-nrf = { version = "0.8.0", path = "../../embassy-nrf", features = ["nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac"] }
+embassy-nrf = { version = "0.9.0", path = "../../embassy-nrf", features = ["nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac"] }
 cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] }
 cortex-m-rt = "0.7.0"
diff --git a/examples/nrf51/Cargo.toml b/examples/nrf51/Cargo.toml
index c7492f562..e8375952b 100644
--- a/examples/nrf51/Cargo.toml
+++ b/examples/nrf51/Cargo.toml
@@ -8,7 +8,7 @@ publish = false
 [dependencies]
 embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.5.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.8.0", path = "../../embassy-nrf", features = ["defmt", "nrf51", "gpiote", "time-driver-rtc1", "unstable-pac", "time", "rt"] }
+embassy-nrf = { version = "0.9.0", path = "../../embassy-nrf", features = ["defmt", "nrf51", "gpiote", "time-driver-rtc1", "unstable-pac", "time", "rt"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/nrf52810/Cargo.toml b/examples/nrf52810/Cargo.toml
index 1711a3d8d..73d129f91 100644
--- a/examples/nrf52810/Cargo.toml
+++ b/examples/nrf52810/Cargo.toml
@@ -10,7 +10,7 @@ embassy-futures = { version = "0.1.2", path = "../../embassy-futures" }
 embassy-sync = { version = "0.7.2", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.5.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.8.0", path = "../../embassy-nrf", features = ["defmt", "nrf52810", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.9.0", path = "../../embassy-nrf", features = ["defmt", "nrf52810", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/nrf52840-edf/Cargo.toml b/examples/nrf52840-edf/Cargo.toml
index 8b1db4652..8066a1150 100644
--- a/examples/nrf52840-edf/Cargo.toml
+++ b/examples/nrf52840-edf/Cargo.toml
@@ -9,7 +9,7 @@ publish = false
 # NOTE: "scheduler-deadline" and "embassy-time-driver" features are enabled
 embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "scheduler-deadline", "embassy-time-driver"] }
 embassy-time = { version = "0.5.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.8.0", path = "../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.9.0", path = "../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/nrf52840-rtic/Cargo.toml b/examples/nrf52840-rtic/Cargo.toml
index 26b21598f..13a7724fa 100644
--- a/examples/nrf52840-rtic/Cargo.toml
+++ b/examples/nrf52840-rtic/Cargo.toml
@@ -12,7 +12,7 @@ embassy-futures = { version = "0.1.2", path = "../../embassy-futures" }
 embassy-sync = { version = "0.7.2", path = "../../embassy-sync", features = ["defmt"] }
 embassy-time = { version = "0.5.0", path = "../../embassy-time", features = [ "defmt", "defmt-timestamp-uptime"] }
 embassy-time-queue-utils = { version = "0.3.0", path = "../../embassy-time-queue-utils", features = ["generic-queue-8"] }
-embassy-nrf = { version = "0.8.0", path = "../../embassy-nrf", features = [ "defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.9.0", path = "../../embassy-nrf", features = [ "defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/nrf52840/Cargo.toml b/examples/nrf52840/Cargo.toml
index 1fe3d2419..15c187328 100644
--- a/examples/nrf52840/Cargo.toml
+++ b/examples/nrf52840/Cargo.toml
@@ -10,11 +10,11 @@ embassy-futures = { version = "0.1.2", path = "../../embassy-futures" }
 embassy-sync = { version = "0.7.2", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.5.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.8.0", path = "../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time", "net-driver"] }
+embassy-nrf = { version = "0.9.0", path = "../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time", "net-driver"] }
 embassy-net = { version = "0.7.1", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet","udp", "medium-ieee802154", "proto-ipv6"] }
 embassy-usb = { version = "0.5.1", path = "../../embassy-usb", features = ["defmt"] }
-embedded-io = { version = "0.6.0", features = ["defmt-03"]  }
+embedded-io = { version = "0.7.1", features = ["defmt"]  }
-embedded-io-async = { version = "0.6.1", features = ["defmt-03"] }
+embedded-io-async = { version = "0.7.0", features = ["defmt"] }
 embassy-net-esp-hosted = { version = "0.2.1", path = "../../embassy-net-esp-hosted", features = ["defmt"] }
 embassy-net-enc28j60 = { version = "0.2.1", path = "../../embassy-net-enc28j60", features = ["defmt"] }
diff --git a/examples/nrf5340/Cargo.toml b/examples/nrf5340/Cargo.toml
index 97efe58e8..c54a84d22 100644
--- a/examples/nrf5340/Cargo.toml
+++ b/examples/nrf5340/Cargo.toml
@@ -10,10 +10,10 @@ embassy-futures = { version = "0.1.2", path = "../../embassy-futures" }
 embassy-sync = { version = "0.7.2", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.5.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.8.0", path = "../../embassy-nrf", features = ["defmt", "nrf5340-app-s", "time-driver-rtc1", "gpiote", "unstable-pac"] }
+embassy-nrf = { version = "0.9.0", path = "../../embassy-nrf", features = ["defmt", "nrf5340-app-s", "time-driver-rtc1", "gpiote", "unstable-pac"] }
 embassy-net = { version = "0.7.1", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] }
 embassy-usb = { version = "0.5.1", path = "../../embassy-usb", features = ["defmt"] }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/nrf54l15/Cargo.toml b/examples/nrf54l15/Cargo.toml
index f34df0f26..9940443ff 100644
--- a/examples/nrf54l15/Cargo.toml
+++ b/examples/nrf54l15/Cargo.toml
@@ -10,9 +10,9 @@ embassy-futures = { version = "0.1.2", path = "../../embassy-futures" }
 embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.5.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
 embassy-sync = { version = "0.7.2", path = "../../embassy-sync", features = ["defmt"] }
-embassy-nrf = { version = "0.8.0", path = "../../embassy-nrf", features = ["defmt", "nrf54l15-app-s", "time-driver-grtc", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.9.0", path = "../../embassy-nrf", features = ["defmt", "nrf54l15-app-s", "time-driver-grtc", "gpiote", "unstable-pac", "time"] }
-embedded-io = { version = "0.6.0", features = ["defmt-03"]  }
+embedded-io = { version = "0.7.0", features = ["defmt"]  }
-embedded-io-async = { version = "0.6.1", features = ["defmt-03"] }
+embedded-io-async = { version = "0.7.0", features = ["defmt"] }
 rand = { version = "0.9.0", default-features = false }
diff --git a/examples/nrf54lm20/Cargo.toml b/examples/nrf54lm20/Cargo.toml
index 5482fc77a..78ce60596 100644
--- a/examples/nrf54lm20/Cargo.toml
+++ b/examples/nrf54lm20/Cargo.toml
@@ -10,9 +10,9 @@ embassy-futures = { version = "0.1.2", path = "../../embassy-futures" }
 embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.5.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
 embassy-sync = { version = "0.7.2", path = "../../embassy-sync", features = ["defmt"] }
-embassy-nrf = { version = "0.8.0", path = "../../embassy-nrf", features = ["defmt", "nrf54lm20-app-s", "time-driver-grtc", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.9.0", path = "../../embassy-nrf", features = ["defmt", "nrf54lm20-app-s", "time-driver-grtc", "gpiote", "unstable-pac", "time"] }
-embedded-io = { version = "0.6.0", features = ["defmt-03"]  }
+embedded-io = { version = "0.7.0", features = ["defmt"]  }
-embedded-io-async = { version = "0.6.1", features = ["defmt-03"] }
+embedded-io-async = { version = "0.7.0", features = ["defmt"] }
 rand = { version = "0.9.0", default-features = false }
diff --git a/examples/nrf9151/ns/Cargo.toml b/examples/nrf9151/ns/Cargo.toml
index 7f1f5239a..f6d6aab6f 100644
--- a/examples/nrf9151/ns/Cargo.toml
+++ b/examples/nrf9151/ns/Cargo.toml
@@ -8,7 +8,7 @@ publish = false
 [dependencies]
 embassy-executor = { version = "0.9.0", path = "../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.5.0", path = "../../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.8.0", path = "../../../embassy-nrf", features = ["defmt", "nrf9120-ns", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.9.0", path = "../../../embassy-nrf", features = ["defmt", "nrf9120-ns", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/nrf9151/s/Cargo.toml b/examples/nrf9151/s/Cargo.toml
index ce71cc456..1c9e7fb35 100644
--- a/examples/nrf9151/s/Cargo.toml
+++ b/examples/nrf9151/s/Cargo.toml
@@ -8,7 +8,7 @@ publish = false
 [dependencies]
 embassy-executor = { version = "0.9.0", path = "../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.5.0", path = "../../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.8.0", path = "../../../embassy-nrf", features = ["defmt", "nrf9120-s", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.9.0", path = "../../../embassy-nrf", features = ["defmt", "nrf9120-s", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/nrf9160/Cargo.toml b/examples/nrf9160/Cargo.toml
index ae3b2eeb1..bad7fdc79 100644
--- a/examples/nrf9160/Cargo.toml
+++ b/examples/nrf9160/Cargo.toml
@@ -8,7 +8,7 @@ publish = false
 [dependencies]
 embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.5.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.8.0", path = "../../embassy-nrf", features = ["defmt", "nrf9160-s", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.9.0", path = "../../embassy-nrf", features = ["defmt", "nrf9160-s", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
 embassy-net-nrf91 = { version = "0.1.0", path = "../../embassy-net-nrf91", features = ["defmt"] }
 embassy-net = { version = "0.7.1", path = "../../embassy-net", features = ["defmt", "tcp", "proto-ipv4", "medium-ip"] }
@@ -20,8 +20,8 @@ cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-sing
 cortex-m-rt = "0.7.0"
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 static_cell = { version = "2" }
-embedded-io = "0.6.1"
+embedded-io = { version = "0.7.1" }
-embedded-io-async = { version = "0.6.1", features = ["defmt-03"] }
+embedded-io-async = { version = "0.7.0", features = ["defmt"] }
 [profile.release]
 debug = 2
diff --git a/examples/rp/Cargo.toml b/examples/rp/Cargo.toml
index e247f6f7a..1a5712dd3 100644
--- a/examples/rp/Cargo.toml
+++ b/examples/rp/Cargo.toml
@@ -26,7 +26,7 @@ fixed = "1.23.1"
 fixed-macro = "1.2"
 # for web request example
-reqwless = { version = "0.13.0", features = ["defmt"] }
+reqwless = { git = "https://github.com/drogue-iot/reqwless", rev = "68f703dfc16e6f7f964b7238c922c0d433118872", features = ["defmt"] }
 serde = { version = "1.0.203", default-features = false, features = ["derive"] }
 serde-json-core = "0.5.1"
@@ -50,7 +50,7 @@ usbd-hid = "0.9.0"
 embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
 embedded-hal-async = "1.0"
 embedded-hal-bus = { version = "0.1", features = ["async"] }
-embedded-io-async = { version = "0.6.1", features = ["defmt-03"] }
+embedded-io-async = { version = "0.7.0", features = ["defmt"] }
 embedded-storage = { version = "0.3" }
 static_cell = "2.1"
 portable-atomic = { version = "1.5", features = ["critical-section"] }
diff --git a/examples/rp/src/bin/usb_webusb.rs b/examples/rp/src/bin/usb_webusb.rs
index 5cecb92f0..edc9a0c52 100644
--- a/examples/rp/src/bin/usb_webusb.rs
+++ b/examples/rp/src/bin/usb_webusb.rs
@@ -26,6 +26,7 @@ use embassy_rp::usb::{Driver as UsbDriver, InterruptHandler};
 use embassy_usb::class::web_usb::{Config as WebUsbConfig, State, Url, WebUsb};
 use embassy_usb::driver::{Driver, Endpoint, EndpointIn, EndpointOut};
 use embassy_usb::msos::{self, windows_version};
+use embassy_usb::types::InterfaceNumber;
 use embassy_usb::{Builder, Config};
 use {defmt_rtt as _, panic_probe as _};
@@ -56,7 +57,7 @@ async fn main(_spawner: Spawner) {
    let mut config_descriptor = [0; 256];
    let mut bos_descriptor = [0; 256];
    let mut control_buf = [0; 64];
-    let mut msos_descriptor = [0; 256];
+    let mut msos_descriptor = [0; 512];
    let webusb_config = WebUsbConfig {
        max_packet_size: 64,
@@ -83,6 +84,14 @@ async fn main(_spawner: Spawner) {
    // In principle you might want to call msos_feature() just on a specific function,
    // if your device also has other functions that still use standard class drivers.
    builder.msos_descriptor(windows_version::WIN8_1, 0);
+    builder.msos_writer().configuration(0);
+    builder.msos_writer().function(InterfaceNumber(0));
+    builder.msos_feature(msos::CompatibleIdFeatureDescriptor::new("WINUSB", ""));
+    builder.msos_feature(msos::RegistryPropertyFeatureDescriptor::new(
+        "DeviceInterfaceGUIDs",
+        msos::PropertyData::RegMultiSz(DEVICE_INTERFACE_GUIDS),
+    ));
+    builder.msos_writer().function(InterfaceNumber(1));
    builder.msos_feature(msos::CompatibleIdFeatureDescriptor::new("WINUSB", ""));
    builder.msos_feature(msos::RegistryPropertyFeatureDescriptor::new(
        "DeviceInterfaceGUIDs",
diff --git a/examples/rp235x/Cargo.toml b/examples/rp235x/Cargo.toml
index 16dfb5b77..bc2bcf5b6 100644
--- a/examples/rp235x/Cargo.toml
+++ b/examples/rp235x/Cargo.toml
@@ -51,7 +51,7 @@ usbd-hid = "0.9.0"
 embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
 embedded-hal-async = "1.0"
 embedded-hal-bus = { version = "0.1", features = ["async"] }
-embedded-io-async = { version = "0.6.1", features = ["defmt-03"] }
+embedded-io-async = { version = "0.7.0", features = ["defmt"] }
 embedded-storage = { version = "0.3" }
 static_cell = "2.1"
 portable-atomic = { version = "1.5", features = ["critical-section"] }
diff --git a/examples/std/Cargo.toml b/examples/std/Cargo.toml
index 6dc6a353d..06f1ba67e 100644
--- a/examples/std/Cargo.toml
+++ b/examples/std/Cargo.toml
@@ -10,10 +10,10 @@ embassy-sync = { version = "0.7.2", path = "../../embassy-sync", features = ["lo
 embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["arch-std", "executor-thread", "log"] }
 embassy-time = { version = "0.5.0", path = "../../embassy-time", features = ["log", "std", ] }
 embassy-net = { version = "0.7.1", path = "../../embassy-net", features=[ "log", "medium-ethernet", "medium-ip", "tcp", "udp", "dns", "dhcpv4", "proto-ipv6"] }
-embassy-net-tuntap = { version = "0.1.0", path = "../../embassy-net-tuntap" }
+embassy-net-tuntap = { version = "0.1.1", path = "../../embassy-net-tuntap" }
 embassy-net-ppp = { version = "0.2.1", path = "../../embassy-net-ppp", features = ["log"]}
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
-embedded-io-adapters = { version = "0.6.1", features = ["futures-03"] }
+embedded-io-adapters = { version = "0.7.0", features = ["futures-03"] }
 critical-section = { version = "1.1", features = ["std"] }
 async-io = "1.6.0"
diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml
index b4555045a..5bcf66ade 100644
--- a/examples/stm32f4/Cargo.toml
+++ b/examples/stm32f4/Cargo.toml
@@ -23,8 +23,8 @@ cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-sing
 cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
 embedded-hal-bus = { version = "0.2", features = ["async"] }
-embedded-io = { version = "0.6.0" }
+embedded-io = { version = "0.7.1" }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 futures-util = { version = "0.3.30", default-features = false }
 heapless = { version = "0.8", default-features = false }
diff --git a/examples/stm32f7/Cargo.toml b/examples/stm32f7/Cargo.toml
index 565277394..a952b770b 100644
--- a/examples/stm32f7/Cargo.toml
+++ b/examples/stm32f7/Cargo.toml
@@ -12,7 +12,7 @@ embassy-sync = { version = "0.7.2", path = "../../embassy-sync", features = ["de
 embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.5.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
 embassy-net = { version = "0.7.1", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
diff --git a/examples/stm32g0/Cargo.toml b/examples/stm32g0/Cargo.toml
index 16f28500d..a25a01e59 100644
--- a/examples/stm32g0/Cargo.toml
+++ b/examples/stm32g0/Cargo.toml
@@ -24,7 +24,7 @@ panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 heapless = { version = "0.8", default-features = false }
 portable-atomic = { version = "1.5", features = ["unsafe-assume-single-core"] }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 [profile.release]
 debug = 2
diff --git a/examples/stm32h5/Cargo.toml b/examples/stm32h5/Cargo.toml
index 512186c3d..f674a2936 100644
--- a/examples/stm32h5/Cargo.toml
+++ b/examples/stm32h5/Cargo.toml
@@ -23,8 +23,8 @@ cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
 embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
 embedded-hal-async = { version = "1.0" }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
-embedded-nal-async = "0.8.0"
+embedded-nal-async = "0.9.0"
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 heapless = { version = "0.8", default-features = false }
 critical-section = "1.1"
diff --git a/examples/stm32h7/Cargo.toml b/examples/stm32h7/Cargo.toml
index 09b734054..8f4b2bf4f 100644
--- a/examples/stm32h7/Cargo.toml
+++ b/examples/stm32h7/Cargo.toml
@@ -24,8 +24,8 @@ cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
 embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
 embedded-hal-async = { version = "1.0" }
-embedded-nal-async = "0.8.0"
+embedded-nal-async = "0.9.0"
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 heapless = { version = "0.8", default-features = false }
 critical-section = "1.1"
diff --git a/examples/stm32h723/Cargo.toml b/examples/stm32h723/Cargo.toml
index 93a5109e2..8b3f8dc55 100644
--- a/examples/stm32h723/Cargo.toml
+++ b/examples/stm32h723/Cargo.toml
@@ -21,8 +21,8 @@ cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
 embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
 embedded-hal-async = { version = "1.0" }
-embedded-nal-async = "0.8.0"
+embedded-nal-async = "0.9.0"
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 heapless = { version = "0.8", default-features = false }
 critical-section = "1.1"
diff --git a/examples/stm32h742/Cargo.toml b/examples/stm32h742/Cargo.toml
index 9b5e5d93d..7ff4dfbe4 100644
--- a/examples/stm32h742/Cargo.toml
+++ b/examples/stm32h742/Cargo.toml
@@ -33,7 +33,7 @@ embassy-net = { version = "0.7.1", path = "../../embassy-net", features = [
    "dhcpv4",
    "medium-ethernet",
 ] }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 embassy-usb = { version = "0.5.1", path = "../../embassy-usb", features = [
    "defmt",
 ] }
diff --git a/examples/stm32h755cm4/Cargo.toml b/examples/stm32h755cm4/Cargo.toml
index d69f0228e..e5be0056f 100644
--- a/examples/stm32h755cm4/Cargo.toml
+++ b/examples/stm32h755cm4/Cargo.toml
@@ -24,8 +24,8 @@ cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
 embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
 embedded-hal-async = { version = "1.0" }
-embedded-nal-async = "0.8.0"
+embedded-nal-async = "0.9.0"
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 heapless = { version = "0.8", default-features = false }
 critical-section = "1.1"
diff --git a/examples/stm32h755cm7/Cargo.toml b/examples/stm32h755cm7/Cargo.toml
index f4e1e53b7..42c05549b 100644
--- a/examples/stm32h755cm7/Cargo.toml
+++ b/examples/stm32h755cm7/Cargo.toml
@@ -24,8 +24,8 @@ cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
 embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
 embedded-hal-async = { version = "1.0" }
-embedded-nal-async = "0.8.0"
+embedded-nal-async = "0.9.0"
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 heapless = { version = "0.8", default-features = false }
 critical-section = "1.1"
diff --git a/examples/stm32h7b0/Cargo.toml b/examples/stm32h7b0/Cargo.toml
index 0509d394d..434bfebce 100644
--- a/examples/stm32h7b0/Cargo.toml
+++ b/examples/stm32h7b0/Cargo.toml
@@ -23,8 +23,8 @@ cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
 embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
 embedded-hal-async = { version = "1.0" }
-embedded-nal-async = "0.8.0"
+embedded-nal-async = "0.9.0"
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 heapless = { version = "0.8", default-features = false }
 critical-section = "1.1"
diff --git a/examples/stm32h7rs/Cargo.toml b/examples/stm32h7rs/Cargo.toml
index ab525ad91..74664432f 100644
--- a/examples/stm32h7rs/Cargo.toml
+++ b/examples/stm32h7rs/Cargo.toml
@@ -23,8 +23,8 @@ cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
 embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
 embedded-hal-async = { version = "1.0" }
-embedded-nal-async = "0.8.0"
+embedded-nal-async = "0.9.0"
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 heapless = { version = "0.8", default-features = false }
 critical-section = "1.1"
diff --git a/examples/stm32l0/Cargo.toml b/examples/stm32l0/Cargo.toml
index a9c71d655..c06c761c9 100644
--- a/examples/stm32l0/Cargo.toml
+++ b/examples/stm32l0/Cargo.toml
@@ -18,8 +18,8 @@ defmt = "1.0.1"
 defmt-rtt = "1.0.0"
 embedded-storage = "0.3.1"
-embedded-io = { version = "0.6.0" }
+embedded-io = { version = "0.7.1" }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] }
 cortex-m-rt = "0.7.0"
diff --git a/examples/stm32l4/Cargo.toml b/examples/stm32l4/Cargo.toml
index 936472199..995c8c694 100644
--- a/examples/stm32l4/Cargo.toml
+++ b/examples/stm32l4/Cargo.toml
@@ -16,8 +16,8 @@ embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defm
 embassy-net-adin1110 = { version = "0.3.1", path = "../../embassy-net-adin1110" }
 embassy-net = { version = "0.7.1", path = "../../embassy-net", features = ["defmt",  "udp", "tcp", "dhcpv4", "medium-ethernet"] }
 embassy-futures = { version = "0.1.2", path = "../../embassy-futures" }
-embedded-io-async = { version = "0.6.1", features = ["defmt-03"] }
+embedded-io-async = { version = "0.7.0", features = ["defmt"] }
-embedded-io = { version = "0.6.0", features = ["defmt-03"] }
+embedded-io = { version = "0.7.1", features = ["defmt"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/stm32l5/Cargo.toml b/examples/stm32l5/Cargo.toml
index 586b00836..b6d14ce25 100644
--- a/examples/stm32l5/Cargo.toml
+++ b/examples/stm32l5/Cargo.toml
@@ -24,7 +24,7 @@ cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-sing
 cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
 heapless = { version = "0.8", default-features = false }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 static_cell = "2"
 [profile.release]
diff --git a/examples/stm32n6/Cargo.toml b/examples/stm32n6/Cargo.toml
index 5ad5b97ce..fdfaed531 100644
--- a/examples/stm32n6/Cargo.toml
+++ b/examples/stm32n6/Cargo.toml
@@ -23,7 +23,7 @@ cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
 embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
 embedded-hal-async = { version = "1.0" }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 embedded-nal-async = "0.8.0"
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 heapless = { version = "0.8", default-features = false }
diff --git a/examples/stm32wb/Cargo.toml b/examples/stm32wb/Cargo.toml
index 83f7cb56b..496500f75 100644
--- a/examples/stm32wb/Cargo.toml
+++ b/examples/stm32wb/Cargo.toml
@@ -7,10 +7,10 @@ publish = false
 [dependencies]
 # Change stm32wb55rg to your chip name in both dependencies, if necessary.
-embassy-stm32 = { version = "0.4.0", path = "../../embassy-stm32", features = [ "defmt", "stm32wb55rg", "time-driver-any", "memory-x", "exti", "low-power"]  }
+embassy-stm32 = { version = "0.4.0", path = "../../embassy-stm32", features = [ "defmt", "stm32wb55rg", "time-driver-any", "memory-x", "exti", "low-power-pender"]  }
 embassy-stm32-wpan = { version = "0.1.0", path = "../../embassy-stm32-wpan", features = ["defmt", "stm32wb55rg"] }
 embassy-sync = { version = "0.7.2", path = "../../embassy-sync", features = ["defmt"] }
-embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
+embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["defmt"] }
 embassy-time = { version = "0.5.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
 embassy-net = { version = "0.7.1", path = "../../embassy-net", features = ["defmt", "udp", "proto-ipv6", "medium-ieee802154", ], optional = true }
diff --git a/examples/stm32wb/src/bin/blinky.rs b/examples/stm32wb/src/bin/blinky.rs
index f37e8b1d8..e2737fcd5 100644
--- a/examples/stm32wb/src/bin/blinky.rs
+++ b/examples/stm32wb/src/bin/blinky.rs
@@ -7,7 +7,7 @@ use embassy_stm32::gpio::{Level, Output, Speed};
 use embassy_time::Timer;
 use {defmt_rtt as _, panic_probe as _};
-#[embassy_executor::main]
+#[embassy_executor::main(executor = "embassy_stm32::Executor", entry = "cortex_m_rt::entry")]
 async fn main(_spawner: Spawner) {
    let p = embassy_stm32::init(Default::default());
    info!("Hello World!");
diff --git a/examples/stm32wb/src/bin/button_exti.rs b/examples/stm32wb/src/bin/button_exti.rs
index 3c58eb556..37a207519 100644
--- a/examples/stm32wb/src/bin/button_exti.rs
+++ b/examples/stm32wb/src/bin/button_exti.rs
@@ -13,7 +13,7 @@ bind_interrupts!(
        EXTI4 => exti::InterruptHandler<interrupt::typelevel::EXTI4>;
 });
-#[embassy_executor::main]
+#[embassy_executor::main(executor = "embassy_stm32::Executor", entry = "cortex_m_rt::entry")]
 async fn main(_spawner: Spawner) {
    let p = embassy_stm32::init(Default::default());
    info!("Hello World!");
diff --git a/examples/stm32wb/src/bin/eddystone_beacon.rs b/examples/stm32wb/src/bin/eddystone_beacon.rs
index 413b1ac8f..a679e6fb1 100644
--- a/examples/stm32wb/src/bin/eddystone_beacon.rs
+++ b/examples/stm32wb/src/bin/eddystone_beacon.rs
@@ -26,7 +26,7 @@ bind_interrupts!(struct Irqs{
 const BLE_GAP_DEVICE_NAME_LENGTH: u8 = 7;
-#[embassy_executor::main]
+#[embassy_executor::main(executor = "embassy_stm32::Executor", entry = "cortex_m_rt::entry")]
 async fn main(_spawner: Spawner) {
    /*
        How to make this work:
diff --git a/examples/stm32wb/src/bin/gatt_server.rs b/examples/stm32wb/src/bin/gatt_server.rs
index 3484f1844..10c7fd0ba 100644
--- a/examples/stm32wb/src/bin/gatt_server.rs
+++ b/examples/stm32wb/src/bin/gatt_server.rs
@@ -38,7 +38,7 @@ bind_interrupts!(struct Irqs{
 const BLE_GAP_DEVICE_NAME_LENGTH: u8 = 7;
-#[embassy_executor::main]
+#[embassy_executor::main(executor = "embassy_stm32::Executor", entry = "cortex_m_rt::entry")]
 async fn main(spawner: Spawner) {
    /*
        How to make this work:
diff --git a/examples/stm32wb/src/bin/mac_ffd.rs b/examples/stm32wb/src/bin/mac_ffd.rs
index 4bab6ea9f..cd15968d2 100644
--- a/examples/stm32wb/src/bin/mac_ffd.rs
+++ b/examples/stm32wb/src/bin/mac_ffd.rs
@@ -23,7 +23,7 @@ async fn run_mm_queue(mut memory_manager: mm::MemoryManager<'static>) {
    memory_manager.run_queue().await;
 }
-#[embassy_executor::main]
+#[embassy_executor::main(executor = "embassy_stm32::Executor", entry = "cortex_m_rt::entry")]
 async fn main(spawner: Spawner) {
    /*
        How to make this work:
diff --git a/examples/stm32wb/src/bin/mac_ffd_net.rs b/examples/stm32wb/src/bin/mac_ffd_net.rs
index b4789e3ee..244b35243 100644
--- a/examples/stm32wb/src/bin/mac_ffd_net.rs
+++ b/examples/stm32wb/src/bin/mac_ffd_net.rs
@@ -41,7 +41,7 @@ async fn run_net(mut runner: embassy_net::Runner<'static, Driver<'static>>) -> !
    runner.run().await
 }
-#[embassy_executor::main]
+#[embassy_executor::main(executor = "embassy_stm32::Executor", entry = "cortex_m_rt::entry")]
 async fn main(spawner: Spawner) {
    /*
        How to make this work:
diff --git a/examples/stm32wb/src/bin/mac_rfd.rs b/examples/stm32wb/src/bin/mac_rfd.rs
index dae3c5200..f3e65c66b 100644
--- a/examples/stm32wb/src/bin/mac_rfd.rs
+++ b/examples/stm32wb/src/bin/mac_rfd.rs
@@ -25,7 +25,7 @@ async fn run_mm_queue(mut memory_manager: mm::MemoryManager<'static>) {
    memory_manager.run_queue().await;
 }
-#[embassy_executor::main]
+#[embassy_executor::main(executor = "embassy_stm32::Executor", entry = "cortex_m_rt::entry")]
 async fn main(spawner: Spawner) {
    /*
        How to make this work:
diff --git a/examples/stm32wb/src/bin/tl_mbox.rs b/examples/stm32wb/src/bin/tl_mbox.rs
index 0902e28e8..adb6eff7b 100644
--- a/examples/stm32wb/src/bin/tl_mbox.rs
+++ b/examples/stm32wb/src/bin/tl_mbox.rs
@@ -15,7 +15,7 @@ bind_interrupts!(struct Irqs{
    IPCC_C1_TX => TransmitInterruptHandler;
 });
-#[embassy_executor::main]
+#[embassy_executor::main(executor = "embassy_stm32::Executor", entry = "cortex_m_rt::entry")]
 async fn main(_spawner: Spawner) {
    /*
        How to make this work:
diff --git a/examples/stm32wb/src/bin/tl_mbox_ble.rs b/examples/stm32wb/src/bin/tl_mbox_ble.rs
index 763dc32cd..376b808de 100644
--- a/examples/stm32wb/src/bin/tl_mbox_ble.rs
+++ b/examples/stm32wb/src/bin/tl_mbox_ble.rs
@@ -20,7 +20,7 @@ async fn run_mm_queue(mut memory_manager: mm::MemoryManager<'static>) {
    memory_manager.run_queue().await;
 }
-#[embassy_executor::main]
+#[embassy_executor::main(executor = "embassy_stm32::Executor", entry = "cortex_m_rt::entry")]
 async fn main(spawner: Spawner) {
    /*
        How to make this work:
diff --git a/examples/stm32wb/src/bin/tl_mbox_mac.rs b/examples/stm32wb/src/bin/tl_mbox_mac.rs
index 235a48241..697e061c1 100644
--- a/examples/stm32wb/src/bin/tl_mbox_mac.rs
+++ b/examples/stm32wb/src/bin/tl_mbox_mac.rs
@@ -20,7 +20,7 @@ async fn run_mm_queue(mut memory_manager: mm::MemoryManager<'static>) {
    memory_manager.run_queue().await;
 }
-#[embassy_executor::main]
+#[embassy_executor::main(executor = "embassy_stm32::Executor", entry = "cortex_m_rt::entry")]
 async fn main(spawner: Spawner) {
    /*
        How to make this work:
diff --git a/examples/stm32wba/src/bin/mac_ffd.rs b/examples/stm32wba/src/bin/mac_ffd.rs
index b15fb3452..329a73c6d 100644
--- a/examples/stm32wba/src/bin/mac_ffd.rs
+++ b/examples/stm32wba/src/bin/mac_ffd.rs
@@ -5,7 +5,7 @@ use defmt::*;
 use embassy_executor::Spawner;
 use embassy_stm32::Config;
 use embassy_stm32::rcc::{Sysclk, mux};
-use embassy_stm32_wpan::bindings::mac::ST_MAC_callbacks_t;
+use embassy_stm32_wpan::bindings::mac::{ST_MAC_callbacks_t, ST_MAC_init};
 use {defmt_rtt as _, panic_probe as _};
 static _MAC_CALLBACKS: ST_MAC_callbacks_t = ST_MAC_callbacks_t {
@@ -50,9 +50,9 @@ async fn main(_spawner: Spawner) {
    let _p = embassy_stm32::init(config);
    info!("Hello World!");
-    //    let status = unsafe { ST_MAC_init(&_MAC_CALLBACKS as *const _ as *mut _) };
+    let status = unsafe { ST_MAC_init(&_MAC_CALLBACKS as *const _ as *mut _) };
-    //
-    //    info!("mac init: {}", status);
+    info!("mac init: {}", status);
    cortex_m::asm::bkpt();
 }
diff --git a/examples/stm32wl5x-lp/.cargo/config.toml b/examples/stm32wl5x-lp/.cargo/config.toml
new file mode 100644
index 000000000..969068656
--- /dev/null
+++ b/examples/stm32wl5x-lp/.cargo/config.toml
@@ -0,0 +1,9 @@
+[target.'cfg(all(target_arch = "arm", target_os = "none"))']
+# replace your chip as listed in `probe-rs chip list`
+runner = "probe-rs run --chip STM32WLE5JCIx --connect-under-reset"
+[build]
+target = "thumbv7em-none-eabi"
+[env]
+DEFMT_LOG = "debug"
diff --git a/examples/stm32wl5x-lp/Cargo.toml b/examples/stm32wl5x-lp/Cargo.toml
new file mode 100644
index 000000000..b1823fb8a
--- /dev/null
+++ b/examples/stm32wl5x-lp/Cargo.toml
@@ -0,0 +1,39 @@
+[package]
+edition = "2024"
+name = "embassy-stm32wl5x-lp"
+version = "0.1.0"
+license = "MIT OR Apache-2.0"
+publish = false
+[dependencies]
+# Change stm32wl55jc-cm4 to your chip name, if necessary.
+embassy-stm32 = { version = "0.4.0", path = "../../embassy-stm32", features = ["defmt", "stm32wl55jc-cm4", "time-driver-any", "memory-x", "unstable-pac", "exti", "chrono", "low-power-pender"] }
+embassy-sync = { version = "0.7.2", path = "../../embassy-sync", features = ["defmt"] }
+embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["defmt"] }
+embassy-time = { version = "0.5.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
+embassy-embedded-hal = { version = "0.5.0", path = "../../embassy-embedded-hal" }
+defmt = "1.0.1"
+defmt-rtt = { version = "1.1.0", optional = true }
+defmt-serial = { git = "https://github.com/gauteh/defmt-serial", rev = "411ae7fa909b4fd2667885aff687e009b9108190", optional = true }
+cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] }
+cortex-m-rt = "0.7.0"
+embedded-hal = "1.0.0"
+embedded-storage = "0.3.1"
+panic-probe = { version = "1.0.0", features = ["print-defmt"] }
+chrono = { version = "^0.4", default-features = false }
+static_cell = { version = "2.1.1", default-features = false }
+[profile.release]
+debug = 2
+[package.metadata.embassy]
+build = [
+  { target = "thumbv7em-none-eabi", artifact-dir = "out/examples/stm32wl" }
+]
+[features]
+default = ["defmt-serial"]
+defmt-rtt = ["dep:defmt-rtt"]
+defmt-serial = ["dep:defmt-serial"]
diff --git a/examples/stm32wl5x-lp/build.rs b/examples/stm32wl5x-lp/build.rs
new file mode 100644
index 000000000..8cd32d7ed
--- /dev/null
+++ b/examples/stm32wl5x-lp/build.rs
@@ -0,0 +1,5 @@
+fn main() {
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
+}
diff --git a/examples/stm32wl5x-lp/memory.x b/examples/stm32wl5x-lp/memory.x
new file mode 100644
index 000000000..4590867a8
--- /dev/null
+++ b/examples/stm32wl5x-lp/memory.x
@@ -0,0 +1,15 @@
+MEMORY
+{
+  /* NOTE 1 K = 1 KiBi = 1024 bytes */
+  FLASH                             : ORIGIN = 0x08000000, LENGTH = 256K
+  SHARED_RAM                  (rwx) : ORIGIN = 0x20000000, LENGTH = 128
+  RAM                         (rwx) : ORIGIN = 0x20000080, LENGTH = 64K - 128
+}
+SECTIONS
+{
+    .shared_data :
+    {
+        *(.shared_data)
+    } > SHARED_RAM
+}
diff --git a/examples/stm32wl5x-lp/src/bin/blinky.rs b/examples/stm32wl5x-lp/src/bin/blinky.rs
new file mode 100644
index 000000000..60b671a77
--- /dev/null
+++ b/examples/stm32wl5x-lp/src/bin/blinky.rs
@@ -0,0 +1,57 @@
+// This example is configured for the nucleo-wl55jc board. Curret monitor should show just a few microamps when the device is in stop2 mode.
+#![no_std]
+#![no_main]
+use core::mem::MaybeUninit;
+use defmt::*;
+#[cfg(feature = "defmt-rtt")]
+use defmt_rtt as _;
+use embassy_executor::Spawner;
+use embassy_stm32::SharedData;
+use embassy_stm32::gpio::{Level, Output, Speed};
+use embassy_time::Timer;
+use panic_probe as _;
+#[unsafe(link_section = ".shared_data")]
+static SHARED_DATA: MaybeUninit<SharedData> = MaybeUninit::uninit();
+#[embassy_executor::main(executor = "embassy_stm32::Executor", entry = "cortex_m_rt::entry")]
+async fn async_main(_spawner: Spawner) {
+    let mut config = embassy_stm32::Config::default();
+    config.rcc.ls = embassy_stm32::rcc::LsConfig::default_lsi();
+    config.rcc.msi = Some(embassy_stm32::rcc::MSIRange::RANGE4M);
+    config.rcc.sys = embassy_stm32::rcc::Sysclk::MSI;
+    #[cfg(feature = "defmt-serial")]
+    {
+        // disable debug during sleep to reduce power consumption since we are
+        // using defmt-serial on LPUART1.
+        config.enable_debug_during_sleep = false;
+    }
+    let p = embassy_stm32::init_primary(config, &SHARED_DATA);
+    #[cfg(feature = "defmt-serial")]
+    {
+        use embassy_stm32::mode::Blocking;
+        use embassy_stm32::usart::Uart;
+        use static_cell::StaticCell;
+        let config = embassy_stm32::usart::Config::default();
+        let uart = Uart::new_blocking(p.LPUART1, p.PA3, p.PA2, config).expect("failed to configure UART!");
+        static SERIAL: StaticCell<Uart<'static, Blocking>> = StaticCell::new();
+        defmt_serial::defmt_serial(SERIAL.init(uart));
+    }
+    info!("Hello World!");
+    let mut led = Output::new(p.PB15, Level::High, Speed::Low);
+    loop {
+        info!("low");
+        led.set_low();
+        Timer::after_millis(5000).await;
+        info!("high");
+        led.set_high();
+        Timer::after_millis(5000).await;
+    }
+}
diff --git a/examples/stm32wle5/Cargo.toml b/examples/stm32wle5/Cargo.toml
index f2fc4dd3d..64c81c761 100644
--- a/examples/stm32wle5/Cargo.toml
+++ b/examples/stm32wle5/Cargo.toml
@@ -15,7 +15,7 @@ embassy-embedded-hal = { version = "0.5.0", path = "../../embassy-embedded-hal"
 defmt = "1.0.1"
 defmt-rtt = { version = "1.1.0", optional = true }
-defmt-serial = { version = "0.10.0", optional = true }
+defmt-serial = { git = "https://github.com/gauteh/defmt-serial", rev = "411ae7fa909b4fd2667885aff687e009b9108190", optional = true }
 cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] }
 cortex-m-rt = "0.7.0"
diff --git a/examples/stm32wle5/src/bin/adc.rs b/examples/stm32wle5/src/bin/adc.rs
index ea91fb063..8cc84ccdf 100644
--- a/examples/stm32wle5/src/bin/adc.rs
+++ b/examples/stm32wle5/src/bin/adc.rs
@@ -34,24 +34,6 @@ async fn async_main(_spawner: Spawner) {
    // Initialize STM32WL peripherals (use default config like wio-e5-async example)
    let p = embassy_stm32::init(config);
-    // start with all GPIOs as analog to reduce power consumption
-    for r in [
-        embassy_stm32::pac::GPIOA,
-        embassy_stm32::pac::GPIOB,
-        embassy_stm32::pac::GPIOC,
-        embassy_stm32::pac::GPIOH,
-    ] {
-        r.moder().modify(|w| {
-            for i in 0..16 {
-                // don't reset these if probe-rs should stay connected!
-                #[cfg(feature = "defmt-rtt")]
-                if config.enable_debug_during_sleep && r == embassy_stm32::pac::GPIOA && [13, 14].contains(&i) {
-                    continue;
-                }
-                w.set_moder(i, embassy_stm32::pac::gpio::vals::Moder::ANALOG);
-            }
-        });
-    }
    #[cfg(feature = "defmt-serial")]
    {
        use embassy_stm32::mode::Blocking;
diff --git a/examples/stm32wle5/src/bin/blinky.rs b/examples/stm32wle5/src/bin/blinky.rs
index 9f0c04672..3b7eb7761 100644
--- a/examples/stm32wle5/src/bin/blinky.rs
+++ b/examples/stm32wle5/src/bin/blinky.rs
@@ -32,24 +32,6 @@ async fn async_main(_spawner: Spawner) {
    // Initialize STM32WL peripherals (use default config like wio-e5-async example)
    let p = embassy_stm32::init(config);
-    // start with all GPIOs as analog to reduce power consumption
-    for r in [
-        embassy_stm32::pac::GPIOA,
-        embassy_stm32::pac::GPIOB,
-        embassy_stm32::pac::GPIOC,
-        embassy_stm32::pac::GPIOH,
-    ] {
-        r.moder().modify(|w| {
-            for i in 0..16 {
-                // don't reset these if probe-rs should stay connected!
-                #[cfg(feature = "defmt-rtt")]
-                if config.enable_debug_during_sleep && r == embassy_stm32::pac::GPIOA && [13, 14].contains(&i) {
-                    continue;
-                }
-                w.set_moder(i, embassy_stm32::pac::gpio::vals::Moder::ANALOG);
-            }
-        });
-    }
    #[cfg(feature = "defmt-serial")]
    {
        use embassy_stm32::mode::Blocking;
@@ -67,10 +49,10 @@ async fn async_main(_spawner: Spawner) {
    loop {
        info!("low");
        led.set_low();
-        Timer::after_millis(500).await;
+        Timer::after_millis(15000).await;
        info!("high");
        led.set_high();
-        Timer::after_millis(500).await;
+        Timer::after_millis(15000).await;
    }
 }
diff --git a/examples/stm32wle5/src/bin/button_exti.rs b/examples/stm32wle5/src/bin/button_exti.rs
index f248b6147..9ffc39948 100644
--- a/examples/stm32wle5/src/bin/button_exti.rs
+++ b/examples/stm32wle5/src/bin/button_exti.rs
@@ -39,24 +39,6 @@ async fn async_main(_spawner: Spawner) {
    // Initialize STM32WL peripherals (use default config like wio-e5-async example)
    let p = embassy_stm32::init(config);
-    // start with all GPIOs as analog to reduce power consumption
-    for r in [
-        embassy_stm32::pac::GPIOA,
-        embassy_stm32::pac::GPIOB,
-        embassy_stm32::pac::GPIOC,
-        embassy_stm32::pac::GPIOH,
-    ] {
-        r.moder().modify(|w| {
-            for i in 0..16 {
-                // don't reset these if probe-rs should stay connected!
-                #[cfg(feature = "defmt-rtt")]
-                if config.enable_debug_during_sleep && r == embassy_stm32::pac::GPIOA && [13, 14].contains(&i) {
-                    continue;
-                }
-                w.set_moder(i, embassy_stm32::pac::gpio::vals::Moder::ANALOG);
-            }
-        });
-    }
    #[cfg(feature = "defmt-serial")]
    {
        use embassy_stm32::mode::Blocking;
diff --git a/examples/stm32wle5/src/bin/i2c.rs b/examples/stm32wle5/src/bin/i2c.rs
index 68c17a672..8e7a6e2d8 100644
--- a/examples/stm32wle5/src/bin/i2c.rs
+++ b/examples/stm32wle5/src/bin/i2c.rs
@@ -40,24 +40,6 @@ async fn async_main(_spawner: Spawner) {
    // Initialize STM32WL peripherals (use default config like wio-e5-async example)
    let p = embassy_stm32::init(config);
-    // start with all GPIOs as analog to reduce power consumption
-    for r in [
-        embassy_stm32::pac::GPIOA,
-        embassy_stm32::pac::GPIOB,
-        embassy_stm32::pac::GPIOC,
-        embassy_stm32::pac::GPIOH,
-    ] {
-        r.moder().modify(|w| {
-            for i in 0..16 {
-                // don't reset these if probe-rs should stay connected!
-                #[cfg(feature = "defmt-rtt")]
-                if config.enable_debug_during_sleep && r == embassy_stm32::pac::GPIOA && [13, 14].contains(&i) {
-                    continue;
-                }
-                w.set_moder(i, embassy_stm32::pac::gpio::vals::Moder::ANALOG);
-            }
-        });
-    }
    #[cfg(feature = "defmt-serial")]
    {
        use embassy_stm32::mode::Blocking;
@@ -79,7 +61,7 @@ async fn async_main(_spawner: Spawner) {
    let mut i2c = I2c::new(p.I2C2, p.PB15, p.PA15, IrqsI2C, p.DMA1_CH6, p.DMA1_CH7, {
        let mut config = i2c::Config::default();
        config.frequency = Hertz::khz(100);
-        config.timeout = Duration::from_millis(500);
+        config.timeout = Duration::from_millis(1000);
        config
    });
diff --git a/tests/mspm0/Cargo.toml b/tests/mspm0/Cargo.toml
index df52b538d..56b027feb 100644
--- a/tests/mspm0/Cargo.toml
+++ b/tests/mspm0/Cargo.toml
@@ -26,8 +26,8 @@ cortex-m = { version = "0.7.6", features = [ "inline-asm", "critical-section-sin
 cortex-m-rt = "0.7.0"
 embedded-hal = { package = "embedded-hal", version = "1.0" }
 embedded-hal-async = { version = "1.0" }
-embedded-io = { version = "0.6.1", features = ["defmt-03"] }
+embedded-io = { version = "0.7.1", features = ["defmt"] }
-embedded-io-async = { version = "0.6.1", features = ["defmt-03"] }
+embedded-io-async = { version = "0.7.0", features = ["defmt"] }
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 static_cell = "2"
 portable-atomic = { version = "1.5", features = ["critical-section"] }
diff --git a/tests/nrf/Cargo.toml b/tests/nrf/Cargo.toml
index 3a9b86cef..b1e0a68c2 100644
--- a/tests/nrf/Cargo.toml
+++ b/tests/nrf/Cargo.toml
@@ -12,8 +12,8 @@ embassy-futures = { version = "0.1.2", path = "../../embassy-futures" }
 embassy-sync = { version = "0.7.2", path = "../../embassy-sync", features = ["defmt", ] }
 embassy-executor = { version = "0.9.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.5.0", path = "../../embassy-time", features = ["defmt",  "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.8.0", path = "../../embassy-nrf", features = ["defmt",  "time-driver-rtc1", "gpiote", "unstable-pac"] }
+embassy-nrf = { version = "0.9.0", path = "../../embassy-nrf", features = ["defmt",  "time-driver-rtc1", "gpiote", "unstable-pac"] }
-embedded-io-async = { version = "0.6.1", features = ["defmt-03"] }
+embedded-io-async = { version = "0.7.0", features = ["defmt"] }
 embassy-net = { version = "0.7.1", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", ] }
 embassy-net-esp-hosted = { version = "0.2.1", path = "../../embassy-net-esp-hosted", features = ["defmt"] }
 embassy-net-enc28j60 = { version = "0.2.1", path = "../../embassy-net-enc28j60", features = ["defmt"] }
diff --git a/tests/rp/Cargo.toml b/tests/rp/Cargo.toml
index 4dfe6904e..375a613d2 100644
--- a/tests/rp/Cargo.toml
+++ b/tests/rp/Cargo.toml
@@ -35,7 +35,7 @@ embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
 embedded-hal-async = { version = "1.0" }
 embedded-hal-bus = { version = "0.1", features = ["async"] }
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
-embedded-io-async = { version = "0.6.1" }
+embedded-io-async = { version = "0.7.0" }
 embedded-storage = { version = "0.3" }
 static_cell = "2"
 portable-atomic = { version = "1.5", features = ["critical-section"] }
diff --git a/tests/stm32/src/bin/stop.rs b/tests/stm32/src/bin/stop.rs
index 83c375bc5..75dacbe7e 100644
--- a/tests/stm32/src/bin/stop.rs
+++ b/tests/stm32/src/bin/stop.rs
@@ -60,10 +60,12 @@ async fn async_main(spawner: Spawner) {
    let (rtc, _time_provider) = Rtc::new(p.RTC);
+    info!("set datetime");
    critical_section::with(|cs| {
        rtc.borrow_mut(cs).set_datetime(now.into()).expect("datetime not set");
    });
+    info!("spawn");
    spawner.spawn(task_1().unwrap());
    spawner.spawn(task_2().unwrap());
 }