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-rw-r--r--embassy-stm32/CHANGELOG.md1
-rw-r--r--embassy-stm32/src/sai/mod.rs8
2 files changed, 5 insertions, 4 deletions
diff --git a/embassy-stm32/CHANGELOG.md b/embassy-stm32/CHANGELOG.md
index 36fabdbf4..82a253ff6 100644
--- a/embassy-stm32/CHANGELOG.md
+++ b/embassy-stm32/CHANGELOG.md
@@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
9## Unreleased - ReleaseDate 9## Unreleased - ReleaseDate
10 10
11- feat: stm32/sai: make NODIV independent of MCKDIV 11- feat: stm32/sai: make NODIV independent of MCKDIV
12- fix: stm32/sai: fix WB MCKDIV
12- fix: stm32/i2c: pull-down was enabled instead of pull-none when no internal pull-up was needed. 13- fix: stm32/i2c: pull-down was enabled instead of pull-none when no internal pull-up was needed.
13- feat: Improve blocking hash speed 14- feat: Improve blocking hash speed
14- fix: Fix vrefbuf building with log feature 15- fix: Fix vrefbuf building with log feature
diff --git a/embassy-stm32/src/sai/mod.rs b/embassy-stm32/src/sai/mod.rs
index 2f6160cb1..4965f8b04 100644
--- a/embassy-stm32/src/sai/mod.rs
+++ b/embassy-stm32/src/sai/mod.rs
@@ -390,7 +390,7 @@ impl OutputDrive {
390/// Master clock divider. 390/// Master clock divider.
391#[derive(Copy, Clone, PartialEq)] 391#[derive(Copy, Clone, PartialEq)]
392#[allow(missing_docs)] 392#[allow(missing_docs)]
393#[cfg(any(sai_v1, sai_v1_4pdm, sai_v2))] 393#[cfg(any(sai_v1, sai_v2))]
394pub enum MasterClockDivider { 394pub enum MasterClockDivider {
395 MasterClockDisabled, 395 MasterClockDisabled,
396 Div1, 396 Div1,
@@ -414,7 +414,7 @@ pub enum MasterClockDivider {
414/// Master clock divider. 414/// Master clock divider.
415#[derive(Copy, Clone, PartialEq)] 415#[derive(Copy, Clone, PartialEq)]
416#[allow(missing_docs)] 416#[allow(missing_docs)]
417#[cfg(any(sai_v3_2pdm, sai_v3_4pdm, sai_v4_2pdm, sai_v4_4pdm))] 417#[cfg(any(sai_v1_4pdm, sai_v3_2pdm, sai_v3_4pdm, sai_v4_2pdm, sai_v4_4pdm))]
418pub enum MasterClockDivider { 418pub enum MasterClockDivider {
419 MasterClockDisabled, 419 MasterClockDisabled,
420 Div1, 420 Div1,
@@ -483,7 +483,7 @@ pub enum MasterClockDivider {
483} 483}
484 484
485impl MasterClockDivider { 485impl MasterClockDivider {
486 #[cfg(any(sai_v1, sai_v1_4pdm, sai_v2))] 486 #[cfg(any(sai_v1, sai_v2))]
487 const fn mckdiv(&self) -> u8 { 487 const fn mckdiv(&self) -> u8 {
488 match self { 488 match self {
489 MasterClockDivider::MasterClockDisabled => 0, 489 MasterClockDivider::MasterClockDisabled => 0,
@@ -506,7 +506,7 @@ impl MasterClockDivider {
506 } 506 }
507 } 507 }
508 508
509 #[cfg(any(sai_v3_2pdm, sai_v3_4pdm, sai_v4_2pdm, sai_v4_4pdm))] 509 #[cfg(any(sai_v1_4pdm, sai_v3_2pdm, sai_v3_4pdm, sai_v4_2pdm, sai_v4_4pdm))]
510 const fn mckdiv(&self) -> u8 { 510 const fn mckdiv(&self) -> u8 {
511 match self { 511 match self {
512 MasterClockDivider::MasterClockDisabled => 0, 512 MasterClockDivider::MasterClockDisabled => 0,