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-rw-r--r--embassy-stm32/Cargo.toml8
-rw-r--r--embassy-stm32/src/rcc/bd.rs10
-rw-r--r--embassy-stm32/src/rtc/low_power.rs36
-rw-r--r--embassy-stm32/src/rtc/mod.rs21
-rw-r--r--embassy-stm32/src/rtc/v2.rs8
5 files changed, 34 insertions, 49 deletions
diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml
index b029f33b0..82bc73708 100644
--- a/embassy-stm32/Cargo.toml
+++ b/embassy-stm32/Cargo.toml
@@ -66,6 +66,10 @@ build = [
66 {target = "thumbv7em-none-eabi", features = ["defmt", "exti", "stm32l431cb", "time", "time-driver-any"]}, 66 {target = "thumbv7em-none-eabi", features = ["defmt", "exti", "stm32l431cb", "time", "time-driver-any"]},
67 {target = "thumbv7em-none-eabi", features = ["defmt", "exti", "stm32l476vg", "time", "time-driver-any"]}, 67 {target = "thumbv7em-none-eabi", features = ["defmt", "exti", "stm32l476vg", "time", "time-driver-any"]},
68 {target = "thumbv7em-none-eabi", features = ["defmt", "exti", "stm32l422cb", "time", "time-driver-any"]}, 68 {target = "thumbv7em-none-eabi", features = ["defmt", "exti", "stm32l422cb", "time", "time-driver-any"]},
69 {target = "thumbv7em-none-eabi", features = ["defmt", "exti", "stm32l4p5ae", "time", "time-driver-any", "single-bank"]},
70 {target = "thumbv7em-none-eabi", features = ["defmt", "exti", "stm32l4q5zg", "time", "time-driver-any", "single-bank"]},
71 {target = "thumbv7em-none-eabi", features = ["defmt", "exti", "stm32l4r9vi", "time", "time-driver-any", "dual-bank"]},
72 {target = "thumbv7em-none-eabi", features = ["defmt", "exti", "stm32l4s7vi", "time", "time-driver-any", "dual-bank"]},
69 {target = "thumbv7em-none-eabi", features = ["defmt", "exti", "stm32wb15cc", "time", "time-driver-any"]}, 73 {target = "thumbv7em-none-eabi", features = ["defmt", "exti", "stm32wb15cc", "time", "time-driver-any"]},
70 {target = "thumbv6m-none-eabi", features = ["defmt", "exti", "stm32l072cz", "time", "time-driver-any"]}, 74 {target = "thumbv6m-none-eabi", features = ["defmt", "exti", "stm32l072cz", "time", "time-driver-any"]},
71 {target = "thumbv6m-none-eabi", features = ["defmt", "exti", "stm32l041f6", "time", "time-driver-any"]}, 75 {target = "thumbv6m-none-eabi", features = ["defmt", "exti", "stm32l041f6", "time", "time-driver-any"]},
@@ -174,7 +178,7 @@ futures-util = { version = "0.3.30", default-features = false }
174sdio-host = "0.9.0" 178sdio-host = "0.9.0"
175critical-section = "1.1" 179critical-section = "1.1"
176#stm32-metapac = { version = "18" } 180#stm32-metapac = { version = "18" }
177stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-b46fcc32f329f05fbdca4c007ed4bc305b0ade85" } 181stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-b9f6b0c542d85ee695d71c35ced195e0cef51ac0" }
178 182
179vcell = "0.1.3" 183vcell = "0.1.3"
180nb = "1.0.0" 184nb = "1.0.0"
@@ -204,7 +208,7 @@ proc-macro2 = "1.0.36"
204quote = "1.0.15" 208quote = "1.0.15"
205 209
206#stm32-metapac = { version = "18", default-features = false, features = ["metadata"]} 210#stm32-metapac = { version = "18", default-features = false, features = ["metadata"]}
207stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-b46fcc32f329f05fbdca4c007ed4bc305b0ade85", default-features = false, features = ["metadata"] } 211stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-b9f6b0c542d85ee695d71c35ced195e0cef51ac0", default-features = false, features = ["metadata"] }
208 212
209[features] 213[features]
210default = ["rt"] 214default = ["rt"]
diff --git a/embassy-stm32/src/rcc/bd.rs b/embassy-stm32/src/rcc/bd.rs
index e2c704405..63fc195dd 100644
--- a/embassy-stm32/src/rcc/bd.rs
+++ b/embassy-stm32/src/rcc/bd.rs
@@ -52,9 +52,9 @@ impl From<LseDrive> for crate::pac::rcc::vals::Lsedrv {
52 } 52 }
53} 53}
54 54
55#[cfg(not(any(rtc_v2l0, rtc_v2l1, stm32c0)))] 55#[cfg(not(any(rtc_v2_l0, rtc_v2_l1, stm32c0)))]
56type Bdcr = crate::pac::rcc::regs::Bdcr; 56type Bdcr = crate::pac::rcc::regs::Bdcr;
57#[cfg(any(rtc_v2l0, rtc_v2l1))] 57#[cfg(any(rtc_v2_l0, rtc_v2_l1))]
58type Bdcr = crate::pac::rcc::regs::Csr; 58type Bdcr = crate::pac::rcc::regs::Csr;
59#[cfg(any(stm32c0))] 59#[cfg(any(stm32c0))]
60type Bdcr = crate::pac::rcc::regs::Csr1; 60type Bdcr = crate::pac::rcc::regs::Csr1;
@@ -76,9 +76,9 @@ fn unlock() {
76} 76}
77 77
78fn bdcr() -> Reg<Bdcr, RW> { 78fn bdcr() -> Reg<Bdcr, RW> {
79 #[cfg(any(rtc_v2l0, rtc_v2l1))] 79 #[cfg(any(rtc_v2_l0, rtc_v2_l1))]
80 return crate::pac::RCC.csr(); 80 return crate::pac::RCC.csr();
81 #[cfg(not(any(rtc_v2l0, rtc_v2l1, stm32c0)))] 81 #[cfg(not(any(rtc_v2_l0, rtc_v2_l1, stm32c0)))]
82 return crate::pac::RCC.bdcr(); 82 return crate::pac::RCC.bdcr();
83 #[cfg(any(stm32c0))] 83 #[cfg(any(stm32c0))]
84 return crate::pac::RCC.csr1(); 84 return crate::pac::RCC.csr1();
@@ -273,7 +273,7 @@ impl LsConfig {
273 273
274 if self.rtc != RtcClockSource::DISABLE { 274 if self.rtc != RtcClockSource::DISABLE {
275 bdcr().modify(|w| { 275 bdcr().modify(|w| {
276 #[cfg(any(rtc_v2h7, rtc_v2l4, rtc_v2wb, rtc_v3, rtc_v3u5))] 276 #[cfg(any(rtc_v2_h7, rtc_v2_l4, rtc_v2_wb, rtc_v3_base, rtc_v3_u5))]
277 assert!(!w.lsecsson(), "RTC is not compatible with LSE CSS, yet."); 277 assert!(!w.lsecsson(), "RTC is not compatible with LSE CSS, yet.");
278 278
279 #[cfg(not(rcc_wba))] 279 #[cfg(not(rcc_wba))]
diff --git a/embassy-stm32/src/rtc/low_power.rs b/embassy-stm32/src/rtc/low_power.rs
index 78ccd3e6c..a81ac6746 100644
--- a/embassy-stm32/src/rtc/low_power.rs
+++ b/embassy-stm32/src/rtc/low_power.rs
@@ -1,4 +1,8 @@
1#[cfg(feature = "time")]
2use embassy_time::{Duration, TICK_HZ};
3
1use super::{bcd2_to_byte, DateTimeError, Rtc, RtcError}; 4use super::{bcd2_to_byte, DateTimeError, Rtc, RtcError};
5use crate::interrupt::typelevel::Interrupt;
2use crate::peripherals::RTC; 6use crate::peripherals::RTC;
3use crate::rtc::SealedInstance; 7use crate::rtc::SealedInstance;
4 8
@@ -11,7 +15,7 @@ pub(super) struct RtcInstant {
11} 15}
12 16
13impl RtcInstant { 17impl RtcInstant {
14 #[cfg(not(rtc_v2f2))] 18 #[cfg(not(rtc_v2_f2))]
15 const fn from(second: u8, subsecond: u16) -> Result<Self, DateTimeError> { 19 const fn from(second: u8, subsecond: u16) -> Result<Self, DateTimeError> {
16 if second > 59 { 20 if second > 59 {
17 Err(DateTimeError::InvalidSecond) 21 Err(DateTimeError::InvalidSecond)
@@ -38,8 +42,6 @@ impl core::ops::Sub for RtcInstant {
38 type Output = embassy_time::Duration; 42 type Output = embassy_time::Duration;
39 43
40 fn sub(self, rhs: Self) -> Self::Output { 44 fn sub(self, rhs: Self) -> Self::Output {
41 use embassy_time::{Duration, TICK_HZ};
42
43 let second = if self.second < rhs.second { 45 let second = if self.second < rhs.second {
44 self.second + 60 46 self.second + 60
45 } else { 47 } else {
@@ -129,11 +131,6 @@ impl Rtc {
129 requested_duration: embassy_time::Duration, 131 requested_duration: embassy_time::Duration,
130 cs: critical_section::CriticalSection, 132 cs: critical_section::CriticalSection,
131 ) { 133 ) {
132 use embassy_time::{Duration, TICK_HZ};
133
134 #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))]
135 use crate::pac::rtc::vals::Calrf;
136
137 // Panic if the rcc mod knows we're not using low-power rtc 134 // Panic if the rcc mod knows we're not using low-power rtc
138 #[cfg(any(rcc_wb, rcc_f4, rcc_f410))] 135 #[cfg(any(rcc_wb, rcc_f4, rcc_f410))]
139 unsafe { crate::rcc::get_freqs() }.rtc.to_hertz().unwrap(); 136 unsafe { crate::rcc::get_freqs() }.rtc.to_hertz().unwrap();
@@ -150,17 +147,15 @@ impl Rtc {
150 self.write(false, |regs| { 147 self.write(false, |regs| {
151 regs.cr().modify(|w| w.set_wute(false)); 148 regs.cr().modify(|w| w.set_wute(false));
152 149
153 #[cfg(any( 150 #[cfg(rtc_v2)]
154 rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
155 ))]
156 { 151 {
157 regs.isr().modify(|w| w.set_wutf(false)); 152 regs.isr().modify(|w| w.set_wutf(false));
158 while !regs.isr().read().wutwf() {} 153 while !regs.isr().read().wutwf() {}
159 } 154 }
160 155
161 #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] 156 #[cfg(rtc_v3)]
162 { 157 {
163 regs.scr().write(|w| w.set_cwutf(Calrf::CLEAR)); 158 regs.scr().write(|w| w.set_cwutf(crate::pac::rtc::vals::Calrf::CLEAR));
164 while !regs.icsr().read().wutwf() {} 159 while !regs.icsr().read().wutwf() {}
165 } 160 }
166 161
@@ -185,10 +180,6 @@ impl Rtc {
185 /// stop the wakeup alarm and return the time elapsed since `start_wakeup_alarm` 180 /// stop the wakeup alarm and return the time elapsed since `start_wakeup_alarm`
186 /// was called, otherwise none 181 /// was called, otherwise none
187 pub(crate) fn stop_wakeup_alarm(&self, cs: critical_section::CriticalSection) -> Option<embassy_time::Duration> { 182 pub(crate) fn stop_wakeup_alarm(&self, cs: critical_section::CriticalSection) -> Option<embassy_time::Duration> {
188 use crate::interrupt::typelevel::Interrupt;
189 #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))]
190 use crate::pac::rtc::vals::Calrf;
191
192 let instant = self.instant().unwrap(); 183 let instant = self.instant().unwrap();
193 if RTC::regs().cr().read().wute() { 184 if RTC::regs().cr().read().wute() {
194 trace!("rtc: stop wakeup alarm at {}", instant); 185 trace!("rtc: stop wakeup alarm at {}", instant);
@@ -197,13 +188,10 @@ impl Rtc {
197 regs.cr().modify(|w| w.set_wutie(false)); 188 regs.cr().modify(|w| w.set_wutie(false));
198 regs.cr().modify(|w| w.set_wute(false)); 189 regs.cr().modify(|w| w.set_wute(false));
199 190
200 #[cfg(any( 191 #[cfg(rtc_v2)]
201 rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
202 ))]
203 regs.isr().modify(|w| w.set_wutf(false)); 192 regs.isr().modify(|w| w.set_wutf(false));
204 193 #[cfg(rtc_v3)]
205 #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] 194 regs.scr().write(|w| w.set_cwutf(crate::pac::rtc::vals::Calrf::CLEAR));
206 regs.scr().write(|w| w.set_cwutf(Calrf::CLEAR));
207 195
208 // Check RM for EXTI and/or NVIC section, "Event event input mapping" or "EXTI interrupt/event mapping" or something similar, 196 // Check RM for EXTI and/or NVIC section, "Event event input mapping" or "EXTI interrupt/event mapping" or something similar,
209 // there is a table for every "Event input" / "EXTI Line". 197 // there is a table for every "Event input" / "EXTI Line".
@@ -222,8 +210,6 @@ impl Rtc {
222 } 210 }
223 211
224 pub(crate) fn enable_wakeup_line(&self) { 212 pub(crate) fn enable_wakeup_line(&self) {
225 use crate::interrupt::typelevel::Interrupt;
226
227 <RTC as crate::rtc::SealedInstance>::WakeupInterrupt::unpend(); 213 <RTC as crate::rtc::SealedInstance>::WakeupInterrupt::unpend();
228 unsafe { <RTC as crate::rtc::SealedInstance>::WakeupInterrupt::enable() }; 214 unsafe { <RTC as crate::rtc::SealedInstance>::WakeupInterrupt::enable() };
229 215
diff --git a/embassy-stm32/src/rtc/mod.rs b/embassy-stm32/src/rtc/mod.rs
index 449f3008a..92dec0960 100644
--- a/embassy-stm32/src/rtc/mod.rs
+++ b/embassy-stm32/src/rtc/mod.rs
@@ -18,14 +18,9 @@ use crate::pac::rtc::regs::{Dr, Tr};
18use crate::time::Hertz; 18use crate::time::Hertz;
19 19
20/// refer to AN4759 to compare features of RTC2 and RTC3 20/// refer to AN4759 to compare features of RTC2 and RTC3
21#[cfg_attr(any(rtc_v1), path = "v1.rs")] 21#[cfg_attr(rtc_v1, path = "v1.rs")]
22#[cfg_attr( 22#[cfg_attr(rtc_v2, path = "v2.rs")]
23 any( 23#[cfg_attr(rtc_v3, path = "v3.rs")]
24 rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
25 ),
26 path = "v2.rs"
27)]
28#[cfg_attr(any(rtc_v3, rtc_v3u5, rtc_v3l5, rtc_v3h7rs, rtc_v3c0), path = "v3.rs")]
29mod _version; 24mod _version;
30#[allow(unused_imports)] 25#[allow(unused_imports)]
31pub use _version::*; 26pub use _version::*;
@@ -72,12 +67,12 @@ impl RtcTimeProvider {
72 67
73 // Calculate second fraction and multiply to microseconds 68 // Calculate second fraction and multiply to microseconds
74 // Formula from RM0410 69 // Formula from RM0410
75 #[cfg(not(rtc_v2f2))] 70 #[cfg(not(rtc_v2_f2))]
76 let us = { 71 let us = {
77 let prediv = RTC::regs().prer().read().prediv_s() as f32; 72 let prediv = RTC::regs().prer().read().prediv_s() as f32;
78 (((prediv - _ss as f32) / (prediv + 1.0)) * 1e6).min(999_999.0) as u32 73 (((prediv - _ss as f32) / (prediv + 1.0)) * 1e6).min(999_999.0) as u32
79 }; 74 };
80 #[cfg(rtc_v2f2)] 75 #[cfg(rtc_v2_f2)]
81 let us = 0; 76 let us = 0;
82 77
83 DateTime::from(year, month, day, weekday, hour, minute, second, us).map_err(RtcError::InvalidDateTime) 78 DateTime::from(year, month, day, weekday, hour, minute, second, us).map_err(RtcError::InvalidDateTime)
@@ -87,9 +82,9 @@ impl RtcTimeProvider {
87 fn read<R>(&self, mut f: impl FnMut(Dr, Tr, u16) -> Result<R, RtcError>) -> Result<R, RtcError> { 82 fn read<R>(&self, mut f: impl FnMut(Dr, Tr, u16) -> Result<R, RtcError>) -> Result<R, RtcError> {
88 let r = RTC::regs(); 83 let r = RTC::regs();
89 84
90 #[cfg(not(rtc_v2f2))] 85 #[cfg(not(rtc_v2_f2))]
91 let read_ss = || r.ssr().read().ss(); 86 let read_ss = || r.ssr().read().ss();
92 #[cfg(rtc_v2f2)] 87 #[cfg(rtc_v2_f2)]
93 let read_ss = || 0; 88 let read_ss = || 0;
94 89
95 let mut ss = read_ss(); 90 let mut ss = read_ss();
@@ -168,7 +163,7 @@ impl Rtc {
168 this.configure(async_psc, sync_psc); 163 this.configure(async_psc, sync_psc);
169 164
170 // Wait for the clock to update after initialization 165 // Wait for the clock to update after initialization
171 #[cfg(not(rtc_v2f2))] 166 #[cfg(not(rtc_v2_f2))]
172 { 167 {
173 let now = this.time_provider().read(|_, _, ss| Ok(ss)).unwrap(); 168 let now = this.time_provider().read(|_, _, ss| Ok(ss)).unwrap();
174 while now == this.time_provider().read(|_, _, ss| Ok(ss)).unwrap() {} 169 while now == this.time_provider().read(|_, _, ss| Ok(ss)).unwrap() {}
diff --git a/embassy-stm32/src/rtc/v2.rs b/embassy-stm32/src/rtc/v2.rs
index 28380a3c0..23f6ccb0c 100644
--- a/embassy-stm32/src/rtc/v2.rs
+++ b/embassy-stm32/src/rtc/v2.rs
@@ -11,11 +11,11 @@ impl super::Rtc {
11 pub(super) fn configure(&mut self, async_psc: u8, sync_psc: u16) { 11 pub(super) fn configure(&mut self, async_psc: u8, sync_psc: u16) {
12 self.write(true, |rtc| { 12 self.write(true, |rtc| {
13 rtc.cr().modify(|w| { 13 rtc.cr().modify(|w| {
14 #[cfg(not(rtc_v2f2))] 14 #[cfg(not(rtc_v2_f2))]
15 w.set_bypshad(true); 15 w.set_bypshad(true);
16 #[cfg(rtc_v2f2)] 16 #[cfg(rtc_v2_f2)]
17 w.set_fmt(false); 17 w.set_fmt(false);
18 #[cfg(not(rtc_v2f2))] 18 #[cfg(not(rtc_v2_f2))]
19 w.set_fmt(stm32_metapac::rtc::vals::Fmt::TWENTY_FOUR_HOUR); 19 w.set_fmt(stm32_metapac::rtc::vals::Fmt::TWENTY_FOUR_HOUR);
20 w.set_osel(Osel::DISABLED); 20 w.set_osel(Osel::DISABLED);
21 w.set_pol(Pol::HIGH); 21 w.set_pol(Pol::HIGH);
@@ -36,7 +36,7 @@ impl super::Rtc {
36 /// 36 ///
37 /// To perform a calibration when `async_prescaler` is less then 3, `sync_prescaler` 37 /// To perform a calibration when `async_prescaler` is less then 3, `sync_prescaler`
38 /// has to be reduced accordingly (see RM0351 Rev 9, sec 38.3.12). 38 /// has to be reduced accordingly (see RM0351 Rev 9, sec 38.3.12).
39 #[cfg(not(rtc_v2f2))] 39 #[cfg(not(rtc_v2_f2))]
40 pub fn calibrate(&mut self, mut clock_drift: f32, period: super::RtcCalibrationCyclePeriod) { 40 pub fn calibrate(&mut self, mut clock_drift: f32, period: super::RtcCalibrationCyclePeriod) {
41 const RTC_CALR_MIN_PPM: f32 = -487.1; 41 const RTC_CALR_MIN_PPM: f32 = -487.1;
42 const RTC_CALR_MAX_PPM: f32 = 488.5; 42 const RTC_CALR_MAX_PPM: f32 = 488.5;