diff options
| -rw-r--r-- | embassy-stm32/src/lib.rs | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index ff77399b2..948cde677 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs | |||
| @@ -189,6 +189,18 @@ pub struct Config { | |||
| 189 | /// Defaults to P0 (highest). | 189 | /// Defaults to P0 (highest). |
| 190 | #[cfg(gpdma)] | 190 | #[cfg(gpdma)] |
| 191 | pub gpdma_interrupt_priority: Priority, | 191 | pub gpdma_interrupt_priority: Priority, |
| 192 | |||
| 193 | /// Disables UCPD1 dead battery functionality. | ||
| 194 | /// | ||
| 195 | /// Defaults to true (disabled). | ||
| 196 | #[cfg(ucpd)] | ||
| 197 | pub disable_ucpd1_dead_battery: bool, | ||
| 198 | |||
| 199 | /// Disables UCPD2 dead battery functionality. | ||
| 200 | /// | ||
| 201 | /// Defaults to true (disabled). | ||
| 202 | #[cfg(all(ucpd, stm32g0x1))] | ||
| 203 | pub disable_ucpd2_dead_battery: bool, | ||
| 192 | } | 204 | } |
| 193 | 205 | ||
| 194 | impl Default for Config { | 206 | impl Default for Config { |
| @@ -203,6 +215,10 @@ impl Default for Config { | |||
| 203 | dma_interrupt_priority: Priority::P0, | 215 | dma_interrupt_priority: Priority::P0, |
| 204 | #[cfg(gpdma)] | 216 | #[cfg(gpdma)] |
| 205 | gpdma_interrupt_priority: Priority::P0, | 217 | gpdma_interrupt_priority: Priority::P0, |
| 218 | #[cfg(ucpd)] | ||
| 219 | disable_ucpd1_dead_battery: true, | ||
| 220 | #[cfg(all(ucpd, stm32g0x1))] | ||
| 221 | uisable_ucpd2_dead_battery: true, | ||
| 206 | } | 222 | } |
| 207 | } | 223 | } |
| 208 | } | 224 | } |
| @@ -254,6 +270,36 @@ pub fn init(config: Config) -> Peripherals { | |||
| 254 | #[cfg(not(any(stm32f2, stm32f4, stm32f7, stm32l0, stm32h5, stm32h7)))] | 270 | #[cfg(not(any(stm32f2, stm32f4, stm32f7, stm32l0, stm32h5, stm32h7)))] |
| 255 | peripherals::FLASH::enable_and_reset_with_cs(cs); | 271 | peripherals::FLASH::enable_and_reset_with_cs(cs); |
| 256 | 272 | ||
| 273 | // dead battery IOs are still present on g0x0 despite not having UCPD | ||
| 274 | #[cfg(any(stm32g070, stm32g0b0))] | ||
| 275 | let (disable_ucpd1_dead_battery, disable_ucpd2_dead_battery) = (true, true); | ||
| 276 | #[cfg(ucpd)] | ||
| 277 | let disable_ucpd1_dead_battery = config.disable_ucpd1_dead_battery; | ||
| 278 | #[cfg(all(ucpd, stm32g0x1))] | ||
| 279 | let disable_ucpd2_dead_battery = config.disable_ucpd2_dead_battery; | ||
| 280 | |||
| 281 | #[cfg(any(stm32g070, stm32g0b0, all(ucpd, stm32g0x1)))] | ||
| 282 | { | ||
| 283 | crate::pac::SYSCFG.cfgr1().modify(|w| { | ||
| 284 | w.set_ucpd1_strobe(disable_ucpd1_dead_battery); | ||
| 285 | w.set_ucpd2_strobe(disable_ucpd2_dead_battery); | ||
| 286 | }); | ||
| 287 | } | ||
| 288 | |||
| 289 | #[cfg(all(ucpd, any(stm32g4, stm32l5)))] | ||
| 290 | { | ||
| 291 | crate::pac::PWR | ||
| 292 | .cr3() | ||
| 293 | .modify(|w| w.set_ucpd1_dbdis(disable_ucpd1_dead_battery)) | ||
| 294 | } | ||
| 295 | |||
| 296 | #[cfg(all(ucpd, any(stm32h5, stm32u5)))] | ||
| 297 | { | ||
| 298 | crate::pac::PWR | ||
| 299 | .ucpdr() | ||
| 300 | .modify(|w| w.set_ucpd1_dbdis(disable_ucpd1_dead_battery)) | ||
| 301 | } | ||
| 302 | |||
| 257 | unsafe { | 303 | unsafe { |
| 258 | #[cfg(feature = "_split-pins-enabled")] | 304 | #[cfg(feature = "_split-pins-enabled")] |
| 259 | crate::pac::SYSCFG.pmcr().modify(|pmcr| { | 305 | crate::pac::SYSCFG.pmcr().modify(|pmcr| { |
